DISTRIBUTED CACHE SYSTEM IN A DRIVE ARRAY
    41.
    发明申请
    DISTRIBUTED CACHE SYSTEM IN A DRIVE ARRAY 审中-公开
    驱动阵列中的分布式缓存系统

    公开(公告)号:US20110022794A1

    公开(公告)日:2011-01-27

    申请号:US12898905

    申请日:2010-10-06

    CPC classification number: G06F12/0873 G06F12/0897 G06F2212/261 G06F2212/283

    Abstract: An apparatus comprising a drive array, a first cache circuit, a plurality of second cache circuits and a controller. The drive array may comprise a plurality of disk drives. The plurality of second cache circuits may each be connected to a respective one of the disk drives. The controller may be configured to (i) control read and write operations of the disk drives, (ii) read and write information from the disk drives to the first cache, (iii) read and write information to the second cache circuits, and (iv) control reading and writing of information directly from one of the disk drives to one of the second cache circuits.

    Abstract translation: 一种装置,包括驱动阵列,第一高速缓存电路,多个第二高速缓存电路和控制器。 驱动器阵列可以包括多个磁盘驱动器。 多个第二高速缓存电路可以各自连接到相应的一个盘驱动器。 控制器可以被配置为(i)控制磁盘驱动器的读取和写入操作,(ii)将信息从盘驱动器读取和写入到第一高速缓存,(iii)将信息读取和写入到第二高速缓存电路,以及( iv)控制信息的直接从一个磁盘驱动器读取和写入到第二高速缓存电路之一。

    METHOD FOR HANDLING INTERRUPTED WRITES USING MULTIPLE CORES
    42.
    发明申请
    METHOD FOR HANDLING INTERRUPTED WRITES USING MULTIPLE CORES 审中-公开
    使用多条处理中断写入的方法

    公开(公告)号:US20100180151A1

    公开(公告)日:2010-07-15

    申请号:US12354126

    申请日:2009-01-15

    Abstract: An apparatus comprising a storage array, a primary controller, a secondary controller and a solid state device. The storage array may be configured to be accessed by a plurality of controllers. A first of the plurality of the controllers may be configured as the primary controller configured to read and write to and from the storage array during a normal condition. A second of the plurality of the controllers may be configured as the secondary controller configured to read and write to and from the storage array during a fault condition. The solid state device may be configured to (i) store data and (ii) be accessed by the storage array and the secondary controller.

    Abstract translation: 一种包括存储阵列,主控制器,辅助控制器和固态设备的装置。 存储阵列可以被配置为被多个控制器访问。 多个控制器中的第一个可以被配置为主要控制器,其被配置为在正常状态期间从存储阵列读取和写入存储阵列。 多个控制器中的第二个可以被配置为辅助控制器,其被配置为在故障状态期间从存储阵列读取和写入存储阵列。 固态设备可以被配置为(i)存储数据和(ii)由存储阵列和辅助控制器访问。

    Method and apparatus for recreating fiber channel traffic
    44.
    发明授权
    Method and apparatus for recreating fiber channel traffic 失效
    重建光纤通道业务的方法和装置

    公开(公告)号:US06687856B2

    公开(公告)日:2004-02-03

    申请号:US10033125

    申请日:2001-10-23

    Inventor: Mahmoud K. Jibbe

    Abstract: A logic analyzer or a bus analyzer may be used to capture data from a source computer system to diagnose a problem arising in the source computer system. In many cases the problem can be traced to a particular hardware/software subsystem. Quite often, a customer of the manufacturer of the hardware/software subsystem maintains the source computer system. In the manufacturer's facilities is a reference system operated by a technician or engineer responsible to test and support the hardware/software subsystem. The source computer system and the reference system thus may involve different hardware and software configurations and possibly even different operating systems. The present invention provides a system and a method to allow data captured in a source computer system to be replayed in the remote reference system so as to recreate a captured event or analyze performance.

    Abstract translation: 逻辑分析器或总线分析器可用于从源计算机系统捕获数据,以诊断源计算机系统中出现的问题。 在许多情况下,问题可以追溯到特定的硬件/软件子系统。 通常,硬件/软件子系统的制造商的客户维护源计算机系统。 制造商的设施是由负责测试和支持硬件/软件子系统的技术人员或工程师操作的参考系统。 因此,源计算机系统和参考系统可能涉及不同的硬件和软件配置,甚至可能涉及不同的操作系统。 本发明提供一种允许在源计算机系统中捕获的数据在远程参考系统中被重播的系统和方法,以便重建捕获的事件或分析性能。

    Method and apparatus for recreating fiber channel traffic
    45.
    发明授权
    Method and apparatus for recreating fiber channel traffic 有权
    重建光纤通道业务的方法和装置

    公开(公告)号:US06367033B1

    公开(公告)日:2002-04-02

    申请号:US09210171

    申请日:1998-12-11

    Inventor: Mahmoud K. Jibbe

    Abstract: A logic analyzer or a bus analyzer may be used to capture data from a source computer system to diagnose a problem arising in the source computer system. In many cases the problem can be traced to a particular hardware/software subsystem. Quite often, a customer of the manufacturer of the hardware/software subsystem maintains the source computer system. In the manufacturer's facilities is a reference system operated by a technician or engineer responsible to test and support the hardware/software subsystem. The source computer system and the reference system thus may involve different hardware and software configurations and possibly even different operating systems. The present invention provides a system and a method to allow data captured in a source computer system to be replayed in the remote reference system so as to recreate a captured event or analyze performance.

    Abstract translation: 逻辑分析器或总线分析器可用于从源计算机系统捕获数据,以诊断源计算机系统中出现的问题。 在许多情况下,问题可以追溯到特定的硬件/软件子系统。 通常,硬件/软件子系统的制造商的客户维护源计算机系统。 制造商的设施是由负责测试和支持硬件/软件子系统的技术人员或工程师操作的参考系统。 因此,源计算机系统和参考系统可能涉及不同的硬件和软件配置,甚至可能涉及不同的操作系统。 本发明提供一种允许在源计算机系统中捕获的数据在远程参考系统中被重播的系统和方法,以便重建捕获的事件或分析性能。

    Bus configuration validation for a multiple source disk array bus
    46.
    发明授权
    Bus configuration validation for a multiple source disk array bus 失效
    多源磁盘阵列总线的总线配置验证

    公开(公告)号:US5430747A

    公开(公告)日:1995-07-04

    申请号:US669554

    申请日:1991-03-14

    CPC classification number: G06F11/0745 G06F11/0727 G06F11/0793

    Abstract: An interrupt signal indicating the existence of a bus configuration error within a disk array system is generated by monitoring the enable signals controlling bus drivers included in the array system. The array configuration error detector includes bus configuration error detection logic for each multiple-source bus within the array. Each bus configuration error detector is connected to receive all enable signals for the bus drivers associated with one bus and decode the received enable signals to generate an error signal when more than one of the received enable signals is active. The error signals generated for each of the multiple-source busses are provided to an adder and combined to form the configuration error interrupt signal for the array.

    Abstract translation: 通过监视控制阵列系统中包括的总线驱动器的使能信号来产生表示盘阵列系统中存在总线配置错误的中断信号。 阵列配置错误检测器包括阵列内每个多源总线的总线配置错误检测逻辑。 每个总线配置错误检测器被连接以接收与一个总线相关联的总线驱动器的所有使能信号,并且当接收到的使能信号多于一个有效时,解码所接收的使能信号以产生误差信号。 为每个多源总线产生的误差信号被提供给加法器并组合以形成阵列的配置错误中断信号。

    System for injecting protocol specific errors during the certification of components in a storage area network
    48.
    发明授权
    System for injecting protocol specific errors during the certification of components in a storage area network 失效
    在存储区域网络中组件认证期间注入协议特定错误的系统

    公开(公告)号:US08489935B2

    公开(公告)日:2013-07-16

    申请号:US12983996

    申请日:2011-01-04

    CPC classification number: G06F11/1076 H04L43/50

    Abstract: An apparatus comprising an initiator circuit and a target circuit. The initiator circuit may be configured to (i) communicate with a network through a first interface and (ii) generate testing sequences to be sent to the network. The target circuit may be configured to (i) receive the testing sequences from the network through a second network interface and (ii) respond to the testing sequences.

    Abstract translation: 一种包括启动器电路和目标电路的装置。 发起者电路可以被配置为(i)通过第一接口与网络通信,以及(ii)产生要发送到网络的测试序列。 目标电路可以被配置为(i)通过第二网络接口从网络接收测试序列,并且(ii)响应测试序列。

    System for handling input/output requests between storage arrays with different performance capabilities
    49.
    发明授权
    System for handling input/output requests between storage arrays with different performance capabilities 有权
    用于处理具有不同性能功能的存储阵列之间的输入/输出请求的系统

    公开(公告)号:US08386710B2

    公开(公告)日:2013-02-26

    申请号:US13418144

    申请日:2012-03-12

    CPC classification number: G06F3/0659 G06F3/0611 G06F3/067 H04L49/90

    Abstract: An apparatus comprising a remote storage array, a primary storage array and a network. The remote storage array may be configured to (i) define a queue size based on a performance capability of the remote storage array, (ii) generate a multiplier based on resources being used by the remote storage array, and (iii) adjust the queue size by the multiplier. The primary storage array may be configured to execute input/output (IO) requests between the remote storage array and the primary storage array based on the adjusted queue size. The network may be configured to connect the remote storage array to the primary storage array.

    Abstract translation: 一种包括远程存储阵列,主存储阵列和网络的装置。 远程存储阵列可以被配置为(i)基于远程存储阵列的性能能力来定义队列大小,(ii)基于由远程存储阵列使用的资源生成乘法器,以及(iii)调整队列 大小乘以乘数。 主存储阵列可以被配置为基于调整的队列大小在远程存储阵列和主存储阵列之间执行输入/输出(IO)请求。 网络可以被配置为将远程存储阵列连接到主存储阵列。

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