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41.
公开(公告)号:US11770930B2
公开(公告)日:2023-09-26
申请号:US17456544
申请日:2021-11-24
Applicant: Micron Technology, Inc.
Inventor: Shuangqiang Luo , Xuan Li , Adeline Yii
Abstract: A microelectronic device comprises a stack structure, at least one staircase structure, contact structures, and support structures. The stack structure comprises vertically alternating conductive structures and insulating structures arranged in tiers, each of the tiers individually comprising one of the conductive structures and one of the insulating structures. The at least one staircase structure is within the stack structure and has steps comprising edges of at least some of the tiers. The contact structures are on the steps of the at least one staircase structure. The support structures horizontally alternate with the contact structures in a first horizontal direction and vertically extend through the stack structure. The support structures have oblong horizontal cross-sectional shapes. Additional microelectronic devices, memory devices, and electronic systems are also described.
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42.
公开(公告)号:US20230209824A1
公开(公告)日:2023-06-29
申请号:US17575939
申请日:2022-01-14
Applicant: Micron Technology, Inc.
Inventor: Shuangqiang Luo , Christopher Larsen , Rui Zhang
IPC: H01L27/11582 , G11C16/04 , H01L23/48 , H01L27/11556 , H01L27/11519 , H01L27/11524 , H01L27/11565 , H01L27/1157
CPC classification number: H01L27/11582 , G11C16/0483 , H01L23/481 , H01L27/11556 , H01L27/11519 , H01L27/11524 , H01L27/11565 , H01L27/1157
Abstract: Memory circuitry comprising strings of memory cells comprises laterally-spaced memory blocks individually comprising a vertical stack comprising alternating insulative tiers and conductive tiers. Channel-material strings of memory cells extend through the insulative tiers and the conductive tiers in a memory-array region. The insulative tiers and the conductive tiers of the laterally-spaced memory blocks extend from the memory-array region into a stair-step region. Individual stairs in the stair-step region comprise one of the conductive tiers. Conductive vias are individually directly against conducting material that is in the one conductive tier in one of the individual stairs. Insulator material in the stair-step region is directly above the stairs. An insulative-material lining is circumferentially around and extends elevationally along individual of the conductive vias between the individual conductive vias and the insulator material. Individual of the insulative-material linings and the insulator material comprise an interface there-between. Other embodiments, including methods, are disclosed.
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公开(公告)号:US20220406719A1
公开(公告)日:2022-12-22
申请号:US17304219
申请日:2021-06-16
Applicant: Micron Technology, Inc.
Inventor: Shuangqiang Luo , Indra V. Chary
IPC: H01L23/535 , H01L23/528 , H01L23/00 , H01L27/11556 , H01L27/11582 , H01L21/768
Abstract: A microelectronic device comprises a stack structure comprising a vertically alternating sequence of conductive structures and insulative structures arranged in tiers, a stair step structure within the stack structure and having steps comprising lateral edges of the tiers, pillar structures extending through the stack structure and the stair step structure and in contact with a source tier vertically underlying the stack structure, and conductive contact structures in contact with the steps of the staircase structure, the conductive contact structures individually comprising a first portion and a second portion vertically overlying the first portion, the second portion vertically above the pillar structures and having a greater lateral dimension than the first portion. Related microelectronic devices, memory devices, and electronic systems are also described.
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公开(公告)号:US20220384342A1
公开(公告)日:2022-12-01
申请号:US17819019
申请日:2022-08-11
Applicant: Micron Technology, Inc.
Inventor: Shuangqiang Luo , Indra V. Chary
IPC: H01L23/528 , H01L27/11582 , H01L27/11556 , H01L21/768 , H01L21/311 , H01L23/522
Abstract: A microelectronic device comprises pillar structures comprising semiconductive material, contact structures in physical contact with upper portions of the pillar structures, and conductive structures over and in physical contact with the contact structures. Each of the conductive structures comprises an upper portion having a first width, and a lower portion vertically interposed between the upper portion and the contact structures. The lower portion has a tapered profile defining additional widths varying from a second width less than the first width at an uppermost boundary of the lower portion to a third width less than the second width at a lowermost boundary of the lower portion. Memory devices, electronic systems, and methods of forming microelectronic devices are also described.
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公开(公告)号:US20220367501A1
公开(公告)日:2022-11-17
申请号:US17878574
申请日:2022-08-01
Applicant: Micron Technology, Inc.
Inventor: Shuangqiang Luo
IPC: H01L27/11556 , G11C5/06 , G11C5/02 , H01L27/11582
Abstract: Some embodiments include an integrated assembly having a memory array region which includes channel material pillars extending through a stack of alternating conductive and insulative levels. A second region is adjacent the memory array region. A conductive expanse is within the memory array region and electrically coupled with the channel material of the channel material pillars. A panel extends across the memory array region and the second region. The panel separates one memory block region from another. The panel has a first portion over the conductive expanse, and has a second portion adjacent the first portion. The panel has a bottom surface. A first segment of the bottom surface is adjacent an upper surface of the conductive expanse. A segment of the bottom surface within the second portion is elevationally offset relative to the first segment. Some embodiments include methods of forming integrated assemblies.
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公开(公告)号:US20220359398A1
公开(公告)日:2022-11-10
申请号:US17314485
申请日:2021-05-07
Applicant: Micron Technology, Inc.
Inventor: Lingyu Kong , Lifang Xu , Indra V. Chary , Shuangqiang Luo , Sok Han Wong
IPC: H01L23/535 , H01L23/528 , H01L23/00 , H01L27/11556 , H01L27/11582 , H01L21/768
Abstract: A microelectronic device comprises a stack structure comprising insulative structures vertically interleaved with conductive structures, first support pillar structures vertically extending through the stack structure in a first staircase region including steps defined at edges of tiers of the insulative structures and conductive structures, and second support pillar structures vertically extending through the stack structure in a second staircase region including additional steps defined at edges of additional tiers of the insulative structures and conductive structures, the second support pillar structures having a smaller cross-sectional area than the first support pillar structures. Related memory devices, electronic systems, and methods are also described.
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公开(公告)号:US11417673B2
公开(公告)日:2022-08-16
申请号:US16908287
申请日:2020-06-22
Applicant: Micron Technology, Inc.
Inventor: Shuangqiang Luo , Indra V. Chary , Justin B. Dorhout
IPC: H01L27/11556 , H01L23/00 , G11C5/02 , H01L23/538 , H01L21/768 , H01L27/11582 , G11C5/06
Abstract: A microelectronic device comprises a stack structure comprising alternating conductive structures and insulative structures arranged in tiers, the tiers individually comprising one of the conductive structures and one of the insulative structures, first support pillar structures extending through the stack structure within a first region of the microelectronic device, the first support pillar structures electrically isolated from a source structure underlying the stack structure, second support pillar structures extending through the stack structure within a second region of the microelectronic device, the second support pillar structures comprising an electrically conductive material in electrical communication with the source structure, and bridge structures extending between at least some neighboring first support pillar structures of the first support pillar structures. Related memory devices, electronic systems, and methods are also described.
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公开(公告)号:US20220199637A1
公开(公告)日:2022-06-23
申请号:US17125200
申请日:2020-12-17
Applicant: Micron Technology, Inc.
Inventor: Shuangqiang Luo , John D. Hopkins , Lifang Xu , Nancy M. Lomeli , Indra V. Chary , Kar Wui Thong , Shicong Wang
IPC: H01L27/11556 , H01L27/11582 , G11C5/06 , G11C5/02 , H01L21/768
Abstract: A microelectronic device comprises a stack structure comprising a vertically alternating sequence of conductive material and insulative material arranged in tiers. The stack structure has blocks separated from one another by first dielectric slot structures. Each of the blocks comprises two crest regions, a stadium structure interposed between the two crest regions in a first horizontal direction and comprising opposing staircase structures each having steps comprising edges of the tiers of the stack structure, and two bridge regions neighboring opposing sides of the stadium structure in a second horizontal direction orthogonal to the first horizontal direction and having upper surfaces substantially coplanar with upper surfaces of the two crest regions. At least one second dielectric slot structure is within horizontal boundaries of the stadium structure in the first horizontal direction and partially vertically extends through and segmenting each of the two bridge regions. Memory devices, electronic systems, and methods of forming microelectronic devices are also described.
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49.
公开(公告)号:US11217601B2
公开(公告)日:2022-01-04
申请号:US16667704
申请日:2019-10-29
Applicant: Micron Technology, Inc.
Inventor: Shuangqiang Luo , Xuan Li , Adeline Yii
IPC: H01L21/00 , H01L27/11582 , H01L27/1157 , H01L27/11556 , H01L27/11519 , H01L27/11524 , H01L27/11565
Abstract: A microelectronic device comprises a stack structure, at least one staircase structure, contact structures, and support structures. The stack structure comprises vertically alternating conductive structures and insulating structures arranged in tiers, each of the tiers individually comprising one of the conductive structures and one of the insulating structures. The at least one staircase structure is within the stack structure and has steps comprising edges of at least some of the tiers. The contact structures are on the steps of the at least one staircase structure. The support structures horizontally alternate with the contact structures in a first horizontal direction and vertically extend through the stack structure. The support structures have oblong horizontal cross-sectional shapes. Additional microelectronic devices, memory devices, and electronic systems are also described.
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公开(公告)号:US20210398997A1
公开(公告)日:2021-12-23
申请号:US16908287
申请日:2020-06-22
Applicant: Micron Technology, Inc.
Inventor: Shuangqiang Luo , Indra V. Chary , Justin B. Dorhout
IPC: H01L27/11556 , H01L23/00 , G11C5/02 , G11C5/06 , H01L21/768 , H01L27/11582 , H01L23/538
Abstract: A microelectronic device comprises a stack structure comprising alternating conductive structures and insulative structures arranged in tiers, the tiers individually comprising one of the conductive structures and one of the insulative structures, first support pillar structures extending through the stack structure within a first region of the microelectronic device, the first support pillar structures electrically isolated from a source structure underlying the stack structure, second support pillar structures extending through the stack structure within a second region of the microelectronic device, the second support pillar structures comprising an electrically conductive material in electrical communication with the source structure, and bridge structures extending between at least some neighboring first support pillar structures of the first support pillar structures. Related memory devices, electronic systems, and methods are also described.
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