公开(公告)号：US11455768B2

公开(公告)日：2022-09-27

申请号：US17111844

申请日：2020-12-04

Applicant: NVIDIA Corporation

Inventor： Greg Muthler ,  Ronald Charles Babich, Jr. ,  William Parsons Newhall, Jr. ,  Peter Nelson ,  James Robertson ,  John Burgess

IPC: G06T15/06 ,  G06F9/38 ,  G06T1/60 ,  G06N5/04 ,  G06T1/20 ,  G06T17/00

Abstract: In a ray tracer, to prevent any long-running query from hanging the graphics processing unit, a traversal coprocessor provides a preemption mechanism that will allow rays to stop processing or time out early. The example non-limiting implementations described herein provide such a preemption mechanism, including a forward progress guarantee, and additional programmable timeout options that can be time or cycle based. Those programmable options provide a means for quality of service timing guarantees for applications such as virtual reality (VR) that have strict timing requirements.

公开(公告)号：US11282261B2

公开(公告)日：2022-03-22

申请号：US16897745

申请日：2020-06-10

Applicant: NVIDIA Corporation

Inventor： Gregory Muthler ,  John Burgess ,  James Robertson ,  Magnus Andersson

IPC: G06T15/06 ,  G06T15/80 ,  G06T15/08 ,  G06T17/10 ,  G06T1/20 ,  G06F9/50 ,  G06T15/00

Abstract: Enhanced techniques applicable to a ray tracing hardware accelerator for traversing a hierarchical acceleration structure are disclosed. The traversal efficiency of such hardware accelerators are improved, for example, by transforming a ray, in hardware, from the ray's coordinate space to two or more coordinate spaces at respective points in traversing the hierarchical acceleration structure. In one example, the hardware accelerator is configured to transform a ray, received from a processor, from the world space to at least one alternate world space and then to an object space in hardware before a corresponding ray-primitive intersection results are returned to the processor. The techniques disclosed herein facilitate the use of additional coordinate spaces to orient acceleration structures in a manner that more efficiently approximate the space occupied by the underlying primitives being ray-traced.

公开(公告)号：US20210390760A1

公开(公告)日：2021-12-16

申请号：US16901847

申请日：2020-06-15

Applicant: NVIDIA Corporation

Inventor： Gregory MUTHLER ,  John Burgess

IPC: G06T15/06 ,  G06T15/08 ,  G06T17/10 ,  G06T3/40 ,  G06T9/00 ,  G06F9/50

Abstract: Ray tracing hardware accelerators supporting motion blur and moving/deforming geometry are disclosed. For example, dynamic objects in an acceleration data structure are encoded with temporal and spatial information. The hardware includes circuitry that test ray intersections against moving/deforming geometry by applying such temporal and spatial information. Such circuitry accelerates the visibility sampling of moving geometry, including rigid body motion and object deformation, and its associated moving bounding volumes to a performance similar to that of the visibility sampling of static geometry.

公开(公告)号：US11164360B2

公开(公告)日：2021-11-02

申请号：US16919700

申请日：2020-07-02

Applicant: NVIDIA Corporation

Inventor： Samuli Laine ,  Tero Karras ,  Greg Muthler ,  William Parsons Newhall ,  Ronald Charles Babich ,  Ignacio Llamas ,  John Burgess

IPC: G06T15/06 ,  G06T1/20 ,  G06T15/00

Abstract: A hardware-based traversal coprocessor provides acceleration of tree traversal operations searching for intersections between primitives represented in a tree data structure and a ray. The primitives may include opaque and alpha triangles used in generating a virtual scene. The hardware-based traversal coprocessor is configured to determine primitives intersected by the ray, and return intersection information to a streaming multiprocessor for further processing. The hardware-based traversal coprocessor is configured to provide a deterministic result of intersected triangles regardless of the order that the memory subsystem returns triangle range blocks for processing, while opportunistically eliminating alpha intersections that lie further along the length of the ray than closer opaque intersections.

公开(公告)号：US10810785B2

公开(公告)日：2020-10-20

申请号：US16101206

申请日：2018-08-10

Applicant: NVIDIA Corporation

Inventor： Greg Muthler ,  Ronald Charles Babich, Jr. ,  William Parsons Newhall, Jr. ,  Peter Nelson ,  James Robertson ,  John Burgess

IPC: G06T15/06 ,  G06T17/00 ,  G06N5/04 ,  G06F9/38 ,  G06T1/20 ,  G06T1/60 ,  G06T15/00

Abstract: In a ray tracer, to prevent any long-running query from hanging the graphics processing unit, a traversal coprocessor provides a preemption mechanism that will allow rays to stop processing or time out early. The example non-limiting implementations described herein provide such a preemption mechanism, including a forward progress guarantee, and additional programmable timeout options that can be time or cycle based. Those programmable options provide a means for quality of service timing guarantees for applications such as virtual reality (VR) that have strict timing requirements.

公开(公告)号：US20250118005A1

公开(公告)日：2025-04-10

申请号：US18911682

申请日：2024-10-10

Applicant: NVIDIA Corporation

Inventor： Greg MUTHLER ,  Tero Karras ,  Samuli Laine ,  William Parsons Newhall, JR. ,  Ronald Charles Babich, JR. ,  John Burgess ,  Ignacio Llamas

IPC: G06T15/06

Abstract: A hardware-based traversal coprocessor provides acceleration of tree traversal operations searching for intersections between primitives represented in a tree data structure and a ray. The primitives may include opaque and alpha triangles used in generating a virtual scene. The hardware-based traversal coprocessor is configured to determine primitives intersected by the ray, and return intersection information to a streaming multiprocessor for further processing. The hardware-based traversal coprocessor is configured to omit reporting of one or more primitives the ray is determined to intersect. The omitted primitives include primitives which are provably capable of being omitted without a functional impact on visualizing the virtual scene.

公开(公告)号：US12260486B2

公开(公告)日：2025-03-25

申请号：US17946828

申请日：2022-09-16

Applicant: NVIDIA Corporation

Inventor： John Burgess ,  Gregory Muthler ,  Nikhil Dixit ,  Henry Moreton ,  Yury Uralsky ,  Magnus Andersson ,  Marco Salvi ,  Christoph Kubisch

IPC: G06T15/50 ,  G06T1/60 ,  G06T9/00 ,  G06T15/00 ,  G06T15/06 ,  G06T15/40 ,  G06T17/10 ,  G06T17/20 ,  G06T19/20

Abstract: A Displaced Micro-mesh (DMM) primitive enables high complexity geometry for ray and path tracing while minimizing the associated builder costs and preserving high efficiency. A structured, hierarchical representation implicitly encodes vertex positions of a triangle micro-mesh based on a barycentric grid, and enables microvertex displacements to be encoded efficiently (e.g., as scalars linearly interpolated between minimum and maximum triangle surfaces). The resulting displaced micro-mesh primitive provides a highly compressed representation of a potentially vast number of displaced microtriangles that can be stored in a small amount of space. Improvements in ray tracing hardware permit automatic processing of such primitive for ray-geometry intersection testing by ray tracing circuits without requiring intermediate reporting to a shader.

公开(公告)号：US12249022B2

公开(公告)日：2025-03-11

申请号：US17946515

申请日：2022-09-16

Applicant: NVIDIA Corporation

Inventor： John Burgess ,  Gregory Muthler ,  Nikhil Dixit ,  Henry Moreton ,  Yury Uralsky ,  Magnus Andersson ,  Marco Salvi ,  Christoph Kubisch

IPC: G06T15/06 ,  G06T1/60 ,  G06T9/00 ,  G06T15/40 ,  G06T17/10 ,  G06T17/20 ,  G06T19/20

Abstract: A Displaced Micro-mesh (DMM) primitive enables high complexity geometry for ray and path tracing while minimizing the associated builder costs and preserving high efficiency. A structured, hierarchical representation implicitly encodes vertex positions of a triangle micro-mesh based on a barycentric grid, and enables microvertex displacements to be encoded efficiently (e.g., as scalars linearly interpolated between minimum and maximum triangle surfaces). The resulting displaced micro-mesh primitive provides a highly compressed representation of a potentially vast number of displaced microtriangles that can be stored in a small amount of space. Improvements in ray tracing hardware permit automatic processing of such primitive for ray-geometry intersection testing by ray tracing circuits without requiring intermediate reporting to a shader.

公开(公告)号：US12198255B2

公开(公告)日：2025-01-14

申请号：US18471651

申请日：2023-09-21

Applicant: NVIDIA CORPORATION

Inventor： Samuli Laine ,  Timo Aila ,  Tero Karras ,  Gregory Muthler ,  William P. Newhall, Jr. ,  Ronald C Babich, Jr. ,  Craig Kolb ,  Ignacio Llamas ,  John Burgess

IPC: G06T15/06 ,  G06T15/00 ,  G06T17/00

Abstract: Methods and systems are described in some examples for changing the traversal of an acceleration data structure in a highly dynamic query-specific manner, with each query specifying test parameters, a test opcode and a mapping of test results to actions. In an example ray tracing implementation, traversal of a bounding volume hierarchy by a ray is performed with the default behavior of the traversal being changed in accordance with results of a test performed using the test opcode and test parameters specified in the ray data structure and another test parameter specified in a node of the bounding volume hierarchy. In an example implementation a traversal coprocessor is configured to perform the traversal of the bounding volume hierarchy.

公开(公告)号：US12124378B1

公开(公告)日：2024-10-22

申请号：US18137421

申请日：2023-04-20

Applicant: NVIDIA Corporation

Inventor： Gregory A. Muthler ,  Timo Aila ,  Tero Karras ,  Samuli Laine ,  William Parsons Newhall, Jr. ,  Ronald Charles Babich, Jr. ,  John Burgess ,  Ignacio Llamas

IPC: G06F12/00 ,  G06F12/0875 ,  G06F16/901 ,  G06T15/06

CPC classification number: G06F12/0875 ,  G06F16/9027 ,  G06T15/06 ,  G06T2207/20021

Abstract: In a ray tracer, a cache for streaming workloads groups ray requests for coherent successive bounding volume hierarchy traversal operations by sending common data down an attached data path to all ray requests in the group at the same time or about the same time. Grouping the requests provides good performance with a smaller number of cache lines.