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124 条记录 (耗时 0.036 秒)

    METHODS, DEVICES, AND SYSTEMS FOR DEALING WITH THRESHOLD VOLTAGE CHANGE IN MEMORY DEVICES
    41.
    发明申请
    METHODS, DEVICES, AND SYSTEMS FOR DEALING WITH THRESHOLD VOLTAGE CHANGE IN MEMORY DEVICES 有权
    用于处理存储器件中阈值电压变化的方法，器件和系统

    公开(公告)号：US20120069658A1

    公开(公告)日：2012-03-22

    申请号：US13305164

    申请日：2011-11-28

    申请人： Zhenlei Shen ,  William H. Radke ,  Peter Feeley

    发明人： Zhenlei Shen ,  William H. Radke ,  Peter Feeley

    IPC分类号： G11C16/26 ,  G11C16/06

    CPC分类号： G11C16/34 ,  G11C11/5642 ,  G11C16/26 ,  G11C16/3495

    摘要： The present disclosure includes methods, devices, and systems for dealing with threshold voltage change in memory devices. A number of embodiments include an array of memory cells and control circuitry having sense circuitry coupled to the array. The control circuitry is configured to determine changes in threshold voltages (Vts) associated with the memory cells without using a reference cell, and adjust the sense circuitry based on the determined changes and without using a reference cell.

    摘要翻译： 本公开包括用于处理存储器件中的阈值电压变化的方法，装置和系统。 多个实施例包括具有耦合到阵列的感测电路的存储器单元阵列和控制电路。 控制电路被配置为确定与存储器单元相关联的阈值电压（Vts）的变化而不使用参考单元，并且基于所确定的变化并且不使用参考单元来调整感测电路。

    Methods, devices, and systems for dealing with threshold voltage change in memory devices
    42.
    发明授权
    Methods, devices, and systems for dealing with threshold voltage change in memory devices 有权
    用于处理存储器件中阈值电压变化的方法，器件和系统

    公开(公告)号：US08077515B2

    公开(公告)日：2011-12-13

    申请号：US12547280

    申请日：2009-08-25

    申请人： Zhenlei Shen ,  William H. Radke ,  Peter Feeley

    发明人： Zhenlei Shen ,  William H. Radke ,  Peter Feeley

    IPC分类号： G11C16/06

    CPC分类号： G11C16/34 ,  G11C11/5642 ,  G11C16/26 ,  G11C16/3495

    摘要： The present disclosure includes methods, devices, and systems for dealing with threshold voltage change in memory devices. A number of embodiments include an array of memory cells and control circuitry having sense circuitry coupled to the array. The control circuitry is configured to determine changes in threshold voltages (Vts) associated with the memory cells without using a reference cell, and adjust the sense circuitry based on the determined changes and without using a reference cell.

    摘要翻译： 本公开包括用于处理存储器件中的阈值电压变化的方法，装置和系统。 多个实施例包括具有耦合到阵列的感测电路的存储器单元阵列和控制电路。 控制电路被配置为确定与存储器单元相关联的阈值电压（Vts）的变化而不使用参考单元，并且基于所确定的变化并且不使用参考单元来调整感测电路。

    Data conditioning to improve flash memory reliability
    44.
    发明授权
    Data conditioning to improve flash memory reliability 有权
    数据调理提高闪存的可靠性

    公开(公告)号：US08762629B2

    公开(公告)日：2014-06-24

    申请号：US13616486

    申请日：2012-09-14

    申请人： William H. Radke ,  Vishal Sarin ,  Jung-Sheng Hoei

    发明人： William H. Radke ,  Vishal Sarin ,  Jung-Sheng Hoei

    IPC分类号： G06F13/00 ,  G06F13/28

    CPC分类号： G06F11/1072 ,  G06F12/0246 ,  G06F2212/7205 ,  G06F2212/7208 ,  G11C11/5628 ,  G11C29/52 ,  G11C2211/5641

    摘要： Methods and apparatus for managing data storage in memory devices utilizing memory arrays of varying density memory cells. Data can be initially stored in lower density memory. Data can be further read, compacted, conditioned and written to higher density memory as background operations. Methods of data conditioning to improve data reliability during storage to higher density memory and methods for managing data across multiple memory arrays are also disclosed.

    摘要翻译： 用于利用不同密度存储单元的存储器阵列来管理存储器件中的数据存储的方法和装置。 数据最初可以存储在较低密度的存储器中。 可以将数据进一步读取，压缩，调节并写入高密度存储器作为后台操作。 还公开了用于在存储到更高密度存储器期间提高数据可靠性的数据调节方法以及用于跨多个存储器阵列管理数据的方法。

    Methods of data handling
    46.
    发明授权
    Methods of data handling 有权
    数据处理方法

    公开(公告)号：US08510634B2

    公开(公告)日：2013-08-13

    申请号：US13371683

    申请日：2012-02-13

    申请人： Brady L. Keays ,  Shuba Swaminathan ,  William H. Radke

    发明人： Brady L. Keays ,  Shuba Swaminathan ,  William H. Radke

    IPC分类号： G11C29/00

    CPC分类号： G06F11/10 ,  G06F11/1048 ,  H03M13/132 ,  H03M13/1515

    摘要： Methods include receiving data and an ECC code read from a memory array, generating an ECC code from the received data, and determining whether the received data is corrupted by evaluating the generated ECC code against the ECC code read from the memory array. If the received data is determined to be corrupted, a correction algorithm and a recorded likely state of a known bad/questionable bit of the received data may be used to correct error in the received data. Alternatively, if the received data is determined to be corrupted, the correction algorithm and a recorded location of a known bad/questionable bit of the received data may be used to correct error in the received data.

    摘要翻译： 方法包括从存储器阵列接收数据和从其读取的ECC代码，从接收到的数据生成ECC代码，并且通过根据从存储器阵列读取的ECC代码评估所生成的ECC代码来确定接收的数据是否被破坏。 如果接收到的数据被确定为被破坏，则可以使用接收到的数据的已知的坏/可疑比特的校正算法和记录的可能状态来校正接收到的数据中的错误。 或者，如果接收到的数据被确定为已被破坏，则可以使用校正算法和接收到的数据的已知坏/可疑位的记录位置来校正接收到的数据中的错误。

    Error recovery storage along a memory string
    47.
    发明授权
    Error recovery storage along a memory string 有权

    公开(公告)号：US08468415B2

    公开(公告)日：2013-06-18

    申请号：US13570180

    申请日：2012-08-08

    申请人： William H. Radke

    发明人： William H. Radke

    IPC分类号： G11C29/00

    CPC分类号： G06F11/1008 ,  G06F11/1072 ,  H03M13/256 ,  H03M13/2909

    摘要： Apparatus and methods store error recovery data in different dimensions of a memory array. For example, in one dimension, block error correction codes (ECC) are used, and in another dimension, supplemental error correction codes, such as convolutional codes, are used. By using separate dimensions, the likelihood that a defect affects both error recovery techniques is lessened, thereby increasing the probability that error recovery can be performed successfully. In one example, block error correction codes are used for data stored along rows, and this data is stored in one level of multiple-level cells of the array. Supplemental error correction codes are used for data stored along columns, such as along the cells of a string, and the supplemental error correction codes are stored in a different level than the error correction codes.

    Variable sector-count ECC
    48.
    发明授权
    Variable sector-count ECC 有权
    可变扇区数ECC

    公开(公告)号：US08381076B2

    公开(公告)日：2013-02-19

    申请号：US12897260

    申请日：2010-10-04

    申请人： William H. Radke

    发明人： William H. Radke

    IPC分类号： G11C29/00

    CPC分类号： H03M13/05 ,  G06F11/1068

    摘要： Improved memory devices, circuitry, and data methods are described that facilitate the detection and correction of data in memory systems or devices by increasing the data area of user data being covered by the ECC code. This averages any possible bit errors over a larger data area and allows a greater number of errors to be corrected by a combining the ECC codes in the coverage area without substantially changing the overall size of ECC codes being stored over a single sector approach. In one embodiment of the present invention, the size of the data block utilized for ECC coverage is variable and can be selected such that differing areas of the memory array or data types can have a differing ECC data coverage sizes. It is also noted that the ECC algorithm, math base or encoding scheme can also be varied between these differing areas of the memory array.

    摘要翻译： 描述了改进的存储器件，电路和数据方法，其通过增加由ECC代码覆盖的用户数据的数据区域来促进对存储器系统或器件中的数据的检测和校正。 这样可以在更大的数据区域上平均任何可能的位错误，并且允许通过组合覆盖区域中的ECC码来校正更多数量的错误，而不会基本上改变通过单个扇区方法存储的ECC码的总体大小。 在本发明的一个实施例中，用于ECC覆盖的数据块的大小是可变的，并且可以选择使得存储器阵列或数据类型的不同区域可以具有不同的ECC数据覆盖尺寸。 还应注意的是，ECC算法，数学基础或编码方案也可以在存储器阵列的这些不同区域之间变化。

    Error recovery storage along a nand-flash string
    50.
    发明授权
    Error recovery storage along a nand-flash string 有权
    沿着nand-flash字符串的恢复存储错误

    公开(公告)号：US08245100B2

    公开(公告)日：2012-08-14

    申请号：US13267262

    申请日：2011-10-06

    申请人： William H. Radke

    发明人： William H. Radke

    IPC分类号： H03M13/00

    CPC分类号： G06F11/1008 ,  G06F11/1072 ,  H03M13/256 ,  H03M13/2909

    摘要： Apparatus and methods store error recovery data in different dimensions of a memory array. For example, in one dimension, block error correction codes (ECC) are used, and in another dimension, supplemental error correction codes, such as convolutional codes, are used. By using separate dimensions, the likelihood that a defect affects both error recovery techniques is lessened, thereby increasing the probability that error recovery can be performed successfully. In one example, block error correction codes are used for data stored along rows, and this data is stored in one level of multiple-level cells of the array. Supplemental error correction codes are used for data stored along columns, such as along the cells of a string, and the supplemental error correction codes are stored in a different level than the error correction codes.

    摘要翻译： 设备和方法存储存储器阵列的不同维度的错误恢复数据。 例如，在一个维度中，使用块纠错码（ECC），并且在另一维度中，使用补码纠错码，例如卷积码。 通过使用单独的维度，缺陷影响两种错误恢复技术的可能性减弱，从而增加了可以成功执行错误恢复的概率。 在一个示例中，块错误校正码用于沿着行存储的数据，并且该数据被存储在阵列的多级单元中。 补充纠错码用于沿列存储的数据，例如沿着字符串的单元格，并且补充纠错码存储在与纠错码不同的电平上。