Multi-level multiprocessor speculation mechanism
    41.
    发明授权
    Multi-level multiprocessor speculation mechanism 有权
    多级多处理器推测机制

    公开(公告)号:US06748518B1

    公开(公告)日:2004-06-08

    申请号:US09588483

    申请日:2000-06-06

    IPC分类号: G06F930

    摘要: Disclosed is a processor, which reduces issuing of unnecessary barrier operations during instruction processing. The processor comprises an instruction sequencing unit and a load store unit (LSU) that issues a group of memory access requests that precede a barrier instruction in an instruction sequence. The processor also includes a controller, which in response to a determination that all of the memory access requests hit in a cache affiliated with the processor, withholds issuing on an interconnect a barrier operation associated with the barrier instruction. The controller further directs the load store unit to ignore the barrier instruction and complete processing of a next group of memory access requests following the barrier instruction in the instruction sequence without receiving an acknowledgment.

    摘要翻译: 公开了一种处理器,其减少在指令处理期间发出不必要的屏障操作。 处理器包括指令排序单元和负载存储单元(LSU),其发出在指令序列中的屏障指令之前的一组存储器访问请求。 处理器还包括控制器,其响应于确定在处理器附属的高速缓存中的所有存储器访问请求,在互连上保留与屏障指令相关联的屏障操作。 控制器进一步引导加载存储单元忽略屏障指令,并且在指令序列中的屏障指令之后的下一组存储器访问请求完成处理而不接收到确认。

    Multiprocessor speculation mechanism with imprecise recycling of storage operations
    42.
    发明授权
    Multiprocessor speculation mechanism with imprecise recycling of storage operations 有权
    多处理器推测机制,存储操作不正确的回收

    公开(公告)号:US06606702B1

    公开(公告)日:2003-08-12

    申请号:US09588606

    申请日:2000-06-06

    IPC分类号: G06F9312

    摘要: Disclosed is a method of operating a processor, by which a speculatively issued load request, which fetches incorrect data, is recycled. An instruction sequence, which includes a barrier instruction and a load instruction that follows the barrier instruction in program order, is received for execution. In response to the barrier instruction, a barrier operation is issued on an interconnect. Following, in response to the load instruction and while the barrier operation is pending, a load request is issued to memory. When a pre-determined type of invalidate, which is affiliated with the load request, is received before the receipt of an acknowledgment for the barrier operation, data that is returned by memory in response to the load request is discarded and the load request is re-issued. The pre-determined type of invalidate includes, for example, a snoop invalidate.

    摘要翻译: 公开了一种操作处理器的方法,通过该方法,回收了推测性发出的载入请求,其提取不正确的数据。 接收指令序列,其中包括按程序顺序跟随障碍指令的障碍指令和加载指令,以执行。 响应于屏障指令,在互连上发出屏障操作。 接下来,响应于加载指令,并且当屏障操作正在等待时,向存储器发出加载请求。 当在接收到屏障操作的确认之前接收到与加载请求相关联的预定类型的无效时,丢弃由存储器响应于加载请求而返回的数据,并且重新加载请求 -发行。 预定类型的无效包括例如窥探无效。

    Method and apparatus for executing multiply-initiated, multiply-sourced variable delay system bus operations
    43.
    发明授权
    Method and apparatus for executing multiply-initiated, multiply-sourced variable delay system bus operations 失效
    用于执行多重启动的多来源可变延迟系统总线操作的方法和装置

    公开(公告)号:US06314495B1

    公开(公告)日:2001-11-06

    申请号:US09004144

    申请日:1998-01-07

    IPC分类号: G06F1200

    CPC分类号: G06F9/524 G06F12/0831

    摘要: The present invention is a method and apparatus for preventing the occurrence of deadlocks from the execution of multiply-initiated multiply-sourced variable delay system bus operations. In general, each snooper excepts a given operation at the same time according to an agreed upon condition. In other words, the snooper in a given cache can accept an operation and begin working on it even while retrying the operation. Furthermore, none of the active snoopers release an operation until all the active snoopers are done with the operation. In other words, execution of a given operation is started by the snoopers at the same time and finished by each of the snoopers at the same time. This prevents the ping-pong deadlock by keeping any one cache from finishing the operation before any of the others.

    摘要翻译: 本发明是一种用于防止从多次发起的多来源可变延迟系统总线操作的执行中发生死锁的方法和装置。 一般来说,每个窥探者除了按照约定的条件同时给定操作。 换句话说,即使在重试操作时,给定缓存中的监听器也可以接受操作并开始处理。 此外,没有一个主动侦听器释放一个操作,直到所有的主动侦听器都完成了操作。 换句话说,给定操作的执行由窥探者同时开始,同时由每个窥探者完成。 这可以防止乒乓的死锁,因为任何一个缓存都不会在其他任何缓存之前完成操作。

    Eviction override for larx-reserved addresses
    44.
    发明授权
    Eviction override for larx-reserved addresses 失效
    撤销覆盖larx保留地址

    公开(公告)号:US06212605B1

    公开(公告)日:2001-04-03

    申请号:US08829577

    申请日:1997-03-31

    IPC分类号: G06F1200

    CPC分类号: G06F12/126

    摘要: A method of controlling eviction of cache blocks to override eviction of a value which is reserved for a later operation. When a value is loaded into a cache of the processor and is reserved using a lwarx instruction, it sometimes is evicted from the cache due to the need to store other values in the cache set that the value is mapped to. The present invention provides a method of overriding eviction of reserved values by evicting a selected block of the cache which is a block other than the block containing the reserved value. The reserved value is indicated as being reserved by loading a memory address associated with the value into a reservation unit of the cache, and making a reservation flag in the reservation unit active. In two alternative implementations, the eviction mechanism selects a tentative block for eviction and then determines whether the tentative block is the same as the reserved block (and, if so, chooses a different block for the selected block), or preemptively prohibits the reserved block from being chosen as the selected block. The method of the present invention can be implemented with different types of cache replacement controls, e.g., a random mechanism or a least recently used mechanism.

    摘要翻译: 控制高速缓存块的驱逐的方法,以覆盖为稍后的操作保留的值的驱逐。 当值被加载到处理器的高速缓存中并且使用lwarx指令保留时,由于需要在值映射到的高速缓存集中存储其他值,有时它会从缓存中逐出。 本发明提供一种通过逐出除了包含保留值的块之外的块的高速缓存的选定块来覆盖预留值的方法。 保留值被指示为通过将与该值相关联的存储器地址加载到高速缓存的预留单元中而保留,并且使预约单元中的预留标志成为活动状态。 在两个替代实施方案中,驱逐机制选择用于逐出的临时块,然后确定临时块是否与保留块相同(并且如果是,则为所选块选择不同的块),或者先预先禁止保留块 从被选择为所选块。 本发明的方法可以用不同类型的高速缓存替换控制来实现,例如随机机制或最近最少使用的机制。

    Method and apparatus for executing variable delay system bus operations of differing type or character without dead lock using shared buffers
    45.
    发明授权
    Method and apparatus for executing variable delay system bus operations of differing type or character without dead lock using shared buffers 失效
    用于使用共享缓冲器执行不同类型或字符的可变延迟系统总线操作而无死锁的方法和装置

    公开(公告)号:US06202131B1

    公开(公告)日:2001-03-13

    申请号:US09004147

    申请日:1998-01-07

    IPC分类号: G06F1300

    CPC分类号: G06F12/0831

    摘要: A method and apparatus for preventing the occurrence of deadlocks from the execution of variable delay system bus operations. In general, each snooper excepts a given operation at the same time according to an agreed upon condition. In other words, the snooper in a given cache can accept an operation and begin working on it even while retrying the operation. Furthermore, none of the active snoopers release an operation until all the active snoopers are done with the operation. Execution of a given operation is started by the snoopers at the same time and finished by each of the snoopers at the same time. This prevents the ping-pong deadlock by keeping any one cache from finishing the operation before any of the others. The snoopers initiate operations at the same time based upon a common predefined event and ensure the operations end are finished concurrently when no outstanding retry operations are detected.

    摘要翻译: 一种用于防止从可变延迟系统总线操作的执行中发生死锁的方法和装置。 一般来说,每个窥探者除了按照约定的条件同时给定操作。 换句话说,即使在重试操作时,给定缓存中的监听器也可以接受操作并开始处理。 此外,没有一个主动侦听器释放一个操作,直到所有的主动侦听器都完成了操作。 给定操作的执行由窥探者同时开始,同时由每个窥探者完成。 这可以防止乒乓的死锁,因为任何一个缓存都不会在其他任何缓存之前完成操作。 侦听器基于公共预定义事件同时启动操作,并确保在没有检测到未完成的重试操作时同时完成操作结束。

    Method and apparatus for executing unresolvable system bus operations
    46.
    发明授权
    Method and apparatus for executing unresolvable system bus operations 失效
    执行无法解决的系统总线操作的方法和装置

    公开(公告)号:US06192453B1

    公开(公告)日:2001-02-20

    申请号:US09114186

    申请日:1998-07-13

    IPC分类号: G06F1342

    CPC分类号: G06F12/0831

    摘要: A method and apparatus for preventing the occurrence of deadlocks from the execution of unresolvable system bus operations. In general, each snooper speculatively accepts a given operation when it has a snoop buffer available. However, rather than unconditionally processing the operation, the snooper waits to determine if another participant retried the operation due to unavailability of a snoop buffer. If some snooping participant retrys an operation, all snoopers that speculatively accepted an operation for processing abandon said operation. If no snooping participant retrys the operation, sufficient snooping resources were available for all necessary caches to begin processing the operation and the initiator can consider the operation completed. In other words, no operation is processed until all the necessary snooping resources are available to accept the operation. This prevents the system from getting into the ping-pong deadlock. Snoopers can safely assume that each presentation of an operation must be propagated and that no operation will have been fully or partially processed by some other snooper. The operation cannot proceed until all of the available resources are available and once available, the operation is propagated only once by those snooping resources.

    摘要翻译: 一种用于防止从不可解决的系统总线操作的执行中发生死锁的方法和装置。 一般来说,每个窥探者在有一个snoop缓冲区可用时推测接受给定的操作。 然而,snooper不是无条件地处理这个操作,而是等待确定另一个参与者是否因侦听缓冲区不可用而重试操作。 如果一些侦听参与者重新开始一个操作,那么推测接受处理操作的所有窥探者都放弃了操作。 如果没有侦听参与者重新启动该操作,则可以使用足够的侦听资源进行所有必要的缓存,开始处理操作,启动器可以考虑完成该操作。 换句话说,在所有必需的窥探资源都可用于接受操作之前,不会处理任何操作。 这样可以防止系统进入乒乓僵死。 侦听器可以安全地假定每个演示的操作必须被传播,并且任何操作都不会被其他侦听器完全或部分地处理。 在所有可用资源可用并且一旦可用之前,该操作将无法继续,该操作仅被这些监听资源传播一次。

    Demand-based issuance of cache operations to a system bus
    47.
    发明授权
    Demand-based issuance of cache operations to a system bus 失效
    基于需求的缓存操作向系统总线发出

    公开(公告)号:US06182201B2

    公开(公告)日:2001-01-30

    申请号:US08834116

    申请日:1997-04-14

    IPC分类号: G06F1200

    CPC分类号: G06F12/0831 G06F12/0815

    摘要: A method of managing and speculatively issuing architectural operations in a computer system is disclosed. A first architectural operation at a first coherency granule size is issued and translated into a large-scale architectural operation. The first architectural operation can be a first cache instruction directed to a memory block, and the translating results in a page-level cache instruction being issued which is directed to a page that includes the memory block. The large-scale architectural operation is transmitted to a system bus of the computer system. A system bus history table may be used to store a record of the large-scale architectural operations. The history table then can be used to filter out any later architectural operation that is subsumed by the large-scale architectural operation. The history table monitors the computer system to ensure that the large-scale architectural operations recorded in the table are still valid.

    摘要翻译: 公开了一种在计算机系统中管理和推测发布架构操作的方法。 第一个相干性粒度大小的第一个架构操作被发布并转换成大规模的架构操作。 第一架构操作可以是针对存储器块的第一高速缓存指令,并且翻译导致正在发布的页级缓存指令被引导到包括该存储器块的页面。 大型架构操作被传送到计算机系统的系统总线。 可以使用系统总线历史表来存储大型建筑操作的记录。 历史表然后可以用于过滤掉大规模架构操作所包含的任何后来的架构操作。 历史表监视计算机系统,以确保表中记录的大型架构操作仍然有效。

    Demand-based issuance of cache operations to a processor bus
    48.
    发明授权
    Demand-based issuance of cache operations to a processor bus 失效
    基于需求的缓存操作向处理器总线发布

    公开(公告)号:US06173371B2

    公开(公告)日:2001-01-09

    申请号:US08834113

    申请日:1997-04-14

    IPC分类号: G06F1200

    CPC分类号: G06F12/0831

    摘要: A method of managing and speculatively issuing architectural operations in a computer system. A first architectural operation is snooped and translated into a plurality of granular architectural operations to effect a large-scale architectural operation. The first architectural operation can be a first cache instruction directed to a memory block, and a plurality of cache instructions are issued which are directed to memory blocks contained in a page associated with the memory block. The granular architectural operations are transmitted to a processor bus of the computer system. A processor bus history table may be used to store a record of the large-scale architectural operation. The history table then can filter out any later architectural operation that is subsumed by the large-scale architectural operation. The history table monitors the processor bus to ensure that the large-scale architectural operations recorded in the table are still valid.

    摘要翻译: 一种在计算机系统中管理和推测性地发布架构操作的方法。 第一个架构操作被窥探并转换成多个细粒度的架构操作,以实现大规模的架构操作。 第一架构操作可以是针对存储器块的第一高速缓存指令,并且发出指向包含在与存储器块相关联的页面中的存储器块的多个高速缓存指令。 粒度结构操作被传送到计算机系统的处理器总线。 处理器总线历史表可以用于存储大型建筑操作的记录。 历史表然后可以过滤掉大型建筑操作所包含的任何后来的建筑操作。 历史表监视处理器总线,以确保表中记录的大型架构操作仍然有效。

    Method and apparatus for executing self-snooped unresolvable system bus
operations
    49.
    发明授权
    Method and apparatus for executing self-snooped unresolvable system bus operations 失效
    执行自我侦测的无法解决的系统总线操作的方法和装置

    公开(公告)号:US6141714A

    公开(公告)日:2000-10-31

    申请号:US114209

    申请日:1998-07-13

    IPC分类号: G06F9/46 G06F12/08 G06F13/00

    摘要: A method and apparatus for preventing the occurrence of deadlocks from the execution of unresolvable system bus operations. In general, each snooper speculatively accepts a given operation when it has a snoop buffer available. However, rather than unconditionally processing the operation, the snooper waits to determine if another participant retried the operation due to unavailability of a snoop buffer. If some snooping participant retrys an operation, all snoopers that speculatively accepted an operation for processing abandon said operation. If no snooping participant retrys the operation, sufficient snooping resources were available for all necessary caches to begin processing the operation and the initiator can consider the operation completed. In other words, no operation is processed until all the necessary snooping resources are available to accept the operation. This prevents the system from getting into the ping-pong deadlock. Snoopers can safely assume that each presentation of an operation must be propagated and that no operation will have been fully or partially processed by some other snooper. The operation cannot proceed until all of the available resources are available and once available, the operation is propagated only once by those snooping resources.

    摘要翻译: 一种用于防止从不可解决的系统总线操作的执行中发生死锁的方法和装置。 一般来说,每个窥探者在有一个snoop缓冲区可用时推测接受给定的操作。 然而,snooper不是无条件地处理这个操作,而是等待确定另一个参与者是否因侦听缓冲区不可用而重试操作。 如果一些侦听参与者重新开始一个操作,那么推测接受处理操作的所有窥探者都放弃了操作。 如果没有侦听参与者重新启动该操作,则可以使用足够的侦听资源进行所有必要的缓存,开始处理操作,启动器可以考虑完成该操作。 换句话说,在所有必需的窥探资源都可用于接受操作之前,不会处理任何操作。 这样可以防止系统进入乒乓僵死。 侦听器可以安全地假定每个演示的操作必须被传播,并且任何操作都不会被其他侦听器完全或部分地处理。 在所有可用资源可用并且一旦可用之前,该操作将无法继续,该操作仅被这些监听资源传播一次。