公开(公告)号：US09660098B2

公开(公告)日：2017-05-23

申请号：US14883732

申请日：2015-10-15

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Sachiaki Tezuka ,  Tetsuhiro Tanaka ,  Toshihiko Takeuchi ,  Hideomi Suzawa ,  Suguru Hondo

IPC: H01L29/786 ,  H01L29/66 ,  H01L21/28 ,  H01L21/8234 ,  H01L29/78 ,  H01L29/49 ,  H01L21/8238 ,  H01L29/10 ,  H01L29/423

CPC classification number: H01L29/7869 ,  H01L21/28185 ,  H01L21/28194 ,  H01L21/823462 ,  H01L21/823857 ,  H01L29/1054 ,  H01L29/42384 ,  H01L29/4908 ,  H01L29/66765 ,  H01L29/66969 ,  H01L29/78

Abstract: Stable electrical characteristics and high reliability are provided for a miniaturized semiconductor device including an oxide semiconductor, and the semiconductor device is manufactured. The semiconductor device includes a base insulating layer; an oxide stack which is over the base insulating layer and includes an oxide semiconductor layer; a source electrode layer and a drain electrode layer over the oxide stack; a gate insulating layer over the oxide stack, the source electrode layer, and the drain electrode layer; a gate electrode layer over the gate insulating layer; and an interlayer insulating layer over the gate electrode layer. In the semiconductor device, the defect density in the oxide semiconductor layer is reduced.

公开(公告)号：US09443990B2

公开(公告)日：2016-09-13

申请号：US14464966

申请日：2014-08-21

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Kiyoshi Kato ,  Yasuhiko Takemura ,  Tetsuhiro Tanaka ,  Takayuki Inoue ,  Toshihiko Takeuchi ,  Yasumasa Yamane ,  Shunpei Yamazaki

IPC: H03K19/003 ,  H01L21/324 ,  H01L29/792 ,  H01L21/28 ,  H01L29/423 ,  H01L29/66 ,  G11C16/04 ,  H01L27/12 ,  H03K19/00 ,  H03K19/177

CPC classification number: H01L29/792 ,  G11C16/0466 ,  H01L21/28282 ,  H01L27/1225 ,  H01L29/4234 ,  H01L29/66833 ,  H03K19/0013 ,  H03K19/17736

Abstract: A manufacturing method of a semiconductor device in which the threshold is adjusted is provided. In a semiconductor device including a plurality of transistors arranged in a matrix each including a semiconductor, a source or drain electrode electrically connected to the semiconductor, a gate electrode, and a charge trap layer between the gate electrode and the semiconductor, electrons are trapped in the charge trap layer by performing heat treatment and, simultaneously, keeping a potential of the gate electrode higher than that of the source or drain electrode for 1 second or more. By this process, the threshold increases and Icut decreases. A circuit that supplies a signal to the gate electrode (e.g., word line driver) is provided with a selection circuit formed of an OR gate, an XOR gate, or the like, whereby potentials of word lines can be simultaneously set higher than potentials of bit lines.

Abstract translation: 提供了其中调整阈值的半导体器件的制造方法。 在包括以矩阵形式排列的多个晶体管的半导体器件中，每个晶体管包括半导体，与该半导体电连接的源极或漏极，栅电极和栅电极与半导体之间的电荷陷阱层，电子被俘获在 通过进行热处理，同时使栅电极的电位比源极或漏极的电位高1秒以上。 通过该过程，阈值增加并且Icut减小。 向门电极（例如字线驱动器）提供信号的电路设置有由或门，异或门等形成的选择电路，由此可以将字线的电位同时设置为高于电位 位线。

公开(公告)号：US09263514B2

公开(公告)日：2016-02-16

申请号：US14486179

申请日：2014-09-15

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Tetsuhiro Tanaka ,  Toshihiko Takeuchi ,  Yasumasa Yamane

IPC: H01L21/8234 ,  H01L29/06 ,  H01L29/12

Abstract: Provided is a semiconductor device having a structure with which a decrease in electrical characteristics that becomes more significant with miniaturization can be suppressed. The semiconductor device includes a first oxide semiconductor film, a gate electrode overlapping with the first oxide semiconductor film, a first gate insulating film between the first oxide semiconductor film and the gate electrode, and a second gate insulating film between the first gate insulating film and the gate electrode. In the first gate insulating film, a peak appears at a diffraction angle 2θ of around 28° by X-ray diffraction. A band gap of the first oxide semiconductor film is smaller than a band gap of the first gate insulating film, and the band gap of the first gate insulating film is smaller than a band gap of the second gate insulating film.

公开(公告)号：US20140170500A1

公开(公告)日：2014-06-19

申请号：US14187574

申请日：2014-02-24

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Teppei OGUNI ,  Takeshi Osada ,  Toshihiko Takeuchi

IPC: H01M4/583

CPC classification number: H01M4/583 ,  H01B1/04 ,  H01M4/133 ,  H01M4/134 ,  H01M4/1393 ,  H01M4/1395 ,  H01M4/386 ,  H01M4/587 ,  H01M4/626

Abstract: An electrode for a power storage device with good cycle characteristics and high charge/discharge capacity is provided. In addition, a power storage device including the electrode is provided. The electrode for the power storage device includes a conductive layer and an active material layer provided over the conductive layer, the active material layer includes graphene and an active material including a plurality of whiskers, and the graphene is provided to be attached to a surface portion of the active material including a plurality of whiskers and to have holes in part of the active material layer. Further, in the electrode for the power storage device, the graphene is provided to be attached to a surface portion of the active material including a plurality of whiskers and to cover the active material including a plurality of whiskers. Further, the power storage device including the electrode is manufactured.

Abstract translation: 提供具有良好的循环特性和高充电/放电容量的蓄电装置用电极。 另外，提供了包括电极的蓄电装置。 用于蓄电装置的电极包括导电层和设置在导电层上的活性材料层，活性材料层包括石墨烯和包括多个晶须的活性材料，并且石墨烯被提供以附接到表面部分 的活性材料包括多个晶须并且在活性材料层的一部分中具有孔。 此外，在蓄电装置用电极中，设置石墨烯，附着于包含多个晶须的活性物质的表面部分，并覆盖包含多个晶须的活性物质。 此外，制造包括电极的蓄电装置。

公开(公告)号：US20140106502A1

公开(公告)日：2014-04-17

申请号：US14047639

申请日：2013-10-07

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Sachiaki Tezuka ,  Tetsuhiro Tanaka ,  Toshihiko Takeuchi ,  Hideomi Suzawa ,  Suguru Hondo

IPC: H01L29/66

CPC classification number: H01L29/7869 ,  H01L21/28185 ,  H01L21/28194 ,  H01L21/823462 ,  H01L21/823857 ,  H01L29/1054 ,  H01L29/42384 ,  H01L29/4908 ,  H01L29/66765 ,  H01L29/66969 ,  H01L29/78

Abstract: Stable electrical characteristics and high reliability are provided for a miniaturized semiconductor device including an oxide semiconductor, and the semiconductor device is manufactured. The semiconductor device includes a base insulating layer; an oxide stack which is over the base insulating layer and includes an oxide semiconductor layer; a source electrode layer and a drain electrode layer over the oxide stack; a gate insulating layer over the oxide stack, the source electrode layer, and the drain electrode layer; a gate electrode layer over the gate insulating layer; and an interlayer insulating layer over the gate electrode layer. In the semiconductor device, the defect density in the oxide semiconductor layer is reduced.

Abstract translation: 为包括氧化物半导体的小型半导体器件提供稳定的电特性和高可靠性，并且制造半导体器件。 半导体器件包括基极绝缘层; 氧化物堆叠，其在所述基底绝缘层上方并且包括氧化物半导体层; 氧化层上的源电极层和漏电极层; 氧化层上的栅极绝缘层，源电极层和漏电极层; 栅绝缘层上的栅电极层; 以及在栅电极层上的层间绝缘层。 在半导体器件中，氧化物半导体层中的缺陷密度降低。