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93 条记录 (耗时 0.036 秒)

    Vibration actuator
    41.
    发明授权
    Vibration actuator 失效
    振动执行器

    公开(公告)号：US07606386B2

    公开(公告)日：2009-10-20

    申请号：US11105502

    申请日：2005-04-14

    申请人： Dae Lyun Kang ,  Dai Gil Lee ,  Sang Wook Park ,  Hak Sung Kim ,  Seuk Hwan Chung ,  Seong Geun Kim ,  Sang Won Kim ,  Jun Kun Choi

    发明人： Dae Lyun Kang ,  Dai Gil Lee ,  Sang Wook Park ,  Hak Sung Kim ,  Seuk Hwan Chung ,  Seong Geun Kim ,  Sang Won Kim ,  Jun Kun Choi

    IPC分类号： H04R1/00

    CPC分类号： B06B1/045

    摘要： A vibration actuator excites a mass member by interaction between an electric field of a vibration coil provided in an inner space of a case and a magnetic field of a magnetic field unit disposed corresponding to the vibration coil. The vibration actuator has an elastic wire having a wire body fixed to the outer surface of the mass member and elastic ends fixed to the inner surface of the case. The elastic wire is connected between the case and the mass member for elastically supporting mass member.

    摘要翻译： 振动执行器通过设置在壳体的内部空间中的振动线圈的电场与对应于振动线圈设置的磁场单元的磁场之间的相互作用来激励质量构件。 振动致动器具有弹性线，其具有固定到质量构件的外表面的线体，并且弹性端固定到壳体的内表面。 弹性线连接在壳体和质量构件之间，用于弹性支撑质量构件。

    Flash memory device having resistivity measurement pattern and method of forming the same
    42.
    发明授权
    Flash memory device having resistivity measurement pattern and method of forming the same 有权
    具有电阻率测量图案的闪存器件及其形成方法

    公开(公告)号：US07439131B2

    公开(公告)日：2008-10-21

    申请号：US11164677

    申请日：2005-12-01

    申请人： Ki Hong Yang ,  Sang Wook Park

    发明人： Ki Hong Yang ,  Sang Wook Park

    IPC分类号： H01L21/336

    CPC分类号： H01L27/11541 ,  H01L27/105 ,  H01L27/11526

    摘要： A flash memory device has a resistivity measurement pattern and method of forming the same. A trench is formed in an isolation film in a Self-Aligned Floating Gate (SAFG) scheme. The trench is buried to form a resistivity measurement floating gate. This allows the resistivity of the floating gate to be measured even in the SAFG scheme. Contacts for resistivity measurement are directly connected to the resistivity measurement floating gate. Therefore, variation in resistivity measurement values, which is incurred by the parasitic interface, can be reduced.

    摘要翻译： 闪速存储器件具有电阻率测量图案及其形成方法。 在自对准浮动门（SAFG）方案中的隔离膜中形成沟槽。 埋入沟槽以形成电阻率测量浮栅。 这允许甚至在SAFG方案中测量浮动栅极的电阻率。 用于电阻率测量的触点直接连接到电阻率测量浮栅。 因此，可以减少由寄生接口引起的电阻率测量值的变化。

    MOUSE INTERFACE APPARATUS USING CAMERA, SYSTEM AND METHOD USING THE SAME, AND COMPUTER RECORDABLE MEDIUM FOR IMPLEMENTING THE SAME
    44.
    发明申请
    MOUSE INTERFACE APPARATUS USING CAMERA, SYSTEM AND METHOD USING THE SAME, AND COMPUTER RECORDABLE MEDIUM FOR IMPLEMENTING THE SAME 审中-公开
    使用相机的系统和方法的鼠标接口装置和用于实现相机的计算机可记录介质

    公开(公告)号：US20080062124A1

    公开(公告)日：2008-03-13

    申请号：US11618809

    申请日：2006-12-30

    申请人： Jae Hean Kim ,  Chang Joon Park ,  Hongseok Kim ,  Jung Jae Yu ,  Sang Wook Park ,  Hye Mi Kim ,  Jae Kwang Lee ,  In Ho Lee

    发明人： Jae Hean Kim ,  Chang Joon Park ,  Hongseok Kim ,  Jung Jae Yu ,  Sang Wook Park ,  Hye Mi Kim ,  Jae Kwang Lee ,  In Ho Lee

    IPC分类号： G09G5/08

    CPC分类号： G06F3/0325 ,  G06F3/0304 ,  G06F3/038

    摘要： Provided is a mouse interface apparatus using a camera, and system and method using the mouse interface apparatus. The mouse interface apparatus detects image coordinates (xi, yi) of a plurality of points existing on edges of a camera-photographing computer window image from the camera-photographing computer window image, obtains a homography using the detected image coordinates (xi, yi) and plane coordinates (Xi, Yi) of the plurality of preset points on a plane of a real computer window, the homography converting the detected image coordinates (xi, yi) into the plane coordinates (Xi, Yi) on the real computer window, converts an arbitrary coordinate on the camera-photographing image into the plane coordinate on the computer window according to a movement of the camera using the obtained homography, and positions a cursor on the plane coordinate to move the position of the cursor according to the movement of the camera.

    摘要翻译： 提供了使用相机的鼠标接口装置，以及使用鼠标接口装置的系统和方法。 鼠标接口装置从相机拍摄计算机检测存在于照相机拍摄计算机窗口图像的边缘上的多个点的图像坐标（x，i，i，i，i） 窗口图像，使用检测到的图像坐标（x，i，i，i）获得单应性，并且在多个预设点的平面上的平面坐标（Xi，Yi） 实际的计算机窗口，将检测到的图像坐标（x i，i，i i）的单应性转换成实际计算机窗口上的平面坐标（Xi，Yi），将 根据相机使用所获得的单应性动画的移动，将相机拍摄图像上的任意坐标放置在计算机窗口上的平面坐标中，并且将光标定位在平面坐标上，以根据相机的移动来移动光标的位置 。

    Method of manufacturing flash memory device
    46.
    发明授权
    Method of manufacturing flash memory device 失效
    制造闪存设备的方法

    公开(公告)号：US07138314B2

    公开(公告)日：2006-11-21

    申请号：US11014570

    申请日：2004-12-16

    申请人： Pil Geun Song ,  Sang Wook Park

    发明人： Pil Geun Song ,  Sang Wook Park

    IPC分类号： H01L21/336

    CPC分类号： H01L21/28273 ,  H01L27/105 ,  H01L27/1052 ,  H01L27/115 ,  H01L27/11526 ,  H01L27/11546

    摘要： Disclosed is a method of manufacturing a flash memory device using a STI process. Isolation films of a projection structure becomes isolation films of a nipple structure by means of a slant ion implant process and a wet etching process. A polysilicon layer is removed until the tops of the isolation films through two step processes of a CMP process and an etch-back process, thus forming floating gates and gates of high voltage and low voltage transistors of a cell. As such, as the isolation films of the nipple structure and the floating gates are formed at the same time, it is possible secure the overlay margin between an active region and the floating gates regardless of the shrinkage of the flash memory device. Also, moats can be prevented from being generated at the boundary between the active regions when the isolation films of the nipple structure are formed. Further, when the floating gates and the gates of the high voltage and low voltage transistors are formed, a dishing phenomenon and an erosion phenomenon can be prevented.

    摘要翻译： 公开了使用STI工艺制造闪速存储器件的方法。 突起结构的隔离膜通过倾斜离子注入工艺和湿蚀刻工艺成为乳头结构的隔离膜。 通过CMP工艺和回蚀工艺的两个步骤，去除多晶硅层直到隔离膜的顶部，从而形成电池的高压和低压晶体管的浮动栅极和栅极。 因此，由于乳头结构和浮动栅极的隔离膜同时形成，所以可以确保有源区域和浮动栅极之间的覆盖边界，而与闪存器件的收缩无关。 此外，当形成乳头结构的隔离膜时，可以防止在有源区域之间的边界处产生护壁。 此外，当形成高压和低压晶体管的浮置栅极和栅极时，可以防止凹陷现象和侵蚀现象。

    Method of manufacturing flash memory device
    47.
    发明授权
    Method of manufacturing flash memory device 失效
    制造闪存设备的方法

    公开(公告)号：US07015097B2

    公开(公告)日：2006-03-21

    申请号：US10887260

    申请日：2004-07-08

    申请人： Seung Cheol Lee ,  Sang Wook Park ,  Pil Geun Song

    发明人： Seung Cheol Lee ,  Sang Wook Park ,  Pil Geun Song

    IPC分类号： H01L21/336

    CPC分类号： H01L27/11539 ,  H01L27/11526 ,  H01L27/11536 ,  H01L27/11541 ,  H01L27/11543

    摘要： Provided relates to a method of a flash memory device, which performs a first rapid thermal oxidation process at a H2 rich atmosphere for recovering an etched damage during a gate forming process, and performs a second rapid thermal oxidation process at the H2 rich atmosphere for ion-activating after performing an ion implantation process for forming a cell transistor junction and a peripheral circuit transistor junction. As a result of those processes, a Si-dangling bond cut off during a gate etching process has a Si—H combination structure and the whole processing time is reduced, and thus an abnormal oxidation caused at an edge of an ONO layer and a tunnel oxide film, which can make it possible to prevent a smiling phenomena of the ONO layer and a bird's beak phenomena of the tunnel oxide film.

    摘要翻译： 本发明涉及一种闪存器件的方法，其在H 2富含气氛下进行第一快速热氧化处理，以在栅极形成工艺期间回收蚀刻损伤，并执行第二快速热氧化 在进行用于形成单元晶体管结的离子注入工艺和外围电路晶体管结的离子激活之后，在富H 2气氛下进行离子激活。 作为这些工艺的结果，在栅极蚀刻工艺期间切断的Si-悬挂键具有Si-H组合结构，并且整个处理时间减少，因此在ONO层和隧道的边缘处引起异常氧化 氧化膜，能够防止ONO层的微笑现象和隧道状氧化膜的鸟喙现象。

    Method for forming dielectric layer between gates in flash memory device
    48.
    发明授权
    Method for forming dielectric layer between gates in flash memory device 有权
    用于在闪存器件中的栅极之间形成电介质层的方法

    公开(公告)号：US06984562B2

    公开(公告)日：2006-01-10

    申请号：US10879680

    申请日：2004-06-29

    申请人： Sang Wook Park

    发明人： Sang Wook Park

    IPC分类号： H01L21/336

    CPC分类号： H01L29/7883

    摘要： The present invention provides a method for preventing an oxide film from becoming thick due to the reaction of the oxide film and a floating gate in a method for manufacturing a flash memory device having a dielectric layer consisting of at least one oxide film between the floating gate and a control gate. To this end, a Si—F bonding layer is formed on the surface of a silicon film constituting the floating gate. The Si—F bonding layer is annealed in a nitrogen gas atmosphere to form a Si—N bonding layer. A dielectric layer is then formed.

    摘要翻译： 本发明提供了一种防止氧化膜由于氧化膜和浮动栅极的反应而变厚的方法，该方法用于制造具有由浮置栅极之间的至少一个氧化物膜构成的介电层的闪速存储器件 和控制门。 为此，在构成浮栅的硅膜的表面上形成Si-F键合层。 Si-F键合层在氮气气氛中退火以形成Si-N键合层。 然后形成介电层。

    Method of manufacturing a semiconductor device
    49.
    发明授权
    Method of manufacturing a semiconductor device 有权
    制造半导体器件的方法

    公开(公告)号：US06967151B2

    公开(公告)日：2005-11-22

    申请号：US10872883

    申请日：2004-06-21

    申请人： Pil Geun Song ,  Sang Wook Park

    发明人： Pil Geun Song ,  Sang Wook Park

    IPC分类号： H01L21/768 ,  H01L21/336 ,  H01L21/8234 ,  H01L23/522 ,  H01L21/3205 ,  H01L21/4763

    CPC分类号： H01L21/823468

    摘要： Provided is a method of manufacturing a semiconductor device. In the method, an insulation spacer is formed thicker than a target thickness on sidewalls of a gate line formed on a semiconductor substrate. The thickness of the insulation spacer is adjusted by means of a wet etching process, so that aspect ratios of spaces between gate lines become smaller to control opening widths of junction areas. The method enhances fill-up characteristics of insulation layers between the gate lines, and improves the reliability of process and an electrical characteristic of device by controlling the opening widths of junction areas.

    摘要翻译： 提供一种制造半导体器件的方法。 在该方法中，在形成在半导体衬底上的栅极线的侧壁上形成比目标厚度更厚的绝缘间隔物。 通过湿式蚀刻工艺来调节绝缘间隔物的厚度，使得栅极线之间的空间的纵横比变得更小以控制接合区域的开口宽度。 该方法提高了栅极线之间绝缘层的填充特性，并通过控制接合面积的开口宽度提高了工艺的可靠性和器件的电气特性。

    Method of forming a floating gate in a flash memory device
    50.
    发明授权
    Method of forming a floating gate in a flash memory device 有权
    在闪速存储器件中形成浮动栅极的方法

    公开(公告)号：US06780743B2

    公开(公告)日：2004-08-24

    申请号：US10631200

    申请日：2003-07-31

    申请人： Sang Wook Park ,  Seung Cheol Lee ,  Jung Il Cho

    发明人： Sang Wook Park ,  Seung Cheol Lee ,  Jung Il Cho

    IPC分类号： H01L218247

    CPC分类号： H01L27/11521 ,  H01L27/115

    摘要： Disclosed is a method of forming a floating gate in a date flash memory device on which first and second polysilicon films are stacked. After the first polysilicon film is formed, a SiH4 gas is introduced to decompose SiH4 and SiO2 into Si and H2 and Si and O2. A N2 anneal process is then implemented so that the decomposed H2 gas and O2 gas react to a N2 gas and are then outgassed. Next, a SiH4 gas and a PH3 gas are introduced to form the second polysilicon film. A native oxide film within the interface of the first polysilicon film and the second polysilicon film is removed to improve characteristics of the data flash memory device.

    摘要翻译： 公开了在第一和第二多晶硅膜堆叠的日期闪存器件中形成浮置栅极的方法。 在形成第一多晶硅膜之后，引入SiH 4气体以将SiH 4和SiO 2分解成Si和H 2以及Si和O 2。 然后实施N2退火工艺，使得分解的H 2气体和O 2气体与N 2气体反应，然后脱气。 接着，引入SiH 4气体和PH 3气体，形成第二多晶硅膜。 在第一多晶硅膜和第二多晶硅膜的界面内的自然氧化膜被去除以改善数据闪存器件的特性。