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    Data reallocation upon detection of errors
    42.
    发明授权
    Data reallocation upon detection of errors 有权

    公开(公告)号：US09678864B2

    公开(公告)日：2017-06-13

    申请号：US14559327

    申请日：2014-12-03

    Applicant: Seagate Technology LLC

    Inventor： Jun Cai ,  AndiSumaryo Sutiawan ,  Jeetandra Kella ,  ChuanPeng Ong ,  Mark Allen Gaertner ,  Brian T. Edgar

    IPC: G06F12/00 ,  G06F13/00 ,  G06F13/28 ,  G06F12/02 ,  G06F11/10

    CPC classification number: G06F12/0246 ,  G06F11/1016 ,  G06F11/1072 ,  G06F2206/1014 ,  G06F2212/7201

    Abstract: A device includes one or more data storage media having a main storage area, and includes a non-volatile cache memory and a controller. The controller stores a plurality of data packets into a plurality of physical locations in the main storage area. Each of the data packets is associated with a different logical block address (LBA), and each of the physical locations is associated with a different physical location address (PLA). The controller generates mapping information that links the different LBAs to the different PLAs. Upon detecting a soft error when reading a data packet stored in a physical location, the controller relocates the data packet associated with the soft error to a physical location of the non-volatile cache memory. The controller also marks the physical location as a suspect location. The controller updates the mapping information to reflect the relocation of the data packet associated with the soft error.

    Non-volatile buffering to enable sloppy writes and fast write verification
    46.
    发明授权
    Non-volatile buffering to enable sloppy writes and fast write verification 有权
    非易失性缓存，可实现粗写和快速写入验证

    公开(公告)号：US09424946B2

    公开(公告)日：2016-08-23

    申请号：US13762806

    申请日：2013-02-08

    Applicant: Seagate Technology LLC

    Inventor： Kevin Arthur Gomez ,  Michael Joseph Steiner ,  Mark Allen Gaertner ,  Ryan James Goss

    IPC: G11C16/34

    CPC classification number: G11C16/3454

    Abstract: Method and apparatus for managing data in a memory. In accordance with some embodiments, input write data having a selected logical address are stored in a rewriteable non-volatile (NV) buffer. A copy of the input write data is transferred to an NV main memory using a sloppy write process. A verify operation is subsequently performed to verify successful transfer of the copy of the input write data to the NV main memory using a hash value generated responsive to the input write data in the NV buffer.

    Abstract translation: 用于管理存储器中的数据的方法和装置。 根据一些实施例，具有选择的逻辑地址的输入写入数据被存储在可重写的非易失性（NV）缓冲器中。 输入写入数据的副本使用歪曲的写入过程被传送到NV主存储器。 随后执行验证操作以使用响应于NV缓冲器中的输入写入数据生成的散列值来验证输入写入数据的副本成功传送到NV主存储器。

    System and method for detecting shifting of reader-writer offset in a heat-assisted magnetic recording head
    47.
    发明授权
    System and method for detecting shifting of reader-writer offset in a heat-assisted magnetic recording head 有权
    用于检测热辅助磁记录头中读写器偏移的移位的系统和方法

    公开(公告)号：US09418688B1

    公开(公告)日：2016-08-16

    申请号：US14812032

    申请日：2015-07-29

    Applicant: Seagate Technology LLC

    Inventor： Tim Rausch ,  Tong Shirh Stone ,  Mark Allen Gaertner

    IPC: G11B11/00 ,  G11B5/48 ,  G11B5/00 ,  G11B5/60 ,  G11B5/31

    CPC classification number: G11B5/59627 ,  G11B5/314 ,  G11B5/3967 ,  G11B5/6005 ,  G11B2005/0021

    Abstract: A heat-assisted magnetic recording head is configured to write data to and read data from a magnetic recording medium. The head comprises a reader and a writer including a near-field transducer (NFT). The reader comprises a center which is laterally offset relative to a center of the writer to define a reader-writer offset (RWO) therebetween. A controller is configured to control the writer to write data to data tracks of the medium, detect a shift in the RWO, and in response to the detected shift in the RWO, control the writer to write data to a plurality of tracks defining a reserved band during an open period of the reserved band.

    Abstract translation: 热辅助磁记录头被配置为将数据写入磁记录介质并从其读取数据。 头包括读取器和包括近场换能器（NFT）的写入器。 读取器包括相对于写入器的中心横向偏移的中心，以在其间限定读取器 - 写入器偏移（RWO）。 控制器被配置为控制写入器将数据写入到介质的数据轨道，检测RWO中的移位，并且响应于检测到的RWO中的移位，控制写入器将数据写入多个定义保留的轨道 在保留频段的开放期间。

    DATA REALLOCATION UPON DETECTION OF ERRORS
    48.
    发明申请
    DATA REALLOCATION UPON DETECTION OF ERRORS 有权
    数据重新检测错误

    公开(公告)号：US20160162208A1

    公开(公告)日：2016-06-09

    申请号：US14559327

    申请日：2014-12-03

    Applicant: Seagate Technology LLC

    Inventor： Jun Cai ,  AndiSumaryo Sutiawan ,  Jeetandra Kella ,  ChuanPeng Ong ,  Mark Allen Gaertner ,  Brian T. Edgar

    IPC: G06F3/06 ,  G06F12/02 ,  G06F11/10

    CPC classification number: G06F12/0246 ,  G06F11/1016 ,  G06F11/1072 ,  G06F2206/1014 ,  G06F2212/7201

    Abstract: A device includes one or more data storage media having a main storage area. The device also includes a non-volatile cache memory and a controller. The controller stores a plurality of data packets into a plurality of physical locations in the main storage area of the one or more data storage media. Each of the plurality of data packets is associated with a different logical block address (LBA), and each of the plurality of physical locations is associated with a different physical location address. The controller generates mapping information that links the different LBAs associated with the different data packets to the different physical location addresses associated with the different physical locations. Upon detecting a soft error when reading at least one data packet of the plurality of data packets stored in at least one physical location of the plurality of physical locations, the controller relocates the at least one data packet associated with the soft error to at least one physical location of a non-volatile cache memory. The controller also makes an indication that the at least one physical location of the plurality of physical locations is a suspect location. The controller updates the mapping information to reflect the relocation of the at least one data packet associated with the soft error to the at least one physical location in the non-volatile cache memory.

    Abstract translation: 一种设备包括具有主存储区域的一个或多个数据存储介质。 该设备还包括非易失性高速缓冲存储器和控制器。 控制器将多个数据分组存储到一个或多个数据存储介质的主存储区域中的多个物理位置。 多个数据分组中的每一个与不同的逻辑块地址（LBA）相关联，并且多个物理位置中的每一个与不同的物理位置地址相关联。 控制器生成将与不同数据分组相关联的不同的LBA链接到与不同物理位置相关联的不同物理位置地址的映射信息。 当读取存储在多个物理位置中的至少一个物理位置中的多个数据分组中的至少一个数据分组时检测到软错误，控制器将与软错误相关联的至少一个数据分组重新定位到至少一个 非易失性缓存的物理位置。 控制器还指示多个物理位置中的至少一个物理位置是可疑位置。 控制器更新映射信息以反映与软错误相关联的至少一个数据分组的重定位到非易失性高速缓冲存储器中的至少一个物理位置。

    Methods and devices to increase memory device data reliability
    49.
    发明授权
    Methods and devices to increase memory device data reliability 有权
    提高存储器件数据可靠性的方法和设备

    公开(公告)号：US09164830B2

    公开(公告)日：2015-10-20

    申请号：US14154859

    申请日：2014-01-14

    Applicant: Seagate Technology LLC

    Inventor： Navneeth Kankani ,  Mark Allen Gaertner ,  Rodney Virgil Bowman ,  Ryan James Goss ,  David Scott Seekins ,  Tong Shirh Stone

    IPC: H03M13/00 ,  G06F11/10 ,  G11C29/52

    CPC classification number: G06F11/102 ,  G06F11/1012 ,  G11C29/52

    Abstract: A first data set is written to first memory units identified as having a higher data reliability and a second data set is written to second memory units identified as having a lower data reliability than the first memory units. In some cases, the second data set may include metadata or redundancy information that is useful to aid in reading and/or decoding the first data set. The act of writing the second data set increases the data reliability of the first data set. The second data set may be a null pattern, such as all erased bits.

    Abstract translation: 将第一数据集写入被识别为具有较高数据可靠性的第一存储器单元，并且将第二数据组写入被识别为具有比第一存储器单元更低的数据可靠性的第二存储器单元。 在一些情况下，第二数据集可以包括有助于读取和/或解码第一数据集的元数据或冗余信息。 写入第二数据集的动作增加了第一数据集的数据可靠性。 第二数据集可以是空模式，例如所有擦除位。

    Command Execution Using Existing Address Information
    50.
    发明申请
    Command Execution Using Existing Address Information 有权
    使用现有地址信息执行命令

    公开(公告)号：US20150234741A1

    公开(公告)日：2015-08-20

    申请号：US14703522

    申请日：2015-05-04

    Applicant: Seagate Technology LLC

    Inventor： Kris Conklin ,  Bruce Dunlop ,  Mark Allen Gaertner ,  Ryan James Goss

    IPC: G06F12/02

    CPC classification number: G06F12/0246 ,  G06F13/161 ,  G06F2212/1016 ,  G06F2212/7203

    Abstract: Method and apparatus for managing data in a memory, such as a flash memory. In accordance with some embodiments, a memory module has a plurality of solid-state non-volatile memory cells. A controller communicates a first command having address information and a first operation code. The first operation code identifies a first action to be taken by the memory module in relation to the address information. The controller subsequently communicates a second command having a second operation code without corresponding address information. The memory module takes a second action identified by the second command using the address information from the first command.

    Abstract translation: 用于管理诸如闪存之类的存储器中的数据的方法和装置。 根据一些实施例，存储器模块具有多个固态非易失性存储单元。 控制器传达具有地址信息的第一命令和第一操作码。 第一操作代码识别存储器模块相对于地址信息采取的第一动作。 控制器随后传送具有第二操作码的第二命令，而没有相应的地址信息。 存储器模块使用来自第一命令的地址信息采用由第二命令标识的第二动作。

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