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    DISPLAY DEVICE
    41.
    发明申请
    DISPLAY DEVICE 有权
    显示设备

    公开(公告)号：US20140361290A1

    公开(公告)日：2014-12-11

    申请号：US14290251

    申请日：2014-05-29

    Applicant: Semiconductor Energy Laboratory Co., Ltd.

    Inventor： Shunpei YAMAZAKI ,  Hiroyuki MIYAKE ,  Seiko INOUE ,  Shinpei MATSUDA ,  Daisuke MATSUBAYASHI ,  Masahiko HAYAKAWA

    IPC: H01L27/12

    CPC classification number: H01L27/1225 ,  H01L27/1251 ,  H01L27/3258 ,  H01L27/3262

    Abstract: In a pixel including a selection transistor, a driver transistor, and a light-emitting element, as the driver transistor, a transistor is used in which a channel is formed in an oxide semiconductor film and its channel length is 0.5 μm or greater and 4.5 μm or less. The driver transistor includes a first gate electrode over an oxide semiconductor film and a second gate electrode below the oxide semiconductor film. The first gate electrode and the second gate electrode are electrically connected to each other and overlap with the oxide semiconductor film. Furthermore, in the selection transistor of a pixel, which does not need to have field-effect mobility as high as that of the driver transistor, a channel length is made longer than at least the channel length of the driver transistor.

    Abstract translation: 在包括选择晶体管，驱动晶体管和发光元件的像素中，作为驱动晶体管，使用在氧化物半导体膜中形成沟道并且其沟道长度为0.5μm以上且4.5以下的晶体管 μm以下。 驱动晶体管包括氧化物半导体膜上的第一栅电极和氧化物半导体膜下方的第二栅电极。 第一栅电极和第二栅电极彼此电连接并与氧化物半导体膜重叠。 此外，在不需要具有与驱动晶体管的场效应迁移率一样高的像素的选择晶体管中，使沟道长度比驱动晶体管的沟道长度至少长。

    SEMICONDUCTOR DEVICE
    42.
    发明申请
    SEMICONDUCTOR DEVICE 有权
    半导体器件

    公开(公告)号：US20140339543A1

    公开(公告)日：2014-11-20

    申请号：US14276356

    申请日：2014-05-13

    Applicant: Semiconductor Energy Laboratory Co., Ltd.

    Inventor： Shunpei YAMAZAKI ,  Hiroyuki MIYAKE ,  Seiko INOUE ,  Daisuke MATSUBAYASHI

    IPC: H01L27/12

    CPC classification number: H01L27/1225 ,  H01L29/78648 ,  H01L29/7869

    Abstract: A semiconductor device includes a dual-gate transistor including an oxide semiconductor film between a first gate electrode and a second gate electrode, a gate insulating film between the oxide semiconductor film and the second gate electrode, and a pair of electrodes in contact with the oxide semiconductor film. The semiconductor device further includes an insulating film over the gate insulating film, and a conductive film over the insulating film and connected to one of the pair of electrodes. The insulating film includes an opening in at least a region overlapping with the oxide semiconductor film in which the second gate electrode is provided in contact with the gate insulating film. The second gate electrode is formed using the same material as the conductive film connected to the one of the pair of electrodes.

    Abstract translation: 半导体器件包括双栅极晶体管，其包括在第一栅电极和第二栅电极之间的氧化物半导体膜，氧化物半导体膜和第二栅电极之间的栅极绝缘膜，以及与氧化物接触的一对电极 半导体膜。 所述半导体器件还包括位于所述栅极绝缘膜上的绝缘膜，以及在所述绝缘膜上的导电膜并且连接到所述一对电极之一。 所述绝缘膜在至少与所述氧化物半导体膜重叠的区域中具有开口，所述第二栅电极与所述栅极绝缘膜接触。 第二栅电极使用与连接到该对电极中的一个电极的导电膜相同的材料形成。

    SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
    43.
    发明申请
    SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME 有权
    半导体器件及其制造方法

    公开(公告)号：US20140291671A1

    公开(公告)日：2014-10-02

    申请号：US14220544

    申请日：2014-03-20

    Applicant: Semiconductor Energy Laboratory Co., Ltd.

    Inventor： Shunpei YAMAZAKI ,  Daisuke MATSUBAYASHI

    IPC: H01L29/786 ,  H01L29/66

    CPC classification number: H01L29/66969 ,  H01L21/02554 ,  H01L21/441 ,  H01L29/78648 ,  H01L29/7869

    Abstract: A first source electrode is formed in contact with a semiconductor layer; a first drain electrode is formed in contact with the semiconductor layer; a second source electrode which extends beyond an end portion of the first source electrode to be in contact with the semiconductor layer is formed; a second drain electrode which extends beyond an end portion of the first drain electrode to be in contact with the semiconductor layer is formed; a first sidewall is formed in contact with a side surface of the second source electrode and the semiconductor layer; a second sidewall is formed in contact with a side surface of the second drain electrode and the semiconductor layer; and a gate electrode is formed to overlap the first sidewall, the second sidewall, and the semiconductor layer with a gate insulating layer provided therebetween.

    Abstract translation: 第一源电极形成为与半导体层接触; 形成与半导体层接触的第一漏电极; 形成第二源电极，其延伸超过第一源电极的与半导体层接触的端部; 形成第二漏电极，其延伸超过所述第一漏电极的与所述半导体层接触的端部; 第一侧壁形成为与第二源电极和半导体层的侧表面接触; 第二侧壁形成为与第二漏电极和半导体层的侧表面接触; 并且形成栅电极以与第一侧壁，第二侧壁和半导体层重叠，其间设置有栅极绝缘层。

    SEMICONDUCTOR DEVICE
    45.
    发明申请
    SEMICONDUCTOR DEVICE 有权
    半导体器件

    公开(公告)号：US20130285047A1

    公开(公告)日：2013-10-31

    申请号：US13865435

    申请日：2013-04-18

    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

    Inventor： Shunpei YAMAZAKI ,  Daisuke MATSUBAYASHI ,  Keisuke MURAYAMA

    IPC: H01L29/786

    CPC classification number: H01L29/7869 ,  H01L29/78696

    Abstract: A transistor including an oxide semiconductor film, in which the threshold voltage is prevented from being a negative value, is provided. A high quality semiconductor device having the transistor including an oxide semiconductor film is provided. A transistor includes an oxide semiconductor film having first to third regions. The top surface of the oxide semiconductor film in the first region is in contact with a source electrode or a drain electrode. The top surface of the oxide semiconductor film in the second region is in contact with a protective insulating film. The thickness of the second region is substantially uniform and smaller than the maximum thickness of the first region. The top surface and a side surface of the oxide semiconductor film in the third region are in contact with the protective insulating film.

    Abstract translation: 提供了包括其中阈值电压被防止为负值的氧化物半导体膜的晶体管。 提供具有包括氧化物半导体膜的晶体管的高质量半导体器件。 晶体管包括具有第一至第三区域的氧化物半导体膜。 第一区域中的氧化物半导体膜的顶表面与源电极或漏电极接触。 第二区域中的氧化物半导体膜的顶表面与保护绝缘膜接触。 第二区域的厚度基本上均匀且小于第一区域的最大厚度。 第三区域中的氧化物半导体膜的顶表面和侧表面与保护绝缘膜接触。

    TRANSISTOR AND SEMICONDUCTOR DEVICE
    46.
    发明申请
    TRANSISTOR AND SEMICONDUCTOR DEVICE 审中-公开
    晶体管和半导体器件

    公开(公告)号：US20130200376A1

    公开(公告)日：2013-08-08

    申请号：US13755330

    申请日：2013-01-31

    Applicant: Semiconductor Energy Laboratory Co., Ltd.

    Inventor： Shunpei YAMAZAKI ,  Daisuke MATSUBAYASHI

    IPC: H01L29/786

    CPC classification number: H01L29/78693 ,  H01L29/7869

    Abstract: A transistor which is resistant to a short-channel effect is provided. A semiconductor which leads to the following is used in a junction portion between a source and a semiconductor layer and a junction portion between a drain and the semiconductor layer: a majority carrier density nsS of a source-side region satisfies a relation of Formula (1): n i   Exp  [ e  ( φ s S - φ F   0 ) kT ] ≦ n s S ≦ n i   Exp  [ E g 2   kT ] ( 1 ) and a majority carrier density nsD of a drain-side region satisfies a relation of Formula (2): n i   Exp  [ e  ( φ s D - φ F   0 ) kT ] ≦ n s D ≦ n i   Exp  [ E g 2   kT ] . ( 2 ) The use of the semiconductor suppresses a DIBL effect.

    Abstract translation: 提供了耐短路效应的晶体管。 在源极和半导体层之间的接合部分和漏极和半导体层之间的接合部分中使用导致以下的半导体：源极侧区域的多数载流子密度nsS满足公式（1 ）：nof of of of of of of of of of of of of of of of of of of of of of of of of of of of of of of of of of of of of of of of of of of of of of of of of of of of of 漏极侧区域满足公式（2）的关系：ni（n）exp [[e]（phi s D - phi F o t o o）k T] kT]。 （2）使用半导体抑制DIBL效应。

    SEMICONDUCTOR DEVICE
    47.
    发明申请
    SEMICONDUCTOR DEVICE 审中-公开
    半导体器件

    公开(公告)号：US20130187150A1

    公开(公告)日：2013-07-25

    申请号：US13735424

    申请日：2013-01-07

    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

    Inventor： Shunpei YAMAZAKI ,  Daisuke MATSUBAYASHI ,  Yutaka OKAZAKI

    IPC: H01L29/786

    CPC classification number: H01L29/78696 ,  H01L27/1225 ,  H01L27/1255 ,  H01L29/04 ,  H01L29/4908 ,  H01L29/7869

    Abstract: A transistor in which a short-channel effect is not substantially caused and which has switching characteristics even in the case where the channel length is short is provided. Further, a highly integrated semiconductor device including the transistor is provided. A short-channel effect which is caused in a transistor including silicon is not substantially caused in the transistor including an oxide semiconductor film. The channel length of the transistor including the oxide semiconductor film is greater than or equal to 5 nm and less than 60 nm, and the channel width thereof is greater than or equal to 5 nm and less than 200 nm. At this time, the channel width is made 0.5 to 10 times as large as the channel length.

    Abstract translation: 提供了即使在通道长度短的情况下，实质上不引起短沟道效应且具有开关特性的晶体管。 此外，提供了包括晶体管的高度集成的半导体器件。 在包括氧化物半导体膜的晶体管中基本上不引起在包括硅的晶体管中引起的短沟道效应。 包含氧化物半导体膜的晶体管的沟道长度大于或等于5nm且小于60nm，并且其沟道宽度大于或等于5nm且小于200nm。 此时，通道宽度为通道长度的0.5〜10倍。

    SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
    49.
    发明申请
    SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME 有权

    公开(公告)号：US20250063762A1

    公开(公告)日：2025-02-20

    申请号：US18936334

    申请日：2024-11-04

    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

    Inventor： Shunpei YAMAZAKI ,  Hideomi SUZAWA ,  Tetsuhiro TANAKA ,  Hirokazu WATANABE ,  Yuhei SATO ,  Yasumasa YAMANE ,  Daisuke MATSUBAYASHI

    IPC: H01L29/786 ,  H01L29/45 ,  H01L29/66

    Abstract: A semiconductor device having a reduced amount of oxygen vacancy in a channel formation region of an oxide semiconductor is provided. Further, a semiconductor device which includes an oxide semiconductor and has improved electric characteristics is provided. Furthermore, a methods for manufacturing the semiconductor device is provided. An oxide semiconductor film is formed; a conductive film is formed over the oxide semiconductor film at the same time as forming a low-resistance region between the oxide semiconductor film and the conductive film; the conductive film is processed to form a source electrode and a drain electrode; and oxygen is added to the low-resistance region between the source electrode and the drain electrode, so that a channel formation region having a higher resistance than the low-resistance region is formed and a first low-resistance region and a second low-resistance region between which the channel formation region is positioned are formed.

    SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
    50.
    发明申请
    SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME 有权

    公开(公告)号：US20220285562A1

    公开(公告)日：2022-09-08

    申请号：US17750487

    申请日：2022-05-23

    Applicant: Semiconductor Energy Laboratory Co., Ltd.

    Inventor： Junichi KOEZUKA ,  Yukinori SHIMA ,  Hajime TOKUNAGA ,  Toshinari SASAKI ,  Keisuke MURAYAMA ,  Daisuke MATSUBAYASHI

    IPC: H01L29/786 ,  H01L21/02 ,  H01L29/51 ,  H01L29/66 ,  H01L29/24

    Abstract: In a semiconductor device including a transistor including a gate electrode formed over a substrate, a gate insulating film covering the gate electrode, a multilayer film overlapping with the gate electrode with the gate insulating film provided therebetween, and a pair of electrodes in contact with the multilayer film, a first oxide insulating film covering the transistor, and a second oxide insulating film formed over the first oxide insulating film, the multilayer film includes an oxide semiconductor film and an oxide film containing In or Ga, the oxide semiconductor film has an amorphous structure or a microcrystalline structure, the first oxide insulating film is an oxide insulating film through which oxygen is permeated, and the second oxide insulating film is an oxide insulating film containing more oxygen than that in the stoichiometric composition.

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