公开(公告)号：US20130082329A1

公开(公告)日：2013-04-04

申请号：US13251815

申请日：2011-10-03

申请人： Hsueh-Chung Chen ,  Su Chen Fan ,  Theodorus E. Standaert ,  Chun-Chen Yeh

发明人： Hsueh-Chung Chen ,  Su Chen Fan ,  Theodorus E. Standaert ,  Chun-Chen Yeh

IPC分类号： H01L27/088 ,  H01L21/28 ,  H01L29/78

CPC分类号： H01L21/823431 ,  H01L27/0886

摘要： Multi-gate devices and methods of their fabrication are disclosed. A multi-gate device can include a gate structure and a plurality of fins. The gate structure envelops a plurality of surfaces of the fins, which are directly on a substrate that is composed of a semiconducting material. Each of the fins provides a channel between a respective source and a respective drain, is composed of the semiconducting material and is doped. A first fin of the plurality of fins has a first height that is different from a second height of a second fin of the plurality of fins such that drive currents of the first and second fins are different. Further, the first and second fins form a respective cohesive structure of the semiconducting material with the substrate. In addition, surfaces of the substrate that border the fins are disposed at a same vertical position.

摘要翻译： 公开了多栅极器件及其制造方法。 多栅极器件可以包括栅极结构和多个鳍。 栅极结构包围鳍片的多个表面，其直接在由半导体材料构成的衬底上。 每个翅片在相应的源和相应的漏极之间提供通道，由半导体材料组成并且被掺杂。 多个翅片的第一翅片具有与多个翅片中的第二翅片的第二高度不同的第一高度，使得第一和第二翅片的驱动电流不同。 此外，第一和第二散热片形成半导体材料与衬底的相应的内聚结构。 此外，与翅片相接的基板的表面设置在相同的垂直位置。

公开(公告)号：US20120286375A1

公开(公告)日：2012-11-15

申请号：US13103149

申请日：2011-05-09

申请人： Ming Cai ,  Dechao Guo ,  Pranita Kulkarni ,  Chun-Chen Yeh

发明人： Ming Cai ,  Dechao Guo ,  Pranita Kulkarni ,  Chun-Chen Yeh

IPC分类号： H01L29/772 ,  H01L21/28

CPC分类号： H01L21/823412 ,  H01L21/0217 ,  H01L21/02345 ,  H01L21/28088 ,  H01L21/28114 ,  H01L21/3105 ,  H01L21/823425 ,  H01L21/823437 ,  H01L21/823807 ,  H01L21/823828 ,  H01L29/42376 ,  H01L29/4966 ,  H01L29/66545 ,  H01L29/6659 ,  H01L29/7833 ,  H01L29/7843

摘要： A method of forming a semiconductor structure includes forming a stress inducing layer over one or more partially completed field effect transistor (FET) devices disposed over a substrate, the one or more partially completed FET devices including sacrificial dummy gate structures; planarizing the stress inducing layer and removing the sacrificial dummy gate structures; and following the planarizing the stress inducing layer and removing the sacrificial dummy gate structures, performing an ultraviolet (UV) cure of the stress inducing layer so as to enhance a value of an initial applied stress by the stress inducing layer on channel regions of the one or more partially completed FET devices.

摘要翻译： 形成半导体结构的方法包括在设置在衬底上的一个或多个部分完成的场效应晶体管（FET）器件上形成应力感应层，所述一个或多个部分完成的FET器件包括牺牲虚拟栅极结构; 平面化应力诱导层并去除牺牲虚拟栅极结构; 并且在平坦化应力诱导层并去除牺牲性虚拟栅极结构之后，执行应力诱导层的紫外（UV）固化，以便增强应力诱导层在一个沟道区上的初始施加应力的值 或更多部分完成的FET器件。

公开(公告)号：US20120286371A1

公开(公告)日：2012-11-15

申请号：US13558664

申请日：2012-07-26

申请人： Dechao Guo ,  Pranita Kulkarni ,  Ramachandran Muralidhar ,  Chun-Chen Yeh

发明人： Dechao Guo ,  Pranita Kulkarni ,  Ramachandran Muralidhar ,  Chun-Chen Yeh

IPC分类号： H01L29/78

CPC分类号： H01L29/66545 ,  H01L29/66537 ,  H01L29/66575 ,  H01L29/7833

摘要： A field effect transistor device includes a substrate including a source region, a drain region, and a channel region disposed between the source region and the drain region, wherein the source region is connected to the channel region with a source extension portion, and the drain region is connected to the channel region with a drain extension portion, wherein the channel region includes a source transition portion including n-type and p-type ions and a drain transition portion including n-type and p-type ions, and a gate stack portion disposed on the channel region.

摘要翻译： 场效应晶体管器件包括：衬底，其包括源区域，漏极区域和设置在源极区域和漏极区域之间的沟道区域，其中源极区域与源极延伸部分连接到沟道区域，并且漏极 区域与漏极延伸部分连接到沟道区域，其中沟道区域包括包括n型和p型离子的源极过渡部分和包括n型和p型离子的漏极过渡部分，以及栅极堆叠 部分设置在通道区域上。

公开(公告)号：US20120286360A1

公开(公告)日：2012-11-15

申请号：US13556608

申请日：2012-07-24

申请人： Dechao Guo ,  Pranita Kulkarni ,  Ramachandran Muralidhar ,  Chun-Chen Yeh

发明人： Dechao Guo ,  Pranita Kulkarni ,  Ramachandran Muralidhar ,  Chun-Chen Yeh

IPC分类号： H01L29/78

CPC分类号： H01L29/66545 ,  H01L29/66553 ,  H01L29/66606 ,  H01L29/7834

摘要： A field effect transistor device includes a substrate including a source region, a drain region, and a channel region disposed between the source region and the drain region, wherein the source region is connected to the channel region with a source extension portion, and the drain region is connected to the channel region with a drain extension portion, a first spacer portion disposed on the source region, the drain region and a first portion of the source extension portion, and a first portion of the drain extension portion, a second spacer portion disposed on a second portion of the source extension portion, and a second portion of the drain extension portion, a gate stack portion disposed on the channel region.

摘要翻译： 场效应晶体管器件包括：衬底，其包括源区域，漏极区域和设置在源极区域和漏极区域之间的沟道区域，其中源极区域与源极延伸部分连接到沟道区域，并且漏极 区域连接到具有漏极延伸部分的沟道区域，设置在源极区域上的第一间隔部分，漏极区域和源极延伸部分的第一部分以及漏极延伸部分的第一部分，第二间隔部分 设置在源极延伸部分的第二部分上，以及漏极延伸部分的第二部分，设置在沟道区域上的栅极叠层部分。

公开(公告)号：US20110215405A1

公开(公告)日：2011-09-08

申请号：US12717439

申请日：2010-03-04

申请人： Dechao Guo ,  Unoh Kwon ,  Chun-Chen Yeh ,  Zhen Zhang

发明人： Dechao Guo ,  Unoh Kwon ,  Chun-Chen Yeh ,  Zhen Zhang

IPC分类号： H01L27/12 ,  H01L21/762

CPC分类号： H01L21/762 ,  H01L27/12

摘要： A method of forming fin field effect transistor (finFET) devices includes forming a plurality of semiconductor fins over a buried oxide (BOX) layer; performing a nitrogen implant so as to formed nitrided regions in a upper portion of the BOX layer corresponding to regions between the plurality of semiconductor fins; forming a gate dielectric layer over the semiconductor fins and the nitrided regions of the upper portion of the BOX layer; and forming one or more gate electrode materials over the gate dielectric layer; wherein the presence of the nitrided regions of upper portion of the BOX layer prevents oxygen absorption into the gate dielectric layer as a result of thermal processing.

摘要翻译： 形成鳍状场效应晶体管（finFET）器件的方法包括在掩埋氧化物（BOX）层上形成多个半导体鳍片; 进行氮注入，以在与多个半导体翅片之间的区域对应的BOX层的上部形成氮化区域; 在所述半导体散热片和所述BOX层的上部的氮化区域上形成栅介电层; 以及在所述栅极介电层上形成一个或多个栅电极材料; 其中BOX层的上部的氮化区域的存在防止了作为热处理的结果，氧吸附到栅介质层中。