公开(公告)号：US20210384294A1

公开(公告)日：2021-12-09

申请号：US17445692

申请日：2021-08-23

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chih-Wei Lin ,  Chih-Lin Wang ,  Kang-Min Kuo

IPC: H01L29/06 ,  H01L29/78 ,  H01L21/28 ,  H01L29/66

Abstract: Structures and formation methods of a semiconductor device structure are provided. The semiconductor device structure includes a semiconductor substrate and a gate stack over the semiconductor substrate. The gate stack includes a gate dielectric layer and a work function layer. The gate dielectric layer is between the semiconductor substrate and the work function layer. The semiconductor device structure also includes a halogen source layer. The gate dielectric layer is between the semiconductor substrate and the halogen source layer.

公开(公告)号：US09960246B2

公开(公告)日：2018-05-01

申请号：US15369460

申请日：2016-12-05

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Cheng-Wei Lian ,  Chih-Lin Wang ,  Kang-Min Kuo ,  Chih-Wei Lin

IPC: H01L29/78 ,  H01L29/51 ,  H01L21/28 ,  H01L29/66

CPC classification number: H01L29/517 ,  H01L21/28158 ,  H01L21/28194 ,  H01L29/513 ,  H01L29/66545 ,  H01L29/785

Abstract: A semiconductor structure and a method for forming the same are provided. The semiconductor structure includes a substrate, an interfacial layer formed over the substrate, and an insertion layer formed over the interfacial layer. The semiconductor structure further includes a gate dielectric layer formed over the insertion layer and a gate structure formed over the gate dielectric layer. The insertion layer and the gate dielectric layer may be metal oxides where the insertion layer has an oxygen coordination number greater than the gate dielectric layer.

公开(公告)号：US09780025B2

公开(公告)日：2017-10-03

申请号：US14850848

申请日：2015-09-10

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Zhi-Sheng Zheng ,  Chih-Lin Wang

IPC: H01L23/48 ,  H01L23/522 ,  H01L21/768 ,  H01L23/532

CPC classification number: H01L23/5226 ,  H01L21/76802 ,  H01L21/76834 ,  H01L21/76883 ,  H01L21/76885 ,  H01L23/5283 ,  H01L23/5329 ,  H01L2924/0002 ,  H01L2924/00

Abstract: An interconnection structure includes a first dielectric layer, a first conductor, an etch stop layer, a second dielectric layer, and a second conductor. The first dielectric layer has at least one hole therein. The first conductor is disposed at least partially in the hole of the first dielectric layer. The etch stop layer is disposed on the first dielectric layer. The etch stop layer has an opening to at least partially expose the first conductor. The second dielectric layer is disposed on the etch stop layer and has at least one hole therein. The hole of the second dielectric layer is in communication with the opening of the etch stop layer. The second conductor is disposed at least partially in the hole of the second dielectric layer and is electrically connected to the first conductor through the opening of the etch stop layer.

公开(公告)号：US09515158B1

公开(公告)日：2016-12-06

申请号：US14918054

申请日：2015-10-20

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Cheng-Wei Lian ,  Chih-Lin Wang ,  Kang-Min Kuo ,  Chih-Wei Lin

IPC: H01L29/78 ,  H01L29/51 ,  H01L29/423 ,  H01L21/28 ,  H01L21/02

CPC classification number: H01L29/517 ,  H01L21/28158 ,  H01L21/28194 ,  H01L29/513 ,  H01L29/66545 ,  H01L29/785

Abstract: A semiconductor structure and a method for forming the same are provided. The semiconductor structure includes a substrate, an interfacial layer formed over the substrate, and an insertion layer formed over the interfacial layer. The semiconductor structure further includes a gate dielectric layer formed over the insertion layer and a gate structure formed over the gate dielectric layer. In addition, the insertion layer is made of M1Ox, and M1 is a metal, O is oxygen, and x is a value greater than 4.

Abstract translation: 提供半导体结构及其形成方法。 半导体结构包括衬底，在衬底上形成的界面层，以及形成在界面层上的插入层。 半导体结构还包括形成在插入层上的栅极电介质层和形成在栅极介电层上的栅极结构。 此外，插入层由M1Ox制成，M1为金属，O为氧，x为大于4的值。