公开(公告)号：US20070136391A1

公开(公告)日：2007-06-14

申请号：US11349086

申请日：2006-02-08

申请人： Tomoya Anzai ,  Takahiro Nakano ,  Yoji Nakatani

发明人： Tomoya Anzai ,  Takahiro Nakano ,  Yoji Nakatani

IPC分类号： G06F17/30

CPC分类号： G06F17/30197

摘要： The correspondence relationship between local paths in local namespaces for snapshots FS0-SNAP0, FS1-SNAP0, and FS2-SNAP0 of file systems FS0, FS1, and FS2 and global paths in a global namespace for those snapshots is defined so that the directory configuration in the global namespace of the snapshots FS0-SNAP0, FS1-SNAP0, and FS2-SNAP0 becomes the same as the directory configuration in the global namespace of the file systems FS0, FS1, and FS2.

摘要翻译： 文件系统FS 0，FS 1和FS 2的快照FS 0 -SNAP 0，FS 1 -SNAP 0和FS 2 -SNAP 0的本地命名空间中的本地路径之间的对应关系以及全局命名空间中的全局路径 快照被定义为使得快照FS 0 -SNAP 0，FS 1 -SNAP 0和FS 2 -SNAP 0的全局命名空间中的目录配置与文件系统FS 0的全局命名空间中的目录配置相同 ，FS 1和FS 2。

公开(公告)号：US20070090501A1

公开(公告)日：2007-04-26

申请号：US11582972

申请日：2006-10-19

申请人： Seishi Oida ,  Takahiro Nakano ,  Yoshito Miyahara ,  Takashi Yoshie ,  Harunobu Satou ,  Kouichi Kadosaki ,  Kazumitsu Seki

发明人： Seishi Oida ,  Takahiro Nakano ,  Yoshito Miyahara ,  Takashi Yoshie ,  Harunobu Satou ,  Kouichi Kadosaki ,  Kazumitsu Seki

IPC分类号： H01L23/495

CPC分类号： H01L23/49582 ,  H01L24/48 ,  H01L2224/451 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/85464 ,  H01L2924/00014 ,  H01L2924/01028 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01322 ,  H01L2924/181 ,  H05K3/3426 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A lead frame base is coated with a four-layer plating. The four-layer plating includes an underlayer plating (Ni), a palladium plating, a silver plating and a gold plating arranged in this order from bottom to top.

摘要翻译： 引线框架底座涂有四层电镀。 四层电镀包括从底部到顶部依次排列的下层电镀（Ni），钯电镀，银电镀和镀金。

公开(公告)号：US20070052106A1

公开(公告)日：2007-03-08

申请号：US10976914

申请日：2004-11-01

申请人： Kazumi Watase ,  Akio Nakamura ,  Minoru Fujisaku ,  Hiroki Naraoka ,  Takahiro Nakano

发明人： Kazumi Watase ,  Akio Nakamura ,  Minoru Fujisaku ,  Hiroki Naraoka ,  Takahiro Nakano

IPC分类号： H01L23/48 ,  H01L21/4763

CPC分类号： H01L23/3114 ,  H01L23/544 ,  H01L24/10 ,  H01L24/13 ,  H01L2223/5448 ,  H01L2224/05001 ,  H01L2224/05008 ,  H01L2224/05022 ,  H01L2224/05024 ,  H01L2224/05147 ,  H01L2224/05647 ,  H01L2224/13 ,  H01L2224/13099 ,  H01L2224/16 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01065 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/14 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/00 ,  H01L2924/00014

摘要： A first mark formed simultaneously with the process step for forming a layer of metal interconnects is partly exposed at two parallel side surfaces of the separated semiconductor device or one side surface thereof to have a rectangular shape. This allows the identification of the orientation and product information of the semiconductor device in a small semiconductor device.

摘要翻译： 与用于形成金属互连层的工艺步骤同时形成的第一标记部分地暴露在分离的半导体器件的两个平行的侧表面或其一个侧表面上以具有矩形形状。 这允许在小型半导体器件中识别半导体器件的取向和产品信息。

公开(公告)号：US20060058140A1

公开(公告)日：2006-03-16

申请号：US10711326

申请日：2004-09-10

申请人： Takahiro Nakano ,  Kenji Kamada

发明人： Takahiro Nakano ,  Kenji Kamada

IPC分类号： F16H55/30 ,  F16H55/12

CPC分类号： B62M9/10

摘要： A sprocket comprises a sprocket body; a plurality of teeth extending radially outwardly from the sprocket body and dimensioned to engage a bicycle chain; and a spline extending radially inwardly from the sprocket body, wherein the spline includes a radially outer surface facing radially outwardly.

摘要翻译： 链轮包括链轮主体; 多个齿从链轮主体径向向外延伸并且尺寸适于接合自行车链条; 以及从所述链轮主体径向向内延伸的花键，其中所述花键包括径向向外面对的径向外表面。

公开(公告)号：US06988178B1

公开(公告)日：2006-01-17

申请号：US09676447

申请日：2000-09-29

申请人： Katsumi Shirai ,  Kiyotaka Fukawa ,  Takahiro Nakano

发明人： Katsumi Shirai ,  Kiyotaka Fukawa ,  Takahiro Nakano

IPC分类号： G06F12/00

CPC分类号： G06F3/0664 ,  G06F3/061 ,  G06F3/0619 ,  G06F3/064 ,  G06F3/0659 ,  G06F3/0677 ,  G11B20/18

摘要： This invention relates to the emulation processing method of a storage device and the storage device for accessing storage medium from a host that has a different sector size, and where alternate processing is performed in the sector unit of storage medium even when there is a writing error when updating the disk. In a system where a second sector size of a host is smaller than a first sector size of the storage medium, data that are staged in a buffer according to a request from the host is rewritten using write data, and then staged sector data or the rewritten sector data are saved in an alternate area and the storage medium is updated with the rewritten sector data. Since the sector data before updating is saved beforehand, it is possible to perform alternate processing using the sector unit of the storage medium.

摘要翻译： 本发明涉及一种存储装置的仿真处理方法和用于从具有不同扇区大小的主机访问存储介质的存储装置，并且即使存在写入错误也在存储介质的扇区单元中执行交替处理 更新磁盘时。 在主机的第二扇区大小小于存储介质的第一扇区大小的系统中，根据来自主机的请求在缓冲器中分段的数据被重写，然后分段扇区数据或 重写的扇区数据被保存在备用区域中，并且存储介质用改写的扇区数据更新。 由于预先保存更新前的扇区数据，所以可以使用存储介质的扇区单元进行替代处理。

公开(公告)号：US20050129672A1

公开(公告)日：2005-06-16

申请号：US10984406

申请日：2004-11-09

申请人： Steven Goldman ,  Takahiro Nakano

发明人： Steven Goldman ,  Takahiro Nakano

IPC分类号： A01K67/027 ,  A61K48/00 ,  C07H21/04 ,  C12N5/08 ,  C12N15/85 ,  C12N15/86

CPC分类号： C12N15/8509 ,  A01K67/0275 ,  A01K2217/05 ,  A01K2227/105 ,  C12N2830/008

摘要： The present invention relates to an enhancer which functions only in human brain and/or spinal cord motor neurons, where the enhancer comprises a nucleotide sequence of SEQ ID NO: 5, SEQ ID NO: 10, or SEQ ID NO: 16. The enhancer can be utilized as part of a nucleic acid construct which also has a nucleic acid encoding a marker protein or a therapeutic protein, a 3′ control region, and, optionally, a basal promoter, where these components are positioned with respect to one another to permit expression of the marker protein or the therapeutic protein. The enhancer of the present invention is useful in a method of isolating an enriched or purified population of motor neurons from a mixed population of human brain and/or spinal cells. In addition, the enhancer of the present invention can be used in a method of therapeutically targeting motor neurons.

摘要翻译： 本发明涉及仅在人脑和/或脊髓运动神经元中起作用的增强子，其中增强子包含SEQ ID NO：5，SEQ ID NO：10或SEQ ID NO：16的核苷酸序列。增强子 可以用作核酸构建体的一部分，其还具有编码标记蛋白或治疗性蛋白质的核酸，3'对照区域和任选的基础启动子，其中这些组分相对于彼此定位至 允许标记蛋白或治疗性蛋白质的表达。 本发明的增强剂可用于从人脑和/或脊髓细胞的混合群体中分离富集或纯化的运动神经元群体的方法。 此外，本发明的增强剂可以用于治疗靶向运动神经元的方法。

公开(公告)号：US06385502B1

公开(公告)日：2002-05-07

申请号：US09280003

申请日：1999-03-29

申请人： Shigeyoshi Takagi ,  Takahiro Nakano

发明人： Shigeyoshi Takagi ,  Takahiro Nakano

IPC分类号： G06F1900

CPC分类号： G05B19/4185 ,  G05B2219/31104 ,  G05B2219/31205 ,  G05B2219/31455 ,  G05B2219/33182 ,  G05B2219/34038 ,  G05B2219/42247 ,  Y02P90/18

摘要： A system for machining a component part having a race groove a along which ball elements run include a machine tool 3 for performing a machining operation on the component part, an acquisition unit 8 for acquiring information related to the machining operation, a control unit 4 for controlling the machine tool 3 based on the information acquired by the acquisition unit 8, a remote information processor 10 installed at a site remote from the control unit 4, and a communication system 9 for connecting the control unit 4 and the remote information processor 10 through a communication line 12. The remote information processor 10 has a capability of acquiring the information, acquired by the acquisition unit 8, through the control unit 4 and the communication line 12 and transmitting such information to the control unit 4 so that the component part can be machined to suit to a particular machining condition while satisfying a stabilized dimension.

摘要翻译： 用于加工具有滚珠元件运行的滚道槽a的部件的系统包括用于对部件进行加工操作的机床3，用于获取与加工操作有关的信息的获取单元8，用于 基于由获取单元8获取的信息，安装在远离控制单元4的位置的远程信息处理器10以及用于通过控制单元4和远程信息处理器10连接的通信系统9来控制机床3 远程信息处理器10具有通过控制单元4和通信线路12获取由获取单元8获取的信息的能力，并将这些信息发送到控制单元4，使得组件可以 被加工以适应特定的加工条件，同时满足稳定的尺寸。

公开(公告)号：US4884129A

公开(公告)日：1989-11-28

申请号：US171714

申请日：1988-03-22

申请人： Naoki Ozawa ,  Toshiyuki Akiyama ,  Kenji Takahashi ,  Itaru Mimura ,  Takahiro Nakano

发明人： Naoki Ozawa ,  Toshiyuki Akiyama ,  Kenji Takahashi ,  Itaru Mimura ,  Takahiro Nakano

IPC分类号： H04N9/07 ,  H04N9/04 ,  H04N9/64

CPC分类号： H04N9/045 ,  H04N9/646

摘要： A signal processing apparatus for use with an imaging device having an image signal output circuit inherently generating noise in operation so that noise may be superposed on the image signal. The apparatus comprises a noise suppressor having a sampling and holding circuit for producing noise-suppressed pixel signals carrying different color information to contribute to suppression of noise superposed on the image signal and at the same time to demodulation of chroma signals representative of color components of an image and adders for producing a sum of and a difference between the noise-suppressed pixel signals to thereby produce a luminance signal and chroma signals for an image. The apparatus may further comprise a gain control circuits interposed between the sampling and holding circuit and the difference producing adder so that the amplitudes of the noise-suppressed pixel signals are leveled to improve the color purity of an image reproduced from the image signal.

摘要翻译： 一种用于具有图像信号输出电路的成像装置的信号处理装置，所述图像信号输出电路在操作中固有地产生噪声，使得噪声可以叠加在图像信号上。 该装置包括具有采样和保持电路的噪声抑制器，用于产生携带不同颜色信息的噪声抑制像素信号，以有助于抑制叠加在图像信号上的噪声，并且同时解调代表色差信号的色度信号 图像和加法器，用于产生噪声抑制像素信号之和的差和差，从而产生用于图像的亮度信号和色度信号。 该装置还可以包括插入在采样和保持电路和差产生加法器之间的增益控制电路，使得抑制噪声的像素信号的幅度被调平以提高从图像信号再现的图像的色纯度。

公开(公告)号：US10322902B2

公开(公告)日：2019-06-18

申请号：US15783550

申请日：2017-10-13

申请人： Takahiro Nakano

发明人： Takahiro Nakano

IPC分类号： B65H31/30 ,  B42C1/12 ,  G03G15/00 ,  B65H29/14 ,  B65H31/02 ,  B65H31/36 ,  B65H43/00 ,  B65H45/18 ,  B42B4/00

摘要： Disclosed herein is a sheet processing apparatus comprising a sheet tray configured to hold a bundle composed of the sheets fed from conveyance rollers, a wait path configured to keep waiting following sheets upstream the conveyance rollers, an accumulating tray configured to hold a sheet bundle, delivery rollers configured to nip the sheet bundle mounted on the sheet tray and the following sheets, to set off from one another, and to deliver them to the accumulating tray, and to switch back the following sheets to the sheet tray, and a conveyance member configured to convey the following sheets from the sheet tray.

公开(公告)号：US09069471B2

公开(公告)日：2015-06-30

申请号：US13249310

申请日：2011-09-30

申请人： Takahiro Nakano

发明人： Takahiro Nakano

IPC分类号： G06F12/08 ,  G06F12/06 ,  G06F3/06

CPC分类号： G06F3/0613 ,  G06F3/0631 ,  G06F3/0643 ,  G06F3/0685

摘要： An information system comprises: a storage system including a processor, a memory, and a plurality of virtual volumes to be allocated pages from a storage pool of volumes; and a metadata server which, upon receiving from a client a write request containing file data to be written to a virtual volume in the storage system, returns the write request to the client with parallel information which is added to a data layout of the file data to be written in the virtual volume. The storage system, upon receiving the write request with the parallel information, allocates, based on the parallel information, pages from the storage pool to the virtual volume for writing the file data, so that the data layout is striped and the allocated pages fit striped data access according to the striped data layout.

摘要翻译： 信息系统包括：存储系统，包括处理器，存储器和要从卷的存储池分配的页面的多个虚拟卷; 以及元数据服务器，其在从客户端接收到包含要写入存储系统中的虚拟卷的文件数据的写入请求时，将写入请求返回给客户机，该并行信息被添加到文件数据的数据布局 写入虚拟卷。 存储系统在接收到具有并行信息的写请求时，基于并行信息将从存储池的页面分配给用于写入文件数据的虚拟卷，使得数据布局被条带化并且分配的页面适合条带 根据条带数据布局进行数据访问。