摘要:
An image sensor has plural array blocks B1 to B20 arranged in a two dimensional (2D) arrangement. Each array block has a sub array and a corresponding analogue to digital (A/D) converter for performing an A/D conversion of light signals (or detection signals) output from the sub array. The sub array has plural picture element cells arranged in a 2D arrangement. Each A/D converter has a pulse delay circuit having delay units of plural stages connected in series. Each delay unit delays an input pulse by a delay time corresponding to a level of the light signals received from the sub array. A pulse delay type A/D converter is used as the A/D converter, which outputs the number of the delay units as an A/D conversion data item through which the input pulse passes for a measurement time period.
摘要:
In a time measuring circuit, a pulse delay circuit is provided with a plurality of delay units. The pulse delay circuit is configured to transfer a pulse signal through the plurality of delay units while the pulse signal is delayed by the plurality of delay units. A delay time of each of the plurality of delay units depends on a level of a first drive voltage being input to each of the plurality of delay units. A generating circuit is configured to obtain a number of the delay units through which the pulse signal has passed within a predetermined period to generate, as time measurement data, digital data based on the obtained number. A first setting unit is configured to variably set the level of the first drive voltage being input to each of the plurality of delay units.
摘要:
In a semiconductor-integrated A/D converter, a pulse delay circuit is provided with a plurality of delay units. The plurality of delay units each includes at least one logic gate and operates based on a level of an input signal. The pulse delay circuit is configured to transfer a pulse signal through the plurality of delay units while the pulse signal is delayed by the plurality of delay units. A delay time of each of the plurality of delay units depends on the level of the input signal. The at least one logic gate is composed of at least one first transistor. The at least one first transistor has a first threshold voltage. A generating circuit is configured to obtain a number of the delay units through which the pulse signal has passed within a predetermined period to generate digital data based on the obtained number. The generating circuit is composed of at least one second transistor. The at least one second transistor has a second threshold voltage. The first threshold voltage of the at least one first transistor is lower than the second threshold voltage of the at least one second transistor.
摘要:
A TAD (time analog/digital) type of A/D converter has plural series-connected delay units each producing a delay in accordance with the level of a converter input voltage, with a first-stage delay unit receiving a pulse signal at commencement of each A/D conversion sampling interval, and a latch/encoder circuit detecting the total number of delay units traversed by the pulse signal by the end of the sampling interval, to obtain a numeric value expressing the input voltage level. To ensure uniformity of the delays of the delay units, these are formed using transistors of larger size than transistors of other circuits such as the latch/encoder circuit.
摘要:
For testing an A/D converter circuit including a pulse delay circuit constituted by a plurality of cascade-connected delay units, and an encoding circuit configured to count the number of the delay units through which the input pulse signal passes within a predetermined measuring time and to output a digital signal representing the counted number, the method includes the steps of setting the A/D converter circuit in a test mode where the measuring time is set at a short test-use sampling period, applying the input pulse signal to each of serial delay blocks each of which is constituted by a predetermined number of the delay units, and determining good and bad of the A/D converter circuit on the basis of digital signals outputted from the encoding circuit representing the numbers of the delay units through which the input pulse signal has passed within each of the serial delay blocks.
摘要:
A radio wave timepiece A and a quadrature detection device for executing a quadrature detecting method are disclosed including a receiving antenna 14 for receiving a carrier wave of a long wave standard radio wave on which time information is multiplexed, a quadrature detection circuit 18 for performing quadrature detection of the carrier wave in response to a reference clock CK1, commonly used for timekeeping by a time counter 8, to obtain an in-phase component I and a quadrature component Q of the carrier wave for obtaining an amplitude AN,m of the carrier wave, and a time correction means 22, 24, 26 for obtaining time information depending on the amplitude of the carrier wave from the quadrature detection circuit 18. The time counter 8 is responsive to time information delivered from the time correction means to correct current time.
摘要:
The present invention is intended to efficiently minimize high-frequency noise stemming from synchronous detection without the necessity of a low-pass filter that requires a large time constant. A vibratory gyroscope includes a synchronous detection unit that detects a sense signal sent from a sensing element using a reference signal synchronous with a monitor signal. In the vibratory gyroscope, an analog moving-average filter that produces a moving average of the detection signal by sampling the detection signal during one cycle of the reference signal is used to remove high-frequency noise components from the detection signal, which is detected to be synchronous with the reference signal, without the necessity of a CR filter that requires a large time constant. Consequently, unnecessary noise components whose frequencies are equal to the frequency of the reference signal and those of its harmonics, and which stem from synchronous detection, can be efficiently attenuated owing to an infinite attenuation frequency band offered by the analog moving-average filter.
摘要:
In an A/D conversion apparatus comprising an A/D converter (4) and a digital moving average filter (6) for removing high-frequency signal components, there is provided an analog moving average filter (2) at a first stage. A sampling frequency of the filters (6 and 2) is set to fsd=n×fsa (where n is a positive integer of 1, 2, ---). As a result, it becomes possible to superimpose an unnecessary signal passing area that appears at every frequency of n times the sampling frequency fsd in the filter (6), on an area of infinite attenuation that appears at every frequency of n times the sampling frequency fsa in the filter (2). In the apparatus as a whole, it becomes possible to efficiently attenuate unnecessary high-frequency signal components. It is also possible to obtain a similar effect when a time A/D converter is used in place of the analog moving average filter (2) and the A/D converter (4).
摘要:
A coarse measuring circuit measures an approximate measurement object time DU based on a first reference clock CK10. The approximate measurement object time represents a duration from a measurement start time to an input time of measurement object pulse PBr. A fine measuring circuit, cooperating with the coarse measuring circuit and using a shorter reference time, measures a time difference between a change point of the first reference clock CK10 and the input time of measurement object pulse PBr as a correction time DD of the approximate measurement object time DU, thereby obtaining a precise measurement objet time DT.
摘要:
A physical amount detecting apparatus, preferably, an acceleration sensor, includes a sensor element, an A/D converter, a control unit and an activation unit. The sensor element is activated by a supply voltage and outputs an electric signal in accordance with a predetermined physical amount. The A/D converter digitizes an analog electric signal and outputs digital data. The control unit calculates a control amount in order to control the sensor element, as the electric signal is set to a predetermined output, based on the digital data, and generates a control signal in accordance with the control amount. The activation unit activates the sensor element in accordance with the control signal. As a result, the control unit outputs a detecting signal indicating a physical amount in accordance with the control amount or the control signal.
摘要翻译:优选地,加速度传感器的物理量检测装置包括传感器元件,A / D转换器,控制单元和激活单元。 传感器元件由电源电压激活,并根据预定的物理量输出电信号。 A / D转换器对模拟电信号进行数字化并输出数字数据。 控制单元基于数字数据,计算控制量,以便根据数字数据将电信号设置为预定的输出来控制传感器元件,并根据控制量生成控制信号。 激活单元根据控制信号启动传感器元件。 结果,控制单元根据控制量或控制信号输出指示物理量的检测信号。