公开(公告)号：US08522087B2

公开(公告)日：2013-08-27

申请号：US13019873

申请日：2011-02-02

Applicant: Larry J. Koudele ,  Robert B. Eisenhuth

Inventor： Larry J. Koudele ,  Robert B. Eisenhuth

IPC: G06K5/04

CPC classification number: H04L7/0331 ,  G04F10/005 ,  G06F11/0793 ,  G11C11/4076 ,  G11C11/5642 ,  G11C29/02 ,  G11C29/12015 ,  G11C2211/5644 ,  H03M1/207 ,  H03M1/54

Abstract: A counter configuration operates in cooperation with a delay configuration such that the counter configuration counts an input interval based on a given clock speed and a given clock interval while the delay configuration provides an enhanced data output that is greater than what would otherwise be provided by the given clock speed. The counter configuration counts responsive to a selected edge in the clock interval. An apparatus in the form of a correction arrangement and an associated method are configured to monitor at least the delay configuration output for detecting a particular time relationship between an endpoint of the input interval and a nearest occurrence of the selected clock edge in the given clock signal that is indicative of at least a potential error in the enhanced data output and determining if the potential error is an actual error for subsequent use in correcting the enhanced data output.

Abstract translation: 计数器配置与延迟配置协同工作，使得计数器配置基于给定的时钟速度和给定的时钟间隔对输入间隔进行计数，而延迟配置提供的增强数据输出大于由 给定时钟速度。 计数器配置响应于时钟间隔中的选定边沿计数。 校正装置和相关方法形式的装置被配置为至少监视延迟配置输出，用于检测输入间隔的端点与给定时钟信号中所选择的时钟沿的最近出现之间的特定时间关系 这表明增强数据输出中至少存在潜在的错误，并且确定潜在误差是否是后续用于校正增强数据输出的实际误差。

公开(公告)号：US08368569B2

公开(公告)日：2013-02-05

申请号：US12918172

申请日：2009-02-20

Applicant: Masami Nakamura

Inventor： Masami Nakamura

IPC: H03M1/06

CPC classification number: G11B20/10 ,  G11B20/10037 ,  G11B2020/00057 ,  G11B2020/10546 ,  G11B2220/2545 ,  H03M1/207

Abstract: A data conversion device is provided with a data converting means that sequentially converts first data into second data of the number of second bits, wherein an analog signal is quantized into the first data by the number of first bits, and the first and second data can be first and second maximum values, respectively. The data converting means is comprised of a first conversion means (steps 21 and 23) that, when a value of the fast data is not the first maximum value, converts the first data to the second data by adding 0 to a lower bit side of the first data and a second conversion means (steps 21 and 24-26) that converts the first data to the second data so that, when a value of the first data is the fast maximum value, a value can be made larger, in accordance with a value be-fore or after the first data, than the data of the number of second bits obtained by adding 0 to the lower bit side of the first data. With the structure, when the data obtained by quantizing an analog signal is converted to data with the number of more bits, a rounding error by quantizing is improved as much as possible.

Abstract translation: 数据转换装置具有数据转换装置，该数据转换装置将第一数据顺序地转换成第二位数的第二数据，其中模拟信号通过第一位的数量被量化到第一数据中，并且第一和第二数据可以 分别为第一和第二最大值。 数据转换装置包括第一转换装置（步骤21和23），当快速数据的值不是第一最大值时，通过将第一数据添加到第二数据的下位，将第一数据转换为第二数据 第一数据和第二转换装置（步骤21和24-26），其将第一数据转换为第二数据，使得当第一数据的值是快速最大值时，可以根据 比第一数据之前或之后的值高于通过将0加到第一数据的低位侧而获得的第二位数的数据。 利用该结构，当通过量化模拟信号获得的数据被转换成具有更多位数的数据时，尽可能地改进通过量化的舍入误差。

公开(公告)号：US08269553B2

公开(公告)日：2012-09-18

申请号：US12745350

申请日：2008-12-02

Applicant: Kazuhiro Yamamoto ,  Toshiyuki Okayasu

Inventor： Kazuhiro Yamamoto ,  Toshiyuki Okayasu

IPC: H01L25/00

CPC classification number: H03K5/14 ,  G01R19/2506 ,  G04F10/005 ,  H01L2924/0002 ,  H03K3/0315 ,  H03K5/15046 ,  H03K5/1508 ,  H03L7/0812 ,  H03M1/207 ,  H03M1/502 ,  H01L2924/00

Abstract: A delay circuit includes a MOSFET and bias voltage sources. The bias voltage sources apply a voltage difference between the drain and source of the MOSFET. The bias voltage source supplies a source voltage to a source electrode of the MOSFET. The bias voltage source supplies a drain voltage to a drain electrode of the MOSFET. An input signal to be delayed is propagated through the gate of the MOSFET in the gate width direction (y-axis direction).

Abstract translation: 延迟电路包括MOSFET和偏置电压源。 偏置电压源施加MOSFET的漏极和源极之间的电压差。 偏置电压源将源极电压提供给MOSFET的源极。 偏置电压源将漏极电压提供给MOSFET的漏极。 要延迟的输入信号在栅极宽度方向（y轴方向）上通过MOSFET的栅极传播。

公开(公告)号：US20100214139A1

公开(公告)日：2010-08-26

申请号：US12533841

申请日：2009-07-31

Applicant: Kheng Hin Toh ,  Gim Eng Chew

Inventor： Kheng Hin Toh ,  Gim Eng Chew

IPC: H03M1/48

CPC classification number: G01D5/24419 ,  G01D5/245 ,  H03K5/1252 ,  H03K5/156 ,  H03K2005/00052 ,  H03M1/207 ,  H03M1/365 ,  H03M1/367 ,  H03M1/485

Abstract: Disclosed are various embodiments of interpolation circuits for use in conjunction with optical encoders. The analog output signals provided by incremental or absolute motion encoders are provided to an interpolation circuit, which is capable of providing high interpolation factor output signals having high timing accuracy. The disclosed interpolation circuits may be implemented using CMOS or BiCMOS processes without undue effort.

Abstract translation: 公开了与光学编码器结合使用的内插电路的各种实施例。 由增量或绝对运动编码器提供的模拟输出信号被提供给能够提供高定时精度的高内插因子输出信号的内插电路。 公开的内插电路可以使用CMOS或BiCMOS处理而不用过度的努力来实现。

公开(公告)号：US20090267820A1

公开(公告)日：2009-10-29

申请号：US12444126

申请日：2007-08-22

Applicant: Fujio Kurokawa

Inventor： Fujio Kurokawa

IPC: H03M1/60

CPC classification number: H03M1/207 ,  H03M1/60 ,  H03M1/661 ,  H03M1/86

Abstract: There are provided an analog-digital converter circuit capable of performing the same degree of operation as being performed at a high-frequency oscillation pulse using a low-frequency oscillation pulse without using the high-frequency oscillation pulse, a timing signal generating circuit generating a timing signal at the high frequency, and a control device using the circuits. In an analog-digital converter circuit, a periodic signal generating circuit allows the first to j-th pulse counting devices of the N pulse counting devices to count a count value X and allows the other pulse counting devices to count a count value X−1 in each sampling period by sequentially generating N serial periodic signals at a delay time interval of [approximate value of one period (T) of periodic signals]÷N. A digital signal generating circuit converts the analog signal to the digital signal.

Abstract translation: 提供了一种模数转换器电路，其能够执行与在不使用高频振荡脉冲的情况下使用低频振荡脉冲在高频振荡脉冲下执行的相同操作的程度，定时信号产生电路产生 高频定时信号，以及使用该电路的控制装置。 在模拟数字转换器电路中，周期信号发生电路允许N个脉冲计数装置的第一至第j个脉冲计数装置对计数值X进行计数，并允许其它脉冲计数装置对计数值X-1进行计数 在每个采样周期中通过以[周期信号]的一个周期（T）的近似值] / N的延迟时间间隔依次产生N个串行周期信号。 数字信号发生电路将模拟信号转换成数字信号。

公开(公告)号：US06956505B2

公开(公告)日：2005-10-18

申请号：US10334791

申请日：2003-01-02

Applicant: Mitsuyuki Taniguchi ,  Tokuhisa Matsukane

Inventor： Mitsuyuki Taniguchi ,  Tokuhisa Matsukane

IPC: G01D5/245 ,  G01D5/244 ,  H03M1/10 ,  H03M1/30 ,  H03M1/22

CPC classification number: H03M1/1038 ,  H03M1/207 ,  H03M1/303

Abstract: After cyclic original signals generated from a sensing element of an encoder are converted into digital signals, positions P(0) to P(n) in one period are obtained for each given period by means of a digital interpolator. If position data obtained immediately after a zero cross point is detected are P(0) and P(n) and if speed is fixed, an object should move on a straight line from a position P(0) to a position P(n). An actual detected position data P(m) is deviated from this straight line by D(m). This detection error D(m) and the detected position data P(m) are combined and stored in advance as reference data, and correction is carried out using the reference data every time position data is detected by the digital interpolator.

Abstract translation: 在从编码器的感测元件产生的循环原始信号被转换为数字信号之后，通过数字内插器在每个给定周期中获得一个周期中的位置P（0）至P（n）。 如果检测到零交叉点之后立即获得的位置数据是P（0）和P（n），并且如果速度是固定的，则物体应该在从位置P（0）到位置P（n）的直线上移动， 。 实际检测到的位置数据P（m）从该直线偏离D（m）。 该检测误差D（m）和检测位置数据P（m）被预先组合并作为参考数据存储，并且每当数字内插器检测到位置数据时，使用参考数据执行校正。

公开(公告)号：US20050092904A1

公开(公告)日：2005-05-05

申请号：US10947146

申请日：2004-09-23

Applicant: Jose Doval

Inventor： Jose Doval

IPC: G01D5/244 ,  H03M1/18 ,  H03M1/20 ,  H03M1/22 ,  H03M1/30 ,  G01D5/34

CPC classification number: G01D5/2448 ,  G01D5/24476 ,  H03M1/207 ,  H03M1/303

Abstract: A position-measuring circuit is described for use with an analog position encoder of the kind comprising a code member and at least two sensors for sensing successive marks on the code member during relative movement between the code member and sensors, the sensors providing two oscillating quadrature signals. The circuit comprising means for obtaining a relatively coarse measure of position by detecting successive instants t0-t3 at which the amplitudes of the sensor signals are equal or at which the amplitude of one signal is equal to the inverse of the amplitude of the other signal. The amplitude of one of the signals or its inverse is stored at each detection instant to alternately establish relatively high and low threshold levels. A fine measure of position at an arbitrary instant T is obtained as a function of the instantaneous amplitude P of one of the signals and the difference between neighbouring high and low thresholds levels.

Abstract translation: 描述了位置测量电路，用于包括代码构件和至少两个传感器的模拟位置编码器，用于在代码构件和传感器之间的相对移动期间感测代码构件上的连续标记，传感器提供两个振荡正交 信号。 该电路包括用于通过检测传感器信号的幅度相等或在一个信号的幅度等于另一个信号的幅度的倒数的连续时刻t 0 -t 3来获得相对粗略的位置测量的装置 信号。 在每个检测时刻存储一个信号或其反相的振幅，以交替地建立相对较高和较低的阈值电平。 作为一个信号的瞬时幅度P和相邻的高和低阈值电平之间的差异的函数，获得在任意时刻T的位置的精细测量。

公开(公告)号：US20020190886A1

公开(公告)日：2002-12-19

申请号：US09905322

申请日：2001-07-13

Applicant: Kromos Technology, Inc.

Inventor： Aleksandar Ignjatovic ,  Nicholas A. Carlin

IPC: H03M001/12

CPC classification number: H03M1/207

Abstract: A method and a system for acquiring local signal behavior parameters (LSBPs) of a band-limited (BL) signa, for representing and processing the signal, wherein the LSBPs encode the signal's local behavior in between Nyquist rate points. Preferably, a section of a BL signal within a sampling window is represented as a truncated series of order n at a sampling moment within the sampling window. The truncated series having nnull1 LSBPs as its coefficients, encoding the signal's local behavior between Nyquist rate points. Compared to the conventional approach that encodes a signal's behavior by signal samples taken at Nyquist rate points, the invention encodes more signal behavior. Discrete signal samples are obtained from the signal. The LSBPs are solved numerically such that the interpolated values of the truncated series provide the least-square fit with the discrete signal samples. The LSBPs are repectively the values of chromatic differential operators of order 0 to order n evaluated at the sampling moment.

Abstract translation: 一种用于获取带限制（BL）信号的本地信号行为参数（LSBP）的方法和系统，用于表示和处理信号，其中LSBP对奈奎斯特速率点之间的信号的局部行为进行编码。 优选地，采样窗口内的BL信号的一部分在采样窗口内的采样时刻被表示为阶数为n的截断系列。 截距序列具有n + 1个LSBP作为其系数，对奈奎斯特速率点之间的信号的局部行为进行编码。 与通过在奈奎斯特速率点拍摄的信号样本对信号行为进行编码的常规方法相比，本发明编码更多的信号行为。 从信号获得离散信号样本。 LSBP被数值求解，使得截断序列的插值提供与离散信号样本的最小二乘拟合。 LSBP分别是在采样时刻评估的阶数为0到阶n的色差算子的值。

公开(公告)号：US4225931A

公开(公告)日：1980-09-30

申请号：US915955

申请日：1978-06-15

Applicant: Ernst Schwefel

Inventor： Ernst Schwefel

IPC: G01D5/245 ,  G01B21/00 ,  G01D5/244 ,  G01D5/36 ,  G06F17/17 ,  H03M1/00 ,  G06F7/38

CPC classification number: G06F17/17 ,  G01D5/36 ,  G01D5/363 ,  H03M1/207

Abstract: An interpolation process is described for use with an incremental position measuring device which produces a periodic analog output signal. The output signal is digitized and then applied as an input to a digital computer programmed to calculate the interpolation value of the signal. In the preferred embodiment the computer is also programmed to apply a number of corrections to the digitized signal prior to interpolation.

Abstract translation: 描述了用于产生周期性模拟输出信号的增量位置测量装置的内插处理。 输出信号被数字化，然后作为输入被应用于被编程为计算信号的内插值的数字计算机。 在优选实施例中，计算机也被编程为在插值之前对数字化信号应用多个校正。

公开(公告)号：US09239572B2

公开(公告)日：2016-01-19

申请号：US13555293

申请日：2012-07-23

Applicant: Andre Korrek

Inventor： Andre Korrek

IPC: G01R13/14 ,  G05B9/02 ,  H01H47/00 ,  H03M1/20 ,  H01H51/00 ,  H03M1/12 ,  H01H9/54 ,  H02P23/00

CPC classification number: G05B9/02 ,  H01H9/542 ,  H01H47/002 ,  H01H51/005 ,  H02P23/24 ,  H03M1/12 ,  H03M1/207

Abstract: A safety switching device, with which a safety-related device, can be set into a safe state. The safety switching device has a microprocessor or microcontroller, which can set an electric drive to be protected into a safe state both if an emergency circuit breaker, protective door switch, and/or two-hand switch is activated and also if there is faulty operation of the safety-related device or electric drive. For this purpose, the microprocessor is implemented such that it can determine from at least one analog signal to be measured whether a predetermined parameter lies outside a predetermined operating range. In addition, the microprocessor can be a component of a safety device which is constructed for multiple-channel control of a safety-related electric drive. In this way, the safety switching device can respond to several safety functions independent of each other in order to set an electric drive into a safe state.