Interference alleviation equalizing apparatus of multi-carrier communication system and method thereof
    42.
    发明授权
    Interference alleviation equalizing apparatus of multi-carrier communication system and method thereof 有权
    多载波通信系统的干扰减轻均衡装置及其方法

    公开(公告)号:US07864905B2

    公开(公告)日:2011-01-04

    申请号:US11161585

    申请日:2005-08-09

    IPC分类号: H04B1/10

    摘要: An apparatus and a method for equalizing a received signal to generate an equalized signal are disclosed. The apparatus includes a channel estimator for generating a channel estimation value according to a preamble symbol in the received signal and for generating a channel response value according to the channel estimation value, an interference power estimation circuit for generating an interference power estimate according to a hard decision value, the channel response value, and the received signal, and an equalization circuit for equalizing the received signal according to the channel response value and the adjusted interference power estimate to generate the equalized signal. The hard decision value corresponds to the equalized signal.

    摘要翻译: 公开了一种用于均衡接收信号以产生均衡信号的装置和方法。 该装置包括:信道估计器,用于根据接收信号中的前导码符号生成信道估计值,并根据信道估计值产生信道响应值;干扰功率估计电路,用于根据硬信号产生干扰功率估计 判定值,信道响应值和接收信号,以及用于根据信道响应值和调整后的干扰功率估计均衡接收信号以产生均衡信号的均衡电路。 硬判定值对应于均衡信号。

    Robust ESD LDMOS device
    43.
    发明授权
    Robust ESD LDMOS device 有权
    坚固的ESD LDMOS器件

    公开(公告)号:US07781834B2

    公开(公告)日:2010-08-24

    申请号:US11773364

    申请日:2007-07-03

    IPC分类号: H01L29/78 H01L29/10

    摘要: A semiconductor device includes a gate electrode over a semiconductor substrate, wherein the gate electrode has a gate width direction; a source/drain region in the semiconductor substrate and adjacent the gate electrode, wherein the source/drain region has a first width in a direction parallel to the gate width direction; and a bulk pick-up region in the semiconductor substrate and abutting the source/drain region. The bulk pick-up region and the source/drain region have opposite conductivity types. The bulk pick-up region has a second width in the width direction, and wherein the second width is substantially less than the first width.

    摘要翻译: 半导体器件包括在半导体衬底上的栅电极,其中栅电极具有栅极宽度方向; 在所述半导体衬底中并且与所述栅电极相邻的源极/漏极区域,其中所述源极/漏极区域在平行于所述栅极宽度方向的方向上具有第一宽度; 以及半导体衬底中的块体拾取区域并且邻接源极/漏极区域。 本体拾取区域和源极/漏极区域具有相反的导电类型。 本体拾取区域在宽度方向上具有第二宽度,并且其中第二宽度基本上小于第一宽度。

    Survivor memory management in a Viterbi decoder
    44.
    发明授权
    Survivor memory management in a Viterbi decoder 失效
    维特比解码器中的幸存者内存管理

    公开(公告)号:US07496159B2

    公开(公告)日:2009-02-24

    申请号:US10724915

    申请日:2003-12-01

    IPC分类号: H03D1/00

    摘要: An apparatus for survivor path decoding in a Viterbi decoder with a constraint length of K. The apparatus of the invention includes a best survivor unit, a a register-exchange network, and a trace-back unit. The best survivor unit receives path metrics of 2K−2 local winner states from which a best state is selected every L iterations. Meanwhile, the register-exchange network generates decision vectors of survivor paths leading to 2K−1 states at instant i according to decision bits of all states from instant i−L to instant i. Every L iterations the register-exchange network outputs L-bit decision vectors for all states at instant i. Then the trace-back unit stores the decision vectors and finds a global survivor path sequence by following the decision vectors back from the best state at instant i−L. In this manner, L decoded bits can be output from the trace-back unit every L iterations.

    摘要翻译: 一种具有约束长度为K的维特比解码器中的幸存路径解码装置。本发明的装置包括最佳幸存器单元,寄存器交换网络和追溯单元。 最好的幸存者单位接收2K-2局部优胜者状态的路径度量,每L次迭代选择最佳状态。 同时,寄存器交换网络根据从即时i-L到瞬时i的所有状态的判定位,产生在时刻i导致2K-1状态的幸存路径的判定向量。 每个L迭代,寄存器交换网络在时刻i输出所有状态的L位决策向量。 然后,追溯单元存储决策向量,并且通过从时刻i-L处的最佳状态返回的判定向量来查找全局幸存路径序列。 以这种方式,每L次迭代可以从追溯单元输出L个解码的比特。

    HDMI audio-video signal switching device
    47.
    发明授权
    HDMI audio-video signal switching device 有权
    HDMI音视频信号切换装置

    公开(公告)号:US08672714B2

    公开(公告)日:2014-03-18

    申请号:US13338457

    申请日:2011-12-28

    IPC分类号: H01R25/00

    CPC分类号: H01R31/06 H01R24/60

    摘要: An HDMI audio-video signal switching device comprises two housing bodies and a conductively connecting circuit board. Each of the housing bodies has an assembling end and a plugged end. The conductively connecting circuit board is a circuit board formed, at each end thereof corresponding to a positioning slot of each housing body, with a plugging projection sheet. Each plugging projection sheet has conductively connecting terminals. A portion of the conductively connecting circuit board between the two plugging projection sheets is set in the positioning slot, such that each plugging projection sheet and conductively connecting terminals thereon are allowed to pass through the positioning slot and then extend into a plugged hole, as well as the assembling ends of the two housing bodies are allowed to be butted and assembled together. Thereby, a more simplified structure is introduced for the HDMI audio-video signal switching device.

    摘要翻译: HDMI音视频信号切换装置包括两个壳体和导电连接电路板。 每个壳体具有组装端和堵塞端。 导电连接电路板是在其每个端部处形成有与每个壳体的定位槽相对应的电路板,其具有插入突出片。 每个插入突起片具有导电连接端子。 将两个插入突起片之间的导电连接电路板的一部分设置在定位槽中,使得每个插入突起片和导电连接端子都允许穿过定位槽,然后延伸到插入孔中 因为两个壳体的组装端被允许对接并组装在一起。 因此,为HDMI音频 - 视频信号切换装置引入了更简化的结构。

    TECHNIQUE FOR SMOOTHING AN INTERFACE BETWEEN LAYERS OF A SEMICONDUCTOR DEVICE
    48.
    发明申请
    TECHNIQUE FOR SMOOTHING AN INTERFACE BETWEEN LAYERS OF A SEMICONDUCTOR DEVICE 有权
    用于平滑半导体器件层之间的界面的技术

    公开(公告)号:US20130075837A1

    公开(公告)日:2013-03-28

    申请号:US13240714

    申请日:2011-09-22

    IPC分类号: H01L29/82 H01L21/8246

    摘要: The present disclosure provides a semiconductor memory device. The device includes a pinning layer having an anti-ferromagnetic material and disposed over a first electrode; a pinned layer disposed over the pinning layer; a composite layer disposed over the pinned layer, the composite layer having a magnetic material randomly distributed in a non-magnetic material; a barrier layer disposed on the composite layer; a free layer disposed over the barrier layer; and a second electrode disposed over the free layer.

    摘要翻译: 本公开提供一种半导体存储器件。 该装置包括具有反铁磁材料并设置在第一电极上的钉扎层; 设置在钉扎层上方的钉扎层; 复合层,其设置在所述被钉扎层上方,所述复合层具有随机分布在非磁性材料中的磁性材料; 设置在所述复合层上的阻挡层; 设置在阻挡层上的自由层; 以及设置在所述自由层上方的第二电极。

    Synchronization channel for advanced wireless OFDM/OFDMA systems
    50.
    发明申请
    Synchronization channel for advanced wireless OFDM/OFDMA systems 有权
    高级无线OFDM / OFDMA系统的同步信道

    公开(公告)号:US20100165942A1

    公开(公告)日:2010-07-01

    申请号:US12655515

    申请日:2009-12-30

    IPC分类号: H04W88/16 H04W72/04 H04L27/28

    摘要: A hierarchical downlink (DL) synchronization channel (SCH) is provided for wireless OFDM/OFDMA systems. The SCH includes a Primary SCH (P-SCH) for carrying PA-Preambles used for coarse timing and frequency synchronization, and a Secondary SCH (S-SCH) for carrying SA-Preambles used for cell ID detection. The total time length occupied by P-SCH and S-SCH is equal to one OFDM symbol time length of a data channel, and S-SCH is located in front of P-SCH in each DL frame. A perfect multi-period time-domain structure is created and maintained in P-SCH to increase preciseness of frame boundary estimation. With overlapping deployment of macrocells and femtocells, a predefined SCH configuration scheme is provided to separate frequency subbands used for macrocells and femtocells such that interferences in S-SCH can be mitigated. In addition, a self-organized SCH configuration scheme is provided to allow more flexibility for femtocells to avoid or introduce interference in S-SCH.

    摘要翻译: 为无线OFDM / OFDMA系统提供分层下行链路(DL)同步信道(SCH)。 SCH包括用于携带用于粗定时和频率同步的PA前导的主SCH(P-SCH)和用于携带用于小区ID检测的SA-前导的辅SCH(S-SCH)。 由P-SCH和S-SCH占用的总时间长度等于数据信道的一个OFDM符号时间长度,并且S-SCH位于每个DL帧中的P-SCH前面。 在P-SCH中创建并保持了完美的多周期时域结构,以增加帧边界估计的精确度。 通过宏单元和毫微微小区的重叠部署,提供预定义的SCH配置方案来分离用于宏小区和毫微微小区的频率子带,从而可以减轻S-SCH中的干扰。 另外,提供了自组织的SCH配置方案,以允许毫微微小区更灵活地避免或引入S-SCH中的干扰。