公开(公告)号：US20120033602A1

公开(公告)日：2012-02-09

申请号：US13258237

申请日：2010-01-13

申请人： Wenjie Guo ,  Zhihai Wang

发明人： Wenjie Guo ,  Zhihai Wang

IPC分类号： H04H20/71

CPC分类号： H04L12/189 ,  H04L12/1485 ,  H04M15/41 ,  H04M15/43 ,  H04M15/57 ,  H04M15/80 ,  H04M15/8022 ,  H04W4/24 ,  H04W72/005 ,  H04W76/40

摘要： The present invention discloses a method and system for obtaining access information in a Multimedia Broadcast/Multicast Service (MBMS). The method includes the following steps: during an eMBMS session, a broadcast/multicast service center (BM-SC) configures access information in one or more MBMS session signaling, and sends the MBMS session signaling to an MBMS gateway within a service area of the BM-SC; wherein the access information at least includes radio access technology type information. The present invention also discloses a method and system for charging in an MBMS. The methods and systems of the present invention can take the access information including the radio access technology type as the basis of charging, supply communication operators with a charging manner of distinguishing radio access technology types, and adopt different rates corresponding to the MBMS service areas of different radio access technology types, and thus charging can be further detailed.

摘要翻译： 本发明公开了一种在多媒体广播/组播业务（MBMS）中获取接入信息的方法和系统。 该方法包括以下步骤：在eMBMS会话期间，广播/组播服务中心（BM-SC）在一个或多个MBMS会话信令中配置接入信息，并将MBMS会话信令发送到业务区域内的MBMS网关 BM-SC; 其中所述访问信息至少包括无线电接入技术类型信息。 本发明还公开了一种在MBMS中收费的方法和系统。 本发明的方法和系统可以采用无线接入技术类型的接入信息作为充电的基础，为通信运营商提供区分无线接入技术类型的收费方式，并采用对应MBMS业务区域的不同速率 不同的无线接入技术类型，从而可以进一步详细的收费。

公开(公告)号：US20070178692A1

公开(公告)日：2007-08-02

申请号：US11733673

申请日：2007-04-10

申请人： Wilbur Catabay ,  Zhihai Wang ,  Ping Li

发明人： Wilbur Catabay ,  Zhihai Wang ,  Ping Li

IPC分类号： H01L21/4763

CPC分类号： H01L21/76843 ,  H01L21/2855 ,  H01L21/76844 ,  H01L21/76846 ,  H01L21/76855 ,  H01L21/76858 ,  H01L21/76859 ,  H01L21/76864 ,  H01L21/76871 ,  H01L21/76873 ,  H01L21/76874 ,  H01L23/53238 ,  H01L2924/0002 ,  H01L2924/00

摘要： Embodiments of the invention include a method for forming a copper interconnect having a bi-layer copper barrier layer. The method comprises the steps of providing a substrate in a processing chamber, the substrate having a low-K dielectric insulating layer and an opening in the insulating layer. A first barrier layer of tantalum/tantalum nitride is formed on the insulating layer and in the opening. A second barrier layer is formed on the first barrier layer. The second barrier layer consisting of a material selected from the group of palladium, chromium, tantalum, magnesium, and molybdenum. A copper seed layer is formed on the second barrier layer and a bulk copper layer is formed on the seed layer. The substrate is annealed and subject to further processing which can include planarization. Other embodiments include providing a substrate in a processing chamber and forming a copper seed layer on the substrate. The seed layer is implanted with barrier materials to form an implanted seed layer followed by bulk copper-containing layer formation. The substrate is annealed to form a final barrier layer. In a related embodiment the step of forming a seed layer is replaced with the steps of forming a first barrier layer on the substrate and forming a copper seed layer on the first barrier layer. After implantation of barrier material into the seed layer and bulk deposition of copper-containing material, the substrate is annealed to form a final barrier layer. In yet another related embodiment the step of forming a seed layer is replaced with the steps of forming a first barrier layer on the substrate and forming a second barrier layer on the first layer. A copper seed layer is formed on the second barrier layer. After implantation of barrier material into the seed layer and bulk deposition of copper-containing material, the substrate is annealed to form a final barrier layer.

摘要翻译： 本发明的实施例包括一种形成具有双层铜阻挡层的铜互连的方法。 该方法包括以下步骤：在处理室中提供衬底，所述衬底具有低K电介质绝缘层和绝缘层中的开口。 在绝缘层和开口中形成钽/氮化钽的第一阻挡层。 在第一阻挡层上形成第二阻挡层。 第二阻挡层由选自钯，铬，钽，镁和钼的材料组成。 在第二阻挡层上形成铜籽晶层，在籽晶层上形成体铜层。 将衬底退火并进行可包括平坦化的进一步加工。 其他实施例包括在处理室中提供衬底并在衬底上形成铜籽晶层。 种子层被植入阻挡材料以形成植入的种子层，然后形成大块含铜层。 将衬底退火以形成最终的阻挡层。 在相关实施例中，形成种子层的步骤被替换为在衬底上形成第一阻挡层并在第一阻挡层上形成铜籽晶层的步骤。 在将阻挡材料植入种子层和含铜材料的大量沉积之后，将衬底退火以形成最终的阻挡层。 在另一相关实施例中，形成种子层的步骤被替换为在衬底上形成第一阻挡层并在第一层上形成第二阻挡层的步骤。 在第二阻挡层上形成铜籽晶层。 在将阻挡材料植入种子层和含铜材料的大量沉积之后，将衬底退火以形成最终的阻挡层。

公开(公告)号：US06893962B2

公开(公告)日：2005-05-17

申请号：US10400252

申请日：2003-03-27

申请人： Prabhakar P. Tripathi ,  Zhihai Wang ,  Weidan Li

发明人： Prabhakar P. Tripathi ,  Zhihai Wang ,  Weidan Li

IPC分类号： C23C14/02 ,  C23C14/06 ,  C23C14/34 ,  H01L21/285 ,  H01L21/768 ,  H01L21/4763 ,  H01L21/28 ,  H01L21/3205 ,  H01L21/44

CPC分类号： H01L21/76846 ,  C23C14/025 ,  C23C14/0641 ,  C23C14/345 ,  H01L21/2855

摘要： A method of forming a metallization interconnection system within a via. A first liner layer of titanium is deposited to a first thickness in the following manner. A substrate containing the via is placed within an ion metal plasma deposition chamber that contains a titanium target. The ion metal plasma deposition chamber is evacuated to a first base pressure. A first flow of argon is introduced to the ion metal plasma deposition chamber at a first deposition pressure. The substrate is biased to a first voltage. A plasma within the ion metal plasma deposition chamber is energized at a first power for a first length of time. A second liner layer of TixNy is deposited to a second thickness on top of the first liner layer of titanium in the following manner. A first flow of nitrogen and a second flow of argon are introduced to the ion metal plasma deposition chamber at a second deposition pressure. The substrate is biased to a second voltage. The plasma within the ion metal plasma deposition chamber is energized at a second power for a second length of time, after which the substrate is removed from the ion metal plasma deposition chamber. Finally, a third liner layer of titanium nitride is deposited in a second deposition chamber, and a plug of tungsten is deposited.

摘要翻译： 在通孔内形成金属化互连系统的方法。 钛的第一衬里层以下列方式沉积到第一厚度。 将含有通孔的基板放置在含有钛靶的离子金属等离子体沉积室内。 将离子金属等离子体沉积室抽真空至第一基础压力。 在第一沉积压力下将第一氩气流引入离子金属等离子体沉积室。 衬底被偏压到第一电压。 离子金属等离子体沉积室内的等离子体在第一时间内以第一功率通电。 以下列方式将第二衬垫层的Ti x N y Y n沉积到钛的第一内衬层的顶部上的第二厚度。 在第二沉积压力下，将第一氮气流和第二氩气流引入离子金属等离子体沉积室。 衬底被偏压到第二电压。 离子金属等离子体沉积室内的等离子体以第二功率被施加第二时间长度，之后从离子金属等离子体沉积室中除去衬底。 最后，在第二沉积室中沉积氮化钛的第三衬里层，并沉积钨塞。

公开(公告)号：US06204550B1

公开(公告)日：2001-03-20

申请号：US09251702

申请日：1999-02-17

申请人： Zhihai Wang ,  Wei-Jen Hsia ,  Wilbur Catabay

发明人： Zhihai Wang ,  Wei-Jen Hsia ,  Wilbur Catabay

IPC分类号： H01L23495

CPC分类号： H01L21/02071 ,  H01L21/76814 ,  H01L21/76843 ,  H01L21/76844

摘要： Provided is a method and composition for RF sputter cleaning of contact and via holes which provides substantially uniform charge distribution in the holes and minimizes electron shadowing. This is accomplished by isotropically depositing, such as by PVD, a layer of conductive material at the wafer surface surrounding a hole and down the sides of the hole. Isotropic deposition is such that in high aspect ratio trenches and holes deposition is heaviest at the top and minimal at the bottom (due to the deposition shadowing effect). The deposited conductive material is preferably a metal that is also used as a liner in the holes prior to depositing the plug material. The conductive material provides path for negative charge otherwise accumulating at the top of a hole during RF sputter cleaning to reach the bottom of the hole and thereby prevents accumulations of charge of one polarity in and around the hole. Thus, the stress on the gate oxide caused by conventional RF sputtering, described above, is relieved.

摘要翻译： 提供了用于RF溅射清洗接触孔和通孔的方法和组合物，其在孔中提供基本上均匀的电荷分布并使电子阴影最小化。 这通过诸如PVD的各向同性地沉积在围绕孔的晶片表面和孔的侧面的导电材料层来实现。 各向同性沉积使得在高纵横比下，沟槽和孔沉积在顶部最重，底部最小（由于沉积阴影效应）。 沉积的导电材料优选是在沉积插塞材料之前也用作孔中的衬垫的金属。 导电材料提供用于负电荷的路径，否则在RF溅射清洗期间积聚在孔的顶部以到达孔的底部，从而防止在孔内和周围累积一个极性的电荷。 因此，如上所述，通过常规RF溅射引起的栅极氧化物上的应力得以缓解。

公开(公告)号：US6010952A

公开(公告)日：2000-01-04

申请号：US787992

申请日：1997-01-23

申请人： Jiunn-Yann Tsai ,  Zhihai Wang ,  Wen-Chin Yeh

发明人： Jiunn-Yann Tsai ,  Zhihai Wang ,  Wen-Chin Yeh

IPC分类号： H01L21/265 ,  H01L21/28 ,  H01L21/285 ,  H01L21/3205 ,  H01L21/336 ,  H01L23/52 ,  H01L29/78 ,  H01L29/10

CPC分类号： H01L29/665 ,  H01L21/26586 ,  H01L21/28176 ,  H01L21/28518 ,  H01L29/66575

摘要： An improved process is provided for amorphizing portions of a silicon substrate and a polysilicon gate electrode surface to be converted to metal silicide by subsequent reaction of the amorphized silicon with a metal layer applied over the silicon substrate and polysilicon gate electrode after the amorphizing step. The improvement comprises implanting the exposed surface of the silicon substrate and the surface of the polysilicon gate electrode with a beam of amorphizing ions at an angle of at least 15.degree. to a line perpendicular to the plane of the surface of the silicon substrate to thereby inhibit channeling of the implanted ions through the gate electrode to the underlying gate oxide and channel of the MOS structure. The implant angle of the beam of amorphizing ions is preferably at least 30.degree., but should not exceed 60.degree., with respect to a line perpendicular to the plane of the surface of the silicon substrate.

摘要翻译： 提供了一种改进的方法，用于通过随后非晶化硅与在非晶化步骤之后施加在硅衬底和多晶硅栅电极上的金属层的反应而将硅衬底和多晶硅栅极电极表面的非晶化部分转化为金属硅化物。 该改进包括将硅衬底的暴露表面和多晶硅栅电极的表面以与硅衬底的表面平面垂直的线至少15°的角度将非晶化离子束注入，从而抑制 将植入的离子通过栅电极引导到MOS结构的底层栅极氧化物和沟道。 相对于垂直于硅衬底表面平面的线，非晶化离子束的植入角度优选为至少30°，但不应超过60°。

公开(公告)号：US5874342A

公开(公告)日：1999-02-23

申请号：US890222

申请日：1997-07-09

申请人： Jiunn-Yann Tsai ,  Zhihai Wang ,  Yen-Hui Joseph Ku

发明人： Jiunn-Yann Tsai ,  Zhihai Wang ,  Yen-Hui Joseph Ku

IPC分类号： H01L29/78 ,  H01L21/225 ,  H01L21/336

CPC分类号： H01L29/66575 ,  H01L21/2257 ,  H01L29/665

摘要： A process which is capable of forming shallow source/drain regions in a silicon substrate and a doped gate electrode by implantation of cobalt silicide contacts of uniform thickness previously formed on the substrate followed by diffusion of the dopant into the substrate to form the desired source/drain regions, and into the polysilicon gate electrode to provide the desired conductivity is described. The process comprises: first depositing a layer of cobalt over a polysilicon gate electrode and areas of a silicon substrate where source/drain regions will be formed; then forming at least one capping layer over the cobalt layer; then annealing the structure at a first temperature to form cobalt silicide; then removing the capping layer, as well as the unreacted cobalt and any cobalt reaction products other than cobalt silicide; then annealing the structure again at a higher temperature than the first anneal to form high temperature cobalt silicide; then implanting the cobalt silicide with one or more dopants suitable for forming source/drain regions in the silicon substrate and for increasing the conductivity of the polysilicon gate electrode; and then heating the structure sufficiently to cause the implanted dopant or dopants in the cobalt silicide to diffuse into the substrate to form the desired source/drain regions and into the polysilicon gate electrode to increase the conductivity thereof.

摘要翻译： 能够通过在衬底上注入预先形成均匀厚度的钴硅化物触点，然后将掺杂剂扩散到衬底中以形成所需的源极/漏极区域，从而在硅衬底和掺杂栅电极中形成浅源极/漏极区域的工艺， 漏极区域和多晶硅栅电极以提供期望的导电性。 该方法包括：首先在多晶硅栅极上沉积一层钴，并在其上形成源极/漏极区的硅衬底区域; 然后在所述钴层上形成至少一个覆盖层; 然后在第一温度下退火该结构以形成硅化钴; 然后除去覆盖层，以及未反应的钴和除了硅化钴之外的任何钴反应产物; 然后在比第一退火更高的温度下再次退火结构以形成高温钴硅酸盐; 然后用适合于在硅衬底中形成源/漏区的一种或多种掺杂剂注入硅化钴，并增加多晶硅栅电极的导电性; 然后充分加热该结构，使得硅化钴中的注入的掺杂剂或掺杂剂扩散到衬底中以形成所需的源极/漏极区并进入多晶硅栅电极以增加其导电性。

公开(公告)号：US5660682A

公开(公告)日：1997-08-26

申请号：US615437

申请日：1996-03-14

申请人： Joe W. Zhao ,  Zhihai Wang ,  Wilbur G. Catabay

发明人： Joe W. Zhao ,  Zhihai Wang ,  Wilbur G. Catabay

IPC分类号： H01L21/302 ,  H01L21/304 ,  H01L21/306 ,  H01L21/3065 ,  H01L21/311 ,  H01L21/768 ,  H01L21/461

CPC分类号： H01L21/02063 ,  H01L21/31116 ,  H01L21/76814

摘要： A method of removing material from an integrated circuit. The integrated circuit is placed within a reaction chamber, and a flow of argon and a flow of hydrogen are introduced into the reaction chamber, where the flow of hydrogen is greater than the flow of argon. The flows of argon and hydrogen are energized to form a plasma, and the material is removed from the integrated circuit by reaction of the material with the energized flows of argon and hydrogen to form gaseous products, which are pumped out of the reaction chamber. The plasma and flows of argon and hydrogen are discontinued when a desired amount of material has been removed, and the integrated circuit is removed from the reaction chamber.

摘要翻译： 从集成电路中去除材料的方法。 将集成电路放置在反应室内，并且将氩气和氢气流引入反应室中，其中氢气流量大于氩气流量。 氩气和氢气的流动被激发以形成等离子体，并且通过材料与激励的氩气和氢气流的反应将材料从集成电路移除，以形成气态产物，其被泵出反应室。 当去除所需量的材料时，停止等离子体和氩气和氢气的流动，并且将集成电路从反应室中取出。