公开(公告)号：US20100243298A1

公开(公告)日：2010-09-30

申请号：US12414122

申请日：2009-03-30

Applicant: Vadim Gektin ,  David W. Copeland

Inventor： Vadim Gektin ,  David W. Copeland

IPC: H05K1/14 ,  H01B5/00

CPC classification number: H05K3/325 ,  B82Y10/00 ,  H01R12/7082 ,  H05K2201/026 ,  H05K2201/10378

Abstract: In at least one embodiment, an interposer for a board interconnect system is provided. The interposer comprises a frame and at least one interconnect. The frame receives a substrate. The substrate includes a top side, a bottom side, and a conductive interface. The conductive interface extends through the top side and the bottom side for delivering an electrical signal from an electrical device positioned on the top side therethrough. The at least one interconnect includes a plurality of carbon nanotubes (CNTs) positioned within the frame for contacting the conductive interface of the substrate to deliver the electrical signal to a conductive arrangement of a circuit board.

Abstract translation: 在至少一个实施例中，提供了用于板互连系统的插入器。 插入器包括框架和至少一个互连件。 框架接收基板。 基板包括顶侧，底侧和导电界面。 导电接口延伸穿过顶侧和底侧，用于从位于顶侧的电气装置传送电信号。 所述至少一个互连件包括位于所述框架内的多个碳纳米管（CNT），用于接触所述基板的所述导电接口以将所述电信号传送到电路板的导电布置。

公开(公告)号：US20100242045A1

公开(公告)日：2010-09-23

申请号：US12408173

申请日：2009-03-20

Applicant: Sumedha K. Swamy ,  Kais Belgaied

Inventor： Sumedha K. Swamy ,  Kais Belgaied

IPC: G06F9/50 ,  G06F9/455

CPC classification number: G06F9/455 ,  G06F9/4856 ,  G06F2009/4557

Abstract: A method for migrating a virtual machine executing on a host. The method involves monitoring, by a monitoring agent connected to a device driver, hosts in a network, wherein the device driver is connected to a network interface card, determining a virtual machine to be migrated based on a virtual machine policy, sending, by the host, a request to migrate to at least one of a plurality of target hosts in the network, receiving an acceptance to the request to migrate from at least one of the plurality of target hosts, determining, by the monitoring agent, a chosen target host to receive the virtual machine based on a migration policy, wherein the chosen target host is one of the at least one target hosts that sent the acceptance, sending a confirmation and historical information to the chosen target host, and migrating the virtual machine to the chosen target host.

Abstract translation: 一种用于迁移在主机上执行的虚拟机的方法。 该方法包括通过连接到设备驱动程序的监视代理来监控网络中的主机，其中设备驱动程序连接到网络接口卡，基于虚拟机策略确定要迁移的虚拟机，通过 主机，迁移到网络中的多个目标主机中的至少一个的请求，接收对从多个目标主机中的至少一个迁移的请求的接受，由监视代理确定所选择的目标主机 基于迁移策略接收虚拟机，其中所选择的目标主机是发送接受的至少一个目标主机之一，向所选择的目标主机发送确认和历史信息，以及将虚拟机迁移到所选择的目标主机 目标主机。

公开(公告)号：US20100241814A1

公开(公告)日：2010-09-23

申请号：US12405483

申请日：2009-03-17

Applicant: Robert E. Cypher ,  Haakan E. Zeffer ,  Brian J. McGee ,  Bharat K. Daga

Inventor： Robert E. Cypher ,  Haakan E. Zeffer ,  Brian J. McGee ,  Bharat K. Daga

IPC: G06F12/08 ,  G06F12/00

CPC classification number: G06F12/0817 ,  G06F2212/1041

Abstract: Some embodiments of the present invention provide a system that processes a request for a cache line in a multiprocessor system that supports a directory-based cache-coherence scheme. During operation, the system receives the request for the cache line from a requesting node at a home node, wherein the home node maintains directory information for all or a subset of the address space which includes the cache line. Next, the system performs an action at the home node, which causes a valid copy of the cache line to be sent to the requesting node. The system then completes processing of the request at the home node without waiting for an acknowledgment indicating that the requesting node received the valid copy of the cache line.

Abstract translation: 本发明的一些实施例提供了一种在支持基于目录的高速缓存相干方案的多处理器系统中处理对高速缓存行的请求的系统。 在操作期间，系统从家庭节点处的请求节点接收对高速缓存行的请求，其中家庭节点维护包括高速缓存行的地址空间的全部或子集的目录信息。 接下来，系统在家庭节点处执行动作，这导致高速缓存行的有效副本被发送到请求节点。 然后，系统在家庭节点处完成对请求的处理，而不等待指示请求节点接收到高速缓存行的有效副本的确认。

公开(公告)号：US20100241804A1

公开(公告)日：2010-09-23

申请号：US12407571

申请日：2009-03-19

Applicant: Ramesh Parthasarathy ,  Bhavanishankara Sapaliga ,  Binod P G

Inventor： Ramesh Parthasarathy ,  Bhavanishankara Sapaliga ,  Binod P G

IPC: G06F12/08

CPC classification number: G06F12/0875

Abstract: In general, the invention relates to a system that includes a UUID cache and a UUID caching mechanism. The UUID caching mechanism is configured to, using a first thread, monitor the number of UUIDs stored in the UUID cache, determine that the number of UUIDs stored in the UUID cache is less than a first threshold, request a first set of UUIDs from a UUID generator, receive the first set of UUIDs from the UUID generator, and store the first set of UUIDs received from the UUID generator in the UUID cache. The UUID caching mechanism is further configured to provide a second set of UUIDs to a first application using a second thread, where at least one of the UUIDs in the second set of UUIDs is from the first set of UUIDs, and where the first thread and the second thread execute concurrently.

Abstract translation: 通常，本发明涉及一种包括UUID缓存和UUID高速缓存机制的系统。 UUID缓存机制被配置为使用第一线程监视存储在UUID高速缓存中的UUID的数量，确定存储在UUID高速缓存中的UUID的数量小于第一阈值，从第一阈值请求第一组UUID UUID生成器，从UUID生成器接收第一组UUID，并将从UUID生成器接收的第一组UUID存储在UUID高速缓存中。 UUID高速缓存机制还被配置为使用第二线程向第一应用提供第二组UUID，其中第二UUID组中的至少一个UUID来自第一组UUID，并且其中第一线程和 第二个线程并发执行。

公开(公告)号：US20100232489A1

公开(公告)日：2010-09-16

申请号：US12403330

申请日：2009-03-12

Applicant: Daniel Watkins

Inventor： Daniel Watkins

IPC: H04B17/00

CPC classification number: G01R31/31709

Abstract: A system and method to perform automatic testing of a device using Design-for-Test functionality built-in a pair of serializer/deserializer (SERDES) of the device to perform I/O characterization with respect to clock jitter in a self-test mode. Performance of a SERDES operating with jitter injected clock signal is characterized by forming a self-test loop-back configuration with another SERDES operating with a clean clock signal where the clean clock signal and the jitter injected clock signal are supplied by a simplified tester.

Abstract translation: 使用设计为测试功能的设备执行自动测试的系统和方法，内置一对器件的串行器/解串器（SERDES），以在自检模式下执行时钟抖动的I / O表征 。 使用抖动注入时钟信号运行的SERDES的性能的特征在于形成一个自检环回配置，另一个SERDES采用干净的时钟信号工作，其中干净的时钟信号和抖动注入的时钟信号由简化的测试仪提供。

公开(公告)号：US20100229021A1

公开(公告)日：2010-09-09

申请号：US12399736

申请日：2009-03-06

Applicant: Georgios K. Konstadinidis ,  Sudhakar Bobba

Inventor： Georgios K. Konstadinidis ,  Sudhakar Bobba

IPC: G06F1/08 ,  G06F1/28

CPC classification number: G06F1/305 ,  G06F1/08 ,  G06F1/3203

Abstract: A voltage droop monitoring and correcting circuit for a microprocessor includes: a monitor circuit configured to monitor voltage droops of the microprocessor and perform a temporary clock-skipping technique to compensate for the voltage droops. A method for monitoring and correcting voltage droops of a microprocessor includes: monitoring voltage droops of the microprocessor; and performing a temporary clock-skipping technique to compensate for the voltage droops. A computer system includes memory; a processor operatively connected to the memory; and computer-readable instructions stored in the memory for causing the processor to: monitor voltage droops of the microprocessor; and perform a temporary clock-skipping technique to compensate for the voltage droops.

Abstract translation: 用于微处理器的电压下降监视和校正电路包括：监视器电路，被配置为监视微处理器的电压下降并执行暂时的跳时技术以补偿电压下降。 用于监视和校正微处理器的电压下降的方法包括：监视微处理器的电压下降; 并执行临时跳时技术以补偿电压下降。 计算机系统包括存储器; 可操作地连接到存储器的处理器; 以及存储在存储器中的计算机可读指令，用于使处理器：监视微处理器的电压下降; 并执行临时的时钟跳跃技术来补偿电压下降。

公开(公告)号：US20100223322A1

公开(公告)日：2010-09-02

申请号：US12395253

申请日：2009-02-27

Applicant: Carla Mott ,  Gregory Murray

Inventor： Carla Mott ,  Gregory Murray

IPC: G06F15/16 ,  G06F3/048

CPC classification number: G06F17/30905 ,  H04L67/02 ,  H04L67/34

Abstract: A system for rendering a web page is disclosed. The system comprises a server adapted to communicate with a client. The client operates a browser in communication with the server and is arranged to render material to the browser that an end user may view on the web page. The system also includes a dynamic code set having configuration parameters for use in rendering the web page, wherein the configuration parameters are formed of a first configuration parameter including at least one of combined resources, strategically placed resource tags, headers set to ensure cacheable resources, a GZip file, and minified resources, and a second configuration parameter including at least one of combined resources, strategically placed resource tags, headers set to ensure cacheable resources, a GZip file, and minified resources. A method of creating a web application is disclosed. A machine readable medium is also disclosed.

Abstract translation: 公开了一种用于呈现网页的系统。 该系统包括适于与客户端通信的服务器。 客户端操作与服务器通信的浏览器，并且被布置为向最终用户可以在网页上查看的浏览器呈现材料。 所述系统还包括具有用于呈现所述网页的配置参数的动态代码集，其中所述配置参数由包括组合资源，策略放置的资源标签中的至少一个以及设置为确保可缓存资源的标题中的至少一个形成的第一配置参数形成， GZip文件和最小化的资源，以及包括组合资源，策略放置的资源标签，设置为确保可缓存资源的标题，GZip文件和最小化资源中的至少一个的第二配置参数。 公开了一种创建web应用的方法。 还公开了一种机器可读介质。

公开(公告)号：US20100192139A1

公开(公告)日：2010-07-29

申请号：US12359114

申请日：2009-01-23

Applicant: Benjamin L. Titzer ,  Bernd J. W. Mathiske ,  Karthikeyan Manivannan

Inventor： Benjamin L. Titzer ,  Bernd J. W. Mathiske ,  Karthikeyan Manivannan

IPC: G06F9/45

CPC classification number: G06F9/485 ,  G06F9/52 ,  G06F11/3612

Abstract: Some embodiments of the present invention provide a system that implements a safepoint for a thread, which includes a compiler and a runtime environment. During compilation of an application to be executed by the thread, the compiler obtains a register to be associated with the thread and inserts safepoint code into the application, wherein the safepoint code includes an indirect load from a memory location stored in the register to the register. During execution of the application by the thread, the runtime environment writes a thread-specific value for the thread to the register, wherein the thread-specific value corresponds to an enabled value, a triggered value, or a disabled value. In these embodiments, executing the indirect load by the thread causes the thread to trap if the thread-specific value corresponds to the triggered value.

Abstract translation: 本发明的一些实施例提供了一种实现线程的保护点的系统，其包括编译器和运行时环境。 在编译要由线程执行的应用程序期间，编译器获得与线程相关联的寄存器并将保密点代码插入到应用程序中，其中保护点代码包括从存储在寄存器中的存储器位置到寄存器的间接负载 。 在由线程执行应用程序期间，运行时环境将线程的线程特定值写入寄存器，其中线程特定值对应于使能值，触发值或禁用值。 在这些实施例中，如果线程特定值对应于触发值，则由线程执行间接负载导致线程陷阱。

公开(公告)号：US20100188119A1

公开(公告)日：2010-07-29

申请号：US12359933

申请日：2009-01-26

Applicant: Robert P. Masleid ,  Jason M. Hart

Inventor： Robert P. Masleid ,  Jason M. Hart

IPC: H03K19/0175

CPC classification number: H03K3/356139 ,  H03K3/35625

Abstract: A flip-flop or other state circuit that includes level-shifting functionality. In connection with a flip-flop, embodiments include an inverter circuit element that has a data input line as its input and a data complement line as its output. The inverter resides in voltage domain that is lower than the voltage domain associated with remainder of the flip-flop.

Abstract translation: 包括电平转换功能的触发器或其他状态电路。 结合触发器，实施例包括具有作为其输入的数据输入线和作为其输出的数据互补线的逆变器电路元件。 逆变器的电压域低于与触发器的剩余部分相关联的电压域。

公开(公告)号：US20100175851A1

公开(公告)日：2010-07-15

申请号：US12352418

申请日：2009-01-12

Applicant: ALI HEYDARI ,  KENNETH C. GROSS

Inventor： ALI HEYDARI ,  KENNETH C. GROSS

IPC: F28F7/00 ,  F28D15/00

CPC classification number: H01L23/427 ,  G06F1/20 ,  H01L23/467 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A passive heat sink for cooling an electronic component such as a high-performance processor. The heat sink includes a shell with a surface that is positionable adjacent a heat generating surface of the electronic component. The shell includes a heat exchanger portion with cooling fins extending outward and positioned in a fan-provided airflow. A generator compartment is provided within the shell with a generator vessel for containing an absorbent, and the generator compartment is maintained at a pressure lower than ambient. The generator compartment conducts heat away from the electronic component to the absorbent in the generator vessel. An absorber compartment, at a pressure lower than the generator compartment, is provided within the shell above the generator compartment, and, in use, an absorption refrigeration cycle contained within the shell is activated by heat from the electronic component. A bubble pump moves absorbent from the generator compartment to the absorber compartment.

Abstract translation: 用于冷却诸如高性能处理器的电子部件的被动散热器。 散热器包括具有可邻近电子部件的发热表面定位的表面的外壳。 壳体包括热交换器部分，其中冷却翅片向外延伸并定位在风扇提供的气流中。 发电机室设置在壳体内，发电机容器用于容纳吸收剂，发电机室保持低于环境温度的压力。 发电机室将热量从电子部件传导到发电机容器中的吸收剂。 在低于发电机室的压力下的吸收室设置在发电机室上方的壳体内，并且在使用中，包含在壳体内的吸收制冷循环由来自电子部件的热量激活。 吸气泡将吸收剂从发生器室移动到吸收室。