Analog/digital converter capable of defining and storing A/D converted
data
    41.
    发明授权
    Analog/digital converter capable of defining and storing A/D converted data 失效
    能够定义和存储A / D转换数据的模拟/数字转换器

    公开(公告)号:US5691719A

    公开(公告)日:1997-11-25

    申请号:US516076

    申请日:1995-08-17

    Inventor: Akihiko Wakimoto

    CPC classification number: G06F9/30021 G06F3/05 G06F7/544

    Abstract: An A/D converter wherein data obtained by A/D converting an analog signal in an A/D converting unit is stored in a first register, the data in the first register and the data in a second register are compared to each other by a comparator, and when the data in the first register is larger (or smaller) than that in the second register, a first switching means is closed so that the data in the first register is stored in the second register. In the second register, a maximum value (or a minimum value) of the A/D-converted data hitherto obtained is stored.

    Abstract translation: A / D转换器,其中通过A / D转换A / D转换单元中的模拟信号获得的数据被存储在第一寄存器中,将第一寄存器中的数据和第二寄存器中的数据彼此进行比较 比较器,并且当第一寄存器中的数据比第二寄存器中的数据大(或更小)时,关闭第一开关装置,使得第一寄存器中的数据存储在第二寄存器中。 在第二寄存器中,存储迄今所获得的A / D转换数据的最大值(或最小值)。

    A/D conversion process
    42.
    发明授权
    A/D conversion process 失效
    A / D转换过程

    公开(公告)号:US5604500A

    公开(公告)日:1997-02-18

    申请号:US255779

    申请日:1994-06-08

    Applicant: Kenji Murakami

    Inventor: Kenji Murakami

    CPC classification number: H03M1/08 H03M1/12

    Abstract: In a control circuit including an A/D converter, a parallel-to-serial input buffer, a parallel input buffer, a serial-to-parallel output buffer and a parallel output buffer which are built in a chip, provided with a microcomputer, an A/D conversion is carried out by controlling a time of an A/D conversion conducted by the A/D converter correspondingly to a condition of an output port of the output buffer, thereby preventing an A/D converted value from being affected by an inversion in the output of the buffer.

    Abstract translation: 在设置有微计算机的包括内置于芯片中的A / D转换器,并行串行输入缓冲器,并行输入缓冲器,串并行输出缓冲器和并行输出缓冲器的控制电路中, 通过根据输出缓冲器的输出端口的条件控制由A / D转换器进行的A / D转换的时间来进行A / D转换,从而防止A / D转换值受到 在缓冲区的输出中反转。

    Monitoring system and interface apparatus therefor
    43.
    发明授权
    Monitoring system and interface apparatus therefor 失效
    监控系统及其接口设备

    公开(公告)号:US5551016A

    公开(公告)日:1996-08-27

    申请号:US84928

    申请日:1993-07-01

    CPC classification number: G06F3/05

    Abstract: In monitoring systems for acquiring data about a subject, such as are used, for example, in the medical, scientific and engineering fields, determination of temporal relationships between data acquired from multiple monitoring devices is facilitated by means of an interface unit which interconnects the monitoring devices with tape recorders for storing the data and a computer for processing the data. The interface unit generates various timing and control signals including a time code signal. The interface unit supplies the time code signal to the recording devices for recording simultaneously with the data. The time code signal may be a linear time code (LTC) derived from a video sync signal generated by the interface unit for synchronizing a camera. A sampling clock signal for controlling digitizing of the analog data acquired by the system is derived from the time code signal. The time code signal may comprise a common temporal reference signal, for example the SMPTE used with NTSC format video or its European equivalent EBU used with the PAL format. The video synchronization signal may itself be synchronized to and external timing signal, perhaps derived from one of the monitoring devices.

    Abstract translation: 在用于获取关于被摄体的数据的监视系统中,例如在医学,科学和工程领域中使用的方法中,通过将监视器互连的接口单元来确定从多个监视设备获取的数据之间的时间关系的确定 具有用于存储数据的磁带录音机的设备和用于处理数据的计算机。 接口单元产生包括时间码信号的各种定时和控制信号。 接口单元将时间码信号提供给记录装置,以与数据同时记录。 时间码信号可以是从用于同步摄像机的接口单元生成的视频同步信号导出的线性时间码(LTC)。 从时间码信号导出用于控制由系统获取的模拟数据的数字化的采样时钟信号。 时间码信号可以包括公共时间参考信号,例如与NTSC格式视频一起使用的SMPTE或其与PAL格式一起使用的欧洲等效EBU。 视频同步信号本身可以被同步到外部定时信号,也可以从监视设备之一导出。

    Method and control apparatus for generating analog recurrent signal
security data feedback
    44.
    发明授权
    Method and control apparatus for generating analog recurrent signal security data feedback 失效
    用于产生模拟反复信号安全数据反馈的方法和控制装置

    公开(公告)号:US5515288A

    公开(公告)日:1996-05-07

    申请号:US77745

    申请日:1993-06-18

    Inventor: Michael Aberson

    CPC classification number: G06F3/05 G05B19/41875 G05B2219/32191 Y02P90/22

    Abstract: A microprocessor-based apparatus provided as a dedicated control unit, which enables a standard software protocol to provide a digital presentation of security criteria associated with stable analog process data relating to recurrent processes in businesses and utilities. The general method introduced here provides security criteria data in two functional control loops: First, the I-criterion provides continuous monitoring of the input analog signal and interruptions thereof, which are presented in time units. Second, the Q-criterion provides the input analog signal conversion in digital form, and identifies the signal quality by determining whether it falls within or deviates from a standard tolerance range. In addition, a stochastic signal decomposition is performed to provide four 6-hour disjoint data files within a behavioristic control loop/each calendar day. The final output document is a rectangular digital format which can be adequately presented in printed or written form, enabling a fast response for local and strategic decision-making, including end user's feedback and use in a capable of standard data highway protocol.

    Abstract translation: 作为专用控制单元提供的基于微处理器的设备,其使得标准软件协议能够提供与企业和实用程序中的经常性过程相关的稳定模拟过程数据相关联的安全标准的数字呈现。 这里介绍的一般方法提供了两个功能控制回路中的安全标准数据:首先,I标准提供对输入模拟信号及其中断的连续监控,以时间单位显示。 第二,Q标准提供数字形式的输入模拟信号转换,并通过确定信号质量是否落在标准公差范围内或偏离标准公差范围来识别信号质量。 此外,执行随机信号分解以在行为控制环路/每个日历日内提供四个6小时不相交的数据文件。 最终的输出文档是一种矩形数字格式,可以以印刷或书写形式充分呈现,从而能够快速响应本地和战略决策,包括终端用户的反馈和使用能力的标准数据高速公路协议。

    Offset-compensated sample and hold arrangement and method for its
operation
    45.
    发明授权
    Offset-compensated sample and hold arrangement and method for its operation 失效
    偏移补偿采样和保持装置及其操作方法

    公开(公告)号:US5506526A

    公开(公告)日:1996-04-09

    申请号:US290862

    申请日:1994-10-17

    CPC classification number: G11C27/026 H03F1/303

    Abstract: Offset-compensated sample and hold arrangement to sample an input signal comprising at least an operational amplifier (A), a first capacitor (C1), a second capacitor (C2), a first switch (S110), a second switch (S211), a third switch (S210), a fourth switch (S111), a fifth switch (S120), a sixth switch (S121), a seventh switch (S220) and an eighth switch (S221), which switches capacitors and operational amplifier are interconnected in such a way and may be switched in such a way that during an offset-compensation phase the output voltage will only experience a very small voltage change.

    Abstract translation: PCT No.PCT / NL93 / 00038 Sec。 371日期:1994年10月17日 102(e)日期1994年10月14日PCT提交1993年2月18日PCT公布。 公开号WO93 / 17436 日期:1993年9月2日。偏移补偿采样和保持装置以对至少包括运算放大器(A),第一电容器(C1),第二电容器(C2),第一开关(S110) 第二开关(S211),第三开关(S210),第四开关(S111),第五开关(S120),第六开关(S121),第七开关(S220)和第八开关(S221) 开关电容器和运算放大器以这样的方式互连,并且可以以这样的方式切换,使得在偏移补偿阶段期间,输出电压将仅经历非常小的电压变化。

    Monolithic integrated circuit having common external terminal for analog
and digital signals and digital system using the same

    公开(公告)号:USRE35197E

    公开(公告)日:1996-04-02

    申请号:US454380

    申请日:1989-12-20

    Applicant: Shirou Baba

    Inventor: Shirou Baba

    CPC classification number: G06F15/7832 G06F3/05

    Abstract: Herein disclosed is a digital semiconductor integrated circuit which is equipped with: a digital signal input circuit; an analog signal input circuit made receptive of an analog signal for feeing out a digital signal corresponding to said analog signal; and a common external terminal connected commonly with the input terminals of said digital signal input circuit and said analog signal input circuit. By the preparation with the use of a suitable switch circuit, the aforementioned common external terminal can be used as either an analog signal input terminal or a digital signal input terminal. As a result, the number of the external output terminals required for the aforementioned semiconductor integrated circuit can be reduced.

    CD-ROM data retrieval system using a hands-free command controller and
headwear monitor
    47.
    发明授权
    CD-ROM data retrieval system using a hands-free command controller and headwear monitor 失效
    CD-ROM数据检索系统使用免提指令控制器和头戴式显示器

    公开(公告)号:US5450596A

    公开(公告)日:1995-09-12

    申请号:US732047

    申请日:1991-07-18

    Inventor: Lee Felsenstein

    CPC classification number: G06F1/163

    Abstract: A video display attached to a lightweight headpiece and using a zero motion mouse for the input of commands. The system accesses data from a CD-ROM reader and can store user generated data to a memory card for later retrieval. It is light enough to be worn by the user and does not interfere with the use of the user's hands.

    Abstract translation: 视频显示器连接到轻量级头戴式耳机上,并使用零动作鼠标进行命令输入。 该系统从CD-ROM读取器访问数据,并且可以将用户生成的数据存储到存储卡中以备以后检索。 它足够轻以使用者佩戴,并且不会干扰使用者的手。

    Apparatus and method for real-time extraction and display of musical
chord sequences from an audio signal
    48.
    发明授权
    Apparatus and method for real-time extraction and display of musical chord sequences from an audio signal 失效
    用于从音频信号实时提取和显示音乐和弦序列的装置和方法

    公开(公告)号:US5440756A

    公开(公告)日:1995-08-08

    申请号:US951397

    申请日:1992-09-28

    Inventor: Bruce E. Larson

    CPC classification number: G10H1/383 G10H1/0008 G10H1/12 G10H2210/081

    Abstract: An apparatus and method are provided for processing an audio signal conveying a musical passage so as to reveal the sequence of musical chords contained within that passage. The signal is amplified, filtered, and converted to digital data, which are then processed using digital filters to determine in real time the amplitude of every note within a predetermined note range. The most prominent notes are compared to chord patterns to determine which, if any, chord is implied, and the chord name is then displayed to the user. Further provided is a means for detecting and correcting for any deviation of the pitches of the notes in the passage from their standard frequencies.

    Abstract translation: 提供了一种用于处理传送音乐通道的音频信号以便显示包含在该通道内的音乐和弦序列的装置和方法。 信号被放大,滤波并转换成数字数据,然后使用数字滤波器对数字数据进行处理,以实时确定预定音符范围内每个音符的幅度。 将最突出的音符与和弦模式进行比较,以确定暗示哪个(如果有的话),并且和弦名称然后显示给用户。 还提供了一种用于检测和校正通道中的音符的间距与其标准频率的任何偏差的装置。

    Key touch adjusting method and device
    49.
    发明授权
    Key touch adjusting method and device 失效
    键触式调节方法及装置

    公开(公告)号:US5434566A

    公开(公告)日:1995-07-18

    申请号:US306735

    申请日:1994-09-15

    Abstract: A key touch adjusting device wherein the position of a key top is detected, and a resistive force corresponding to that position is generated and applied to the key top. The numeral array for the position data and the force data is stored in a memory. To apply hysteresis to a key force profile curve, a RS flip-flop whose output is inverted by the position data is provided to generate different resistive forces in the key top depressing process and the key top returning process. Also disclosed are a method of comparing an actually obtained profile curve with a predetermined profile curve on a display device by detecting both the position of the key top and the depressing force thereof, a method of achieving hysteresis characteristics by storing a plurality of numeral arrays of the depressing force vs. the displacement in a memory of a control computer beforehand and by changing the numeral array according to the position of the key top, a mechanism for restricting a range in which the key top is displaced, and a method of generating an on/off signal corresponding to the position of the key top without using an electrical contact.

    Abstract translation: 一种键触摸调节装置,其中检测到键顶的位置,并且产生与该位置对应的阻力,并将其应用于键顶。 用于位置数据和力数据的数字数组存储在存储器中。 为了对关键力曲线曲线应用滞后,提供其输出由位置数据反转的RS触发器,以在按键顶部按压过程和键顶返回过程中产生不同的阻力。 还公开了一种通过检测键顶的位置和其按压力来比较实际获得的轮廓曲线与显示装置上的预定轮廓曲线的方法,通过存储多个数字阵列来实现滞后特性的方法 预先控制计算机的存储器中的压下力与根据键顶的位置改变数字数组的排列力,限制键顶移动的范围的机构,以及生成 对应于键顶的位置的开/关信号,而不使用电接触。

    Microcomputer having test circuit for A/D converter
    50.
    发明授权
    Microcomputer having test circuit for A/D converter 失效
    微电脑具有A / D转换器的测试电路

    公开(公告)号:US5389926A

    公开(公告)日:1995-02-14

    申请号:US92360

    申请日:1993-07-15

    CPC classification number: G06F3/05 H03M1/1071 H03M1/12

    Abstract: Disclosed herein is a microcomputer having a test circuit for an A/D converter of a C/R type. This converter includes a resistor circuit having a plurality of resistors connected in series between reference potential points to generate a changeable reference voltage and a capacitor circuit having a plurality of capacitors for storing electrical charges relative to an analog input voltage and to the changeable reference voltage, and the test circuit is coupled to the resistor circuit and the capacitor circuit and further to first and second terminals and activated in a test mode to transfer the changeable reference voltage to the first terminal and another reference voltage, which is produced outside the microcomputer, to the capacitor circuit.

    Abstract translation: 这里公开了具有用于C / R型的A / D转换器的测试电路的微型计算机。 该转换器包括具有串联连接在参考电位点之间的多个电阻器以产生可变参考电压的电阻器电路,以及具有用于存储相对于模拟输入电压和可变参考电压的电荷的多个电容器的电容器电路, 并且测试电路耦合到电阻器电路和电容器电路,并且进一步耦合到第一和第二端子并且在测试模式下被激活以将可变参考电压传送到第一端子,并将另外的在微计算机外部产生的参考电压传送到 电容电路。

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