Abstract:
An A/D converter wherein data obtained by A/D converting an analog signal in an A/D converting unit is stored in a first register, the data in the first register and the data in a second register are compared to each other by a comparator, and when the data in the first register is larger (or smaller) than that in the second register, a first switching means is closed so that the data in the first register is stored in the second register. In the second register, a maximum value (or a minimum value) of the A/D-converted data hitherto obtained is stored.
Abstract:
In a control circuit including an A/D converter, a parallel-to-serial input buffer, a parallel input buffer, a serial-to-parallel output buffer and a parallel output buffer which are built in a chip, provided with a microcomputer, an A/D conversion is carried out by controlling a time of an A/D conversion conducted by the A/D converter correspondingly to a condition of an output port of the output buffer, thereby preventing an A/D converted value from being affected by an inversion in the output of the buffer.
Abstract:
In monitoring systems for acquiring data about a subject, such as are used, for example, in the medical, scientific and engineering fields, determination of temporal relationships between data acquired from multiple monitoring devices is facilitated by means of an interface unit which interconnects the monitoring devices with tape recorders for storing the data and a computer for processing the data. The interface unit generates various timing and control signals including a time code signal. The interface unit supplies the time code signal to the recording devices for recording simultaneously with the data. The time code signal may be a linear time code (LTC) derived from a video sync signal generated by the interface unit for synchronizing a camera. A sampling clock signal for controlling digitizing of the analog data acquired by the system is derived from the time code signal. The time code signal may comprise a common temporal reference signal, for example the SMPTE used with NTSC format video or its European equivalent EBU used with the PAL format. The video synchronization signal may itself be synchronized to and external timing signal, perhaps derived from one of the monitoring devices.
Abstract:
A microprocessor-based apparatus provided as a dedicated control unit, which enables a standard software protocol to provide a digital presentation of security criteria associated with stable analog process data relating to recurrent processes in businesses and utilities. The general method introduced here provides security criteria data in two functional control loops: First, the I-criterion provides continuous monitoring of the input analog signal and interruptions thereof, which are presented in time units. Second, the Q-criterion provides the input analog signal conversion in digital form, and identifies the signal quality by determining whether it falls within or deviates from a standard tolerance range. In addition, a stochastic signal decomposition is performed to provide four 6-hour disjoint data files within a behavioristic control loop/each calendar day. The final output document is a rectangular digital format which can be adequately presented in printed or written form, enabling a fast response for local and strategic decision-making, including end user's feedback and use in a capable of standard data highway protocol.
Abstract:
Offset-compensated sample and hold arrangement to sample an input signal comprising at least an operational amplifier (A), a first capacitor (C1), a second capacitor (C2), a first switch (S110), a second switch (S211), a third switch (S210), a fourth switch (S111), a fifth switch (S120), a sixth switch (S121), a seventh switch (S220) and an eighth switch (S221), which switches capacitors and operational amplifier are interconnected in such a way and may be switched in such a way that during an offset-compensation phase the output voltage will only experience a very small voltage change.
Abstract:
Herein disclosed is a digital semiconductor integrated circuit which is equipped with: a digital signal input circuit; an analog signal input circuit made receptive of an analog signal for feeing out a digital signal corresponding to said analog signal; and a common external terminal connected commonly with the input terminals of said digital signal input circuit and said analog signal input circuit. By the preparation with the use of a suitable switch circuit, the aforementioned common external terminal can be used as either an analog signal input terminal or a digital signal input terminal. As a result, the number of the external output terminals required for the aforementioned semiconductor integrated circuit can be reduced.
Abstract:
A video display attached to a lightweight headpiece and using a zero motion mouse for the input of commands. The system accesses data from a CD-ROM reader and can store user generated data to a memory card for later retrieval. It is light enough to be worn by the user and does not interfere with the use of the user's hands.
Abstract:
An apparatus and method are provided for processing an audio signal conveying a musical passage so as to reveal the sequence of musical chords contained within that passage. The signal is amplified, filtered, and converted to digital data, which are then processed using digital filters to determine in real time the amplitude of every note within a predetermined note range. The most prominent notes are compared to chord patterns to determine which, if any, chord is implied, and the chord name is then displayed to the user. Further provided is a means for detecting and correcting for any deviation of the pitches of the notes in the passage from their standard frequencies.
Abstract:
A key touch adjusting device wherein the position of a key top is detected, and a resistive force corresponding to that position is generated and applied to the key top. The numeral array for the position data and the force data is stored in a memory. To apply hysteresis to a key force profile curve, a RS flip-flop whose output is inverted by the position data is provided to generate different resistive forces in the key top depressing process and the key top returning process. Also disclosed are a method of comparing an actually obtained profile curve with a predetermined profile curve on a display device by detecting both the position of the key top and the depressing force thereof, a method of achieving hysteresis characteristics by storing a plurality of numeral arrays of the depressing force vs. the displacement in a memory of a control computer beforehand and by changing the numeral array according to the position of the key top, a mechanism for restricting a range in which the key top is displaced, and a method of generating an on/off signal corresponding to the position of the key top without using an electrical contact.
Abstract:
Disclosed herein is a microcomputer having a test circuit for an A/D converter of a C/R type. This converter includes a resistor circuit having a plurality of resistors connected in series between reference potential points to generate a changeable reference voltage and a capacitor circuit having a plurality of capacitors for storing electrical charges relative to an analog input voltage and to the changeable reference voltage, and the test circuit is coupled to the resistor circuit and the capacitor circuit and further to first and second terminals and activated in a test mode to transfer the changeable reference voltage to the first terminal and another reference voltage, which is produced outside the microcomputer, to the capacitor circuit.