公开(公告)号：US11418046B2

公开(公告)日：2022-08-16

申请号：US16976137

申请日：2019-12-06

申请人： Contemporary Amperex Technology Co., Limited

发明人： Jinbo Cai ,  Zhimin Dan ,  Wei Zhang ,  Yizhen Hou ,  Xiong Zheng

IPC分类号： H02J7/00 ,  H03K17/567 ,  H03K17/687

摘要： A charge and discharge circuit includes: a charging loop, including a battery pack, a first switch module and a charging device connected in series, where, the charging loop is configured to charge the battery pack using the charging device, and precharge the charging device; and a discharging loop, including the battery pack, a second switch module and an electric device connected in series, where, the discharging loop is configured to make the battery pack discharge to the electric device, and precharge the electric device; where, the first switch module and the second switch module each include at least one switch, and a part of switches in the first switch module and the second switch module are semiconductor switches, and the other part of the switches in the first switch module and the second switch module are relays.

公开(公告)号：US20220243694A1

公开(公告)日：2022-08-04

申请号：US17616173

申请日：2019-06-24

申请人： KUNSHAN CADIC AUTO ELECTRIC CO LTD

发明人： Shen Shiye

IPC分类号： F02P3/045 ,  H03K5/22 ,  H03K17/567

摘要： Disclosed is an ignition drive module with stable performance and reliable function, which comprises a module signal input end, a voltage input end, a module signal output end, a comparator connected to the module signal input end a maximum dwell timer module connected to the comparator, a logical judgment module connected to the comparator, and an insulated gate bipolar transistor connected to the logical judgment module. The logical judgment module receives signals from the maximum dwell timer module and the comparator to determine whether to activate the insulated gate bipolar transistor. The output end of the insulated gate bipolar transistor is connected to the module signal output end.

公开(公告)号：US11380784B2

公开(公告)日：2022-07-05

申请号：US16773889

申请日：2020-01-27

申请人： FUJI ELECTRIC CO., LTD.

发明人： Misaki Takahashi ,  Yuichi Harada ,  Kouta Yokoyama

IPC分类号： H01L29/73 ,  H01L29/739 ,  H01L27/07 ,  H01L29/861 ,  H03K17/0814 ,  H03K17/567

摘要： Provided is a semiconductor device that includes a first conductivity type well region below a gate runner portion, wherein a diode region includes first contact portions, a first conductivity type anode region, and a second conductivity type cathode region; wherein the well region contacts the diode region in the first direction, and when an end of the well region, an end of at least one of first contact portions, and an end of the cathode region that face one another in the first direction are imaginary projected on an upper surface of the semiconductor substrate, a first distance is longer than a second distance, the first distance being a distance between the end of the well region and the end of the cathode region, and the second distance being a distance between the end of the well region and the end of the at least one first contact portion.

公开(公告)号：US20220182053A1

公开(公告)日：2022-06-09

申请号：US17280907

申请日：2020-08-10

申请人： SHANGHAI YAOHUO MICROELECTRONICS Co., Ltd.

发明人： Hongxia TAO

IPC分类号： H03K17/567

摘要： The present invention provides a single-pole double-throw switch circuit with a Type-C interface, an analog switch chip and an electronic device, which can generate a reverse bias voltage across a first diode, so that a capacitance value of a PN junction can be significantly reduced after the reverse bias voltage is applied to the PN junction. Further, a ground capacitance corresponding to a COM point when the first diode is turned off can be effectively reduced, avoiding the reduction of a bandwidth of a digital path due to excessive capacitance. It can be seen that the present invention can realize a large size of a first field effect transistor and a high bandwidth of the digital path simultaneously, thereby facilitating the simultaneous improvement of the THD performance of an analog audio path and the bandwidth of the digital path, and avoiding conflicts between the two.

公开(公告)号：US11349156B2

公开(公告)日：2022-05-31

申请号：US16656736

申请日：2019-10-18

申请人： TOYOTA JIDOSHA KABUSHIKI KAISHA

发明人： Naoki Yanagizawa ,  Shuji Tomura ,  Kyosuke Tanemura ,  Kazuo Ootsuka ,  Shigeaki Goto ,  Junta Izumi ,  Kenji Kimura

IPC分类号： H01M10/42 ,  H03K17/567

摘要： In a power supply device including a plurality of battery modules each including a secondary battery, in which the battery modules are connected in series to one another according to a gate driving signal from a controller and in each of the battery modules, the gate driving signal is delayed in a gate driving signal processing circuit included in the battery module and then transmitted from upstream to downstream of the series connection, an ID is provided for each of the battery modules by transmitting an ID setting signal for providing an ID unique to the battery module using a gate signal line for transmitting the gate driving signal.

公开(公告)号：US20220123745A1

公开(公告)日：2022-04-21

申请号：US17072470

申请日：2020-10-16

申请人： ABB Schweiz AG

发明人： Pietro Cairoli ,  Eddy Aeloiza ,  Xiaoqing Song

IPC分类号： H03K17/567 ,  H03K17/76 ,  H03K17/0812

摘要： Systems, methods, techniques and apparatuses of power switches are disclosed. One exemplary embodiment is a power switch comprising a first semiconductor device and a second semiconductor device coupled together in a first anti-series configuration between a first terminal and a second terminal; a third semiconductor device and a fourth semiconductor device coupled together in a second anti-series configuration between the first terminal and the second terminal; a controller configured to operate the power switch to simultaneously conduct a first portion of a load current from the first terminal to the second terminal by closing the first semiconductor device and the second semiconductor device, and to conduct a second portion of the load current from the first terminal to the second terminal by closing the third semiconductor device and the fourth semiconductor device.

公开(公告)号：US20220103170A1

公开(公告)日：2022-03-31

申请号：US17039921

申请日：2020-09-30

申请人： NXP B.V.

发明人： Domenico Liberti ,  Andre Gunther ,  Jeffrey Alan Goswick

IPC分类号： H03K17/687 ,  H03K17/567

摘要： An n-well voltage switching circuit (60) and methodology are disclosed for generating a maximum bias voltage (VMAX) at the output voltage node with cross-coupled PMOS switching transistors (63) connected to a voltage supply remapping circuit (61, 62, 64) which receives first and second power supplies (VSUP1, VSUP2) and generates first and second gate driving signals (G1, G4), wherein the first and second gate driving signals are connected, respectively, to the gates of the first and second cross-coupled PMOS transistors (P5, P6) to pull a gate for one of the cross-coupled PMOS transistors to ground so that the higher of the first and second power supplies is coupled to the output voltage node over one of the first and second cross-coupled PMOS transistors, thereby generating a maximum bias voltage at the output voltage node.

公开(公告)号：US11290104B2

公开(公告)日：2022-03-29

申请号：US17374999

申请日：2021-07-14

申请人： CHANGXIN MEMORY TECHNOLOGIES, INC.

发明人： Yinchuan Gu

IPC分类号： H03B1/00 ,  H03K3/00 ,  H03K17/567 ,  G11C11/4076

摘要： A driving circuit includes: a primary driving module configured to receive a first signal and generate a second signal based on the first signal, driving capability of the second signal being greater than that of the first signal; and an auxiliary driving module connected to an output terminal of the primary driving module and configured to receive the first signal and generate an auxiliary driving signal based on the first signal, the auxiliary driving signal being configured to shorten a rise time of the second signal.

公开(公告)号：US11290001B2

公开(公告)日：2022-03-29

申请号：US17052711

申请日：2019-03-05

申请人： TOSHIBA MITSUBISHI-ELECTRIC INDUSTRIAL SYSTEMS CORPORATION

发明人： Xiaochen Zhang ,  Toshihide Nakano

IPC分类号： H02M1/34 ,  H02J9/06 ,  H02M3/335 ,  H03K17/16 ,  H03K17/567

摘要： The uninterruptible power supply device includes a switch (2) that includes first to Nth IGBT units (U1 to UN) connected in series, and a controller that turns on the switch by turning on the first to Nth IGBT units, and turns off the switch by firstly turning off the first to nth IGBT units and then turning off the (n+1)th to Nth IGBT units. Compared with the case where the first to Nth IGBT units are turned off at the same time, it is possible to reduce a surge voltage generated between the terminals of the switch (2).

公开(公告)号：US20220077849A1

公开(公告)日：2022-03-10

申请号：US17196748

申请日：2021-03-09

申请人： KABUSHIKI KAISHA TOSHIBA

发明人： Kentaro IKEDA

IPC分类号： H03K17/082 ,  H03K17/567 ,  H03K17/693

摘要： According to one embodiment, electronic circuitry includes a first surge voltage detection circuit configured to detect a surge voltage generated due to switching of a switching device and generate a first signal indicating a first current; and a current generation circuit configured to generate a second current larger than the first current by amplifying a current in response to input of the first signal and output the second current to a control terminal of the switching device.