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公开(公告)号：US20240128349A1
公开(公告)日：2024-04-18
申请号：US18453336
申请日：2023-08-22
发明人： Atsushi ONOGAWA , Kaname MITSUZUKA , Yuuki ODA , Tohru SHIRAKAWA
IPC分类号： H01L29/66 , H01L29/08 , H01L29/739
CPC分类号： H01L29/66348 , H01L29/0821 , H01L29/7397
摘要： Provided is a semiconductor device including: a drift region of a first conductivity type provided in a semiconductor substrate; a collector region of a second conductivity type provided on a back surface of the semiconductor substrate; a cathode region of the first conductivity type provided on the back surface of the semiconductor substrate and having a higher doping concentration than the drift region; a plurality of trench portions provided on a front surface of the semiconductor substrate; and a lifetime control portion provided in the semiconductor substrate and containing a lifetime killer, in which the lifetime control portion includes: a main region provided in a diode portion; and a decay region provided to extend from the main region in a direction parallel to the front surface of the semiconductor substrate and having a lifetime killer concentration that has decayed more than a lifetime killer concentration of the main region.
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公开(公告)号：US20240128320A1
公开(公告)日：2024-04-18
申请号：US18542812
申请日：2023-12-18
IPC分类号： H01L29/08 , H01L21/265 , H01L27/06 , H01L29/06 , H01L29/739 , H01L29/861
CPC分类号： H01L29/0834 , H01L21/26513 , H01L27/0664 , H01L29/0638 , H01L29/7397 , H01L29/8613
摘要： Provided is a semiconductor device in which a doping concentration peak of a buffer region has a local maximum at which a doping concentration shows a local maximum value, a lower tail in which the doping concentration monotonously decreases from the local maximum toward a lower surface, and an upper tail in which the doping concentration monotonously decreases from the local maximum toward an upper surface, and at least one of the doping concentration peaks of the buffer region is a gradual concentration peak in which a slope ratio obtained by dividing an absolute value of a slope of the upper tail by an absolute value of a slope of the lower tail is 0.1 or more and 3 or less.
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公开(公告)号：US20240120249A1
公开(公告)日：2024-04-11
申请号：US18457987
申请日：2023-08-29
发明人： Hayato NAKANO
IPC分类号： H01L23/31 , H01L23/00 , H01L23/373 , H01L23/498
CPC分类号： H01L23/3142 , H01L23/3735 , H01L23/49811 , H01L23/562 , H01L24/48 , H01L2224/48227 , H01L2924/13055 , H01L2924/3512
摘要： [Problem] An object of the present invention is to provide a semiconductor module capable of preventing a wire wiring from being broken because of a crack having occurred in sealing resin.
[Solution] A semiconductor module 1 includes semiconductor chips 14a to 14d, sealing resin 18 configured to seal the semiconductor chips 14a to 14d, a case 11 including a casting area 117u, first portions 111 and 112, and second portions 113 and 114, wire wirings 101a to 101j and 102a to 102i sealed in the sealing resin 18 while being located closer to the first portion 111 and connected to the semiconductor chips 14a to 14d, and recessed portions 131a, 131b, 132a, and 132b formed on the second portions 113 and 114 between a virtual surface VSu and the first portion 112.-
公开(公告)号：US11949338B2
公开(公告)日：2024-04-02
申请号：US17652162
申请日：2022-02-23
发明人： Yuji Suzuki , Motohito Hori , Akio Toba , Ikuya Sato , Yasuhito Tanaka , Masamichi Iwasaki , Masaaki Ajima , Nobuaki Ohguri
CPC分类号： H02M3/33569 , H02M1/327 , H02M7/003
摘要： A power converter includes a positive busbar electrically connected to a positive terminal and the first capacitor electrode, and includes a negative busbar electrically connected to a negative terminal and the second capacitor electrode. The power converter includes output busbars each electrically connected to a given output terminal among multiple output terminals, a given high-side switching element among a plurality of high-side switching elements, and a given low-side switching element among a plurality of low-side switching elements. The power converter includes a cooler that cools the high-side switching elements and the low-side switching elements. The power converter includes a housing that accommodates a supply tube and a discharge tube. The positive terminal, the negative terminal, the output terminals, the inlet port, and the outlet port are exposed on the housing. The inlet port, the outlet port, the supply tube, and the discharge tube are separate members from the housing.
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公开(公告)号：US11948976B2
公开(公告)日：2024-04-02
申请号：US17514673
申请日：2021-10-29
发明人： Takeshi Tawara , Hidekazu Tsuchida , Koichi Murata
IPC分类号： H01L29/08 , H01L29/167 , H01L29/78 , H01L29/16
CPC分类号： H01L29/0878 , H01L29/167 , H01L29/7805 , H01L29/1608 , H01L29/7813
摘要： A vertical metal oxide semiconductor field effect transistor, including a starting substrate of a first conductivity type, a second first-conductivity-type epitaxial layer provided on a first surface of the starting substrate via a first first-conductivity-type epitaxial layer, a first semiconductor region of the first conductivity type provided as a portion of the second first-conductivity-type epitaxial layer, a second-conductivity-type epitaxial layer forming a pn junction interface with the second first-conductivity-type epitaxial layer and supplying a minority carrier to the second first-conductivity-type epitaxial layer, a plurality of second semiconductor regions of the first conductivity type selectively provided in the second-conductivity-type epitaxial layer, a plurality of trenches penetrating through the second semiconductor regions and the second-conductivity-type epitaxial layer, and a plurality of gate electrodes provided in the trenches via gate insulating films. A lifetime of the minority carrier of the first semiconductor region is shorter than that of the rest of the second first-conductivity-type epitaxial layer.
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公开(公告)号：US20240097556A1
公开(公告)日：2024-03-21
申请号：US18236984
申请日：2023-08-23
发明人： Isao KAKEBE
CPC分类号： H02M1/088 , H02M1/0009 , H02M1/0025 , H02M1/32
摘要： An object of the present disclosure is to provide a semiconductor module capable of reducing variation in drive characteristics of each of plural semiconductor switching elements. A semiconductor module includes IGBTs configured to supply power to a load and gate driver circuits in which drive targets are set in a one-to-one relationship to the IGBTs and in which according to a positional relationship to, for example, the IGBT as the drive target, a driving capability of the gate driver circuit to drive the IGBT is set.
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公开(公告)号：US20240097025A1
公开(公告)日：2024-03-21
申请号：US18521509
申请日：2023-11-28
发明人： Akimasa KINOSHITA
CPC分类号： H01L29/7813 , H01L29/063 , H01L29/0696 , H01L29/086 , H01L29/1608
摘要： N+-type source regions, low-concentration regions, and p++-type contact regions are each selectively provided in surface regions of a semiconductor substrate, at a front surface thereof, and are in contact with a source electrode. The n+-type source regions and the low-concentration regions are in contact with a gate insulating film at sidewalls of a trench and are adjacent to channel portions of a p-type base region, in a depth direction. The p++-type contact regions are disposed apart from the trench. In surface regions of an epitaxial layer constituting the p-type base region, portions left free of the n+-type source regions and the p++-type contact regions configure the low-concentration regions of an n−-type or a p−-type. The low-concentration regions are disposed periodically along the trench, between the trench and the p++-type contact regions. By the described structure, short-circuit withstand capability may be increased without increasing the number of processes.
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公开(公告)号：US11935774B2
公开(公告)日：2024-03-19
申请号：US17751617
申请日：2022-05-23
CPC分类号： H01L21/68
摘要： Provided is an assembly jig set of semiconductor module having a plurality of semiconductor chips, the assembly jig set comprising: a first outer frame jig; and a plurality of inner piece jigs positioned by the first outer frame jig and each having a sectioned shape corresponding to the first outer frame jig, wherein one of the inner piece jigs has a plurality of opening portions for positioning the semiconductor chips. A manufacturing method of a semiconductor module using an assembly jig set is provided.
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公开(公告)号：US20240088221A1
公开(公告)日：2024-03-14
申请号：US18513685
申请日：2023-11-20
发明人： Kaname MITSUZUKA
IPC分类号： H01L29/08 , H01L29/06 , H01L29/417 , H01L29/739
CPC分类号： H01L29/0804 , H01L29/0696 , H01L29/41708 , H01L29/7397
摘要： A semiconductor device includes: a gate trench portion provided in a semiconductor substrate; a first trench portion provided in the semiconductor substrate and adjacent to the gate trench portion; an emitter region of a first conductivity type provided to be in contact with the gate trench portion in a mesa portion between the gate trench portion and the first trench portion; a contact region of a second conductivity type provided to be in contact with the first trench portion in the mesa portion; a metal layer provided above the semiconductor substrate; and a resistance portion of the first conductivity type provided to be in contact with the metal layer and the emitter region and having a lower doping concentration than that of the emitter region.
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公开(公告)号：US11929354B2
公开(公告)日：2024-03-12
申请号：US17134646
申请日：2020-12-28
发明人： Masanari Fujii
IPC分类号： G01N17/04 , H01L23/00 , H01L25/075 , H01L25/18 , H02M7/00 , H02M7/5387 , G01K13/00
CPC分类号： H01L25/0753 , G01N17/04 , H01L24/32 , H01L24/48 , H01L24/73 , H01L25/18 , H02M7/003 , H02M7/53871 , G01K13/00 , H01L2224/32225 , H01L2224/48227 , H01L2224/73265 , H01L2924/1203 , H01L2924/13055 , H01L2924/14252
摘要： A power semiconductor module includes a half-bridge circuit having a first power semiconductor element and a second power semiconductor element that are connected in series with each other. The power semiconductor module also includes first to third external terminals, a first wiring member that connects a high-potential-side main electrode of the first power semiconductor element to the first external terminal, a second wiring member that connects a low-potential-side main electrode of the second power semiconductor element to the second external terminal, a third wiring member that connects an output of the half-bridge circuit to a third external terminal, and at least one of a first corrosion sensor disposed in an installation environment of the first wiring member, a second corrosion sensor disposed in an installation environment of the second wiring member, or a third corrosion sensor disposed in an installation environment of the third wiring member.
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