Semiconductor fabrication apparatus having improved sputtering
collimator and wiring method for a semiconductor device using such
apparatus
    51.
    发明授权
    Semiconductor fabrication apparatus having improved sputtering collimator and wiring method for a semiconductor device using such apparatus 失效
    具有改进的溅射准直器和使用这种装置的半导体器件的布线方法的半导体制造装置

    公开(公告)号:US5770026A

    公开(公告)日:1998-06-23

    申请号:US785694

    申请日:1997-01-17

    Applicant: Chang-Jae Lee

    Inventor: Chang-Jae Lee

    CPC classification number: H01J37/3447 H01J37/34 H01L21/28506

    Abstract: A semiconductor fabrication apparatus which includes a collimator made of a net type heating material which generates Joule heating when electric power is supplied thereto. The apparatus includes a negative electrode having a metallic target, a positive electrode arranged opposite the negative electrode, on which positive electrode a semiconductor substrate is mounted, and the collimator being mounted between the negative electrode and the positive electrode and near the semiconductor substrate, with the collimator being made of a net type heating material and designed so that Joule heating is generated therein when a current is applied thereto.

    Abstract translation: 一种半导体制造装置,其包括由供电电力时产生焦耳加热的网状加热材料制成的准直仪。 该装置包括具有金属靶的负极,与负极相对配置的正极,正极上安装有半导体基板,准直器安装在负极和正极之间以及靠近半导体基板的同时, 准直器由净型加热材料制成,并被设计成当向其施加电流时产生焦耳加热。

    Process for isolating a semiconductor layer on an insulator
    52.
    发明授权
    Process for isolating a semiconductor layer on an insulator 失效
    用于隔离绝缘体上的半导体层的工艺

    公开(公告)号:US5686343A

    公开(公告)日:1997-11-11

    申请号:US540422

    申请日:1995-10-10

    Applicant: Chang-Jae Lee

    Inventor: Chang-Jae Lee

    Abstract: A process for the isolation of a semiconductor layer on an insulator. A process for isolating a semiconductor layer on an insulator is disclosed that includes the steps of: forming a first insulating layer on a semiconductor substrate, and opening a window by etching the first insulating layer which becomes an epitaxial growth seed; depositing a semiconductor layer and growing an epitaxial layer which has the same crystal structure as the semiconductor substrate under the window; forming an active area of the epitaxial layer by a photolithographic process; forming a second insulating layer on and at the side of the active area and on the first insulating layer; and isolating an active area from the semiconductor layer by forming a third insulator layer in the window by an oxidation process.

    Abstract translation: 用于隔离绝缘体上的半导体层的工艺。 公开了一种用于隔离绝缘体上的半导体层的工艺,包括以下步骤:在半导体衬底上形成第一绝缘层,并通过蚀刻成为外延生长种子的第一绝缘层来打开窗口; 沉积半导体层并生长与窗下的半导体衬底具有相同晶体结构的外延层; 通过光刻工艺形成外延层的有源区; 在所述有源区和所述第一绝缘层上形成第二绝缘层; 以及通过在氧化过程中在窗口中形成第三绝缘体层,从半导体层隔离有源区。

    Wiring structure for semiconductor device and fabrication method therefor
    53.
    发明授权
    Wiring structure for semiconductor device and fabrication method therefor 失效
    半导体器件的接线结构及其制造方法

    公开(公告)号:US5656860A

    公开(公告)日:1997-08-12

    申请号:US494645

    申请日:1995-06-23

    Applicant: Chang-Jae Lee

    Inventor: Chang-Jae Lee

    CPC classification number: H01L23/53223 H01L23/485 H01L2924/0002

    Abstract: A metal wiring for semiconductor devices having a double-layer passivation film structure consisting of an intermetallic compound layer formed on a copper thin film and made of a metal reacting with copper to form an intermetallic compound and a metal nitride layer formed over the intermetallic compound. This double-layer passivation film structure is obtained by depositing a metal layer, capable of reacting with copper to form an intermetallic compound, over the copper wiring, and annealing the metal layer in a nitrogen atmosphere, thereby forming an intermetallic compound layer over the copper wiring. By virtue of the double-layer passivation film structure, the copper wiring has a great improvement in the reliability. A metal silicide layer is formed between a diffusion region and a diffusion barrier layer in the contact hole of the semiconductor device. The diffusion barrier layer, which is formed on an insulating layer doped with nitrogen ions, is changed into a metal nitride film. Accordingly, a reduced ohmic contact resistance and an improved passivation reliability are achieved.

    Abstract translation: 一种用于半导体器件的金属布线,具有双层钝化膜结构,该双层钝化膜结构由在铜薄膜上形成的金属间化合物层组成,并由金属与铜反应形成金属间化合物,金属氮化物层形成在金属间化合物上。 通过在铜布上沉积能够与铜反应以形成金属间化合物的金属层,并在氮气气氛中退火金属层,从而在铜上形成金属间化合物层,从而获得双层钝化膜结构 接线。 由于双层钝化膜结构,铜布线的可靠性有很大的提高。 在半导体器件的接触孔中的扩散区域和扩散阻挡层之间形成金属硅化物层。 在掺有氮离子的绝缘层上形成的扩散阻挡层变成金属氮化物膜。 因此,实现了降低的欧姆接触电阻和改善的钝化可靠性。

    Method of making semiconductor device with metal silicide nitride layer
and metal silicide
    54.
    发明授权
    Method of making semiconductor device with metal silicide nitride layer and metal silicide 失效
    制造具有金属硅化物氮化物层和金属硅化物的半导体器件的方法

    公开(公告)号:US5639678A

    公开(公告)日:1997-06-17

    申请号:US370715

    申请日:1995-01-10

    Abstract: A MOSFET in accordance with this invention includes: a metal silicide layer formed on a impurity region and on the upper surface of a gate electrode; a metal silicide nitride layer formed on the metal silicide layer; and a metal nitride layer formed on the metal silicide nitride layer. The process for formation of a conductive layer includes the steps of: (a) forming an impurity region in a semiconductor substrate; (b) forming a metal layer on the impurity region; (c) carrying out a heat treatment under an inert gas atmosphere to form a metal silicide of metastable phase; and (d) carrying out a heat treatment under an nitrogen gas atmosphere so as for the metal silicide of the metastable phase to be phase-transited to a stable phase.

    Abstract translation: 根据本发明的MOSFET包括:在杂质区上形成的栅极电极的上表面上的金属硅化物层; 在金属硅化物层上形成的金属硅化物氮化物层; 以及形成在金属硅化物氮化物层上的金属氮化物层。 形成导电层的工艺包括以下步骤:(a)在半导体衬底中形成杂质区; (b)在杂质区上形成金属层; (c)在惰性气体气氛下进行热处理,形成亚稳态金属硅化物; 和(d)在氮气气氛下进行热处理,使亚稳相的金属硅化物相转变为稳定相。

    Method for isolating semiconductor elements
    55.
    发明授权
    Method for isolating semiconductor elements 失效
    隔离半导体元件的方法

    公开(公告)号:US5563091A

    公开(公告)日:1996-10-08

    申请号:US355393

    申请日:1994-12-13

    Applicant: Chang-Jae Lee

    Inventor: Chang-Jae Lee

    CPC classification number: H01L21/32 H01L21/762 H01L21/76216 H01L21/76221

    Abstract: A method for isolating semiconductor regions so that unit elements may be electrically insulated. A disclosed method includes the steps of: forming a pad oxide layer and a nitride layer on a silicon substrate, and forming an active region pattern; exposing the pad oxide to HF to remove a portion of the pad oxide, and depositing polysilicon so that pad oxide as the path for the diffusion of oxygen during the oxidation is not exposed to the oxidizing atmosphere; forming a nitride layer side wall on the side of field region to increase the distance between field oxide region and active region; and carrying out a field channel stop ion implantation after the completion of the first field oxidation and after removing the side wall of nitride layer and before a second field oxidation process.

    Abstract translation: 一种用于隔离半导体区域以使单元元件可以电绝缘的方法。 所公开的方法包括以下步骤:在硅衬底上形成衬垫氧化物层和氮化物层,并形成有源区域图案; 将衬垫氧化物暴露于HF以去除衬垫氧化物的一部分,并沉积多晶硅,使得氧化物中的氧化物作为氧气扩散的路径不暴露于氧化气氛; 在场区侧面形成氮化物层侧壁,增加场氧化物区域和有源区域之间的距离; 并且在完成第一场氧化之后和在去除氮化物层的侧壁之后和在第二场氧化过程之前进行场通道停止离子注入。

    Method for isolating elements in a semiconductor chip
    56.
    发明授权
    Method for isolating elements in a semiconductor chip 失效
    用于隔离半导体芯片中的元件的方法

    公开(公告)号:US5374584A

    公开(公告)日:1994-12-20

    申请号:US89868

    申请日:1993-07-12

    CPC classification number: H01L21/76205 H01L21/32

    Abstract: A method for isolating elements in a silicon semiconductor device is disclosed. The invention discloses the steps of: (1) forming a thermal silicon oxide layer on a silicon substrate, depositing a layer of polysilicon, and depositing a first silicon nitride layer thereon, (2) patterning an active region and a field region, and etching the thermal oxidation layer, the polysilicon layer and the first silicon nitride layer on the field region to forth an active region pattern, (3) depositing a second silicon nitride layer, and, thereupon, depositing a silicon oxide layer, (4) etching back the oxide layer by application of a reactive ion etch technique, forming a silicon oxide side wall on the side of the active region pattern, and etching back the second silicon nitride layer using the oxide side wall as a mask to expose the silicon substrate, (5) removing the oxide side wall, and performing a channel stop field ion implantation, and (6) performing a field oxidation process to form a field oxide layer.

    Abstract translation: 公开了一种用于隔离硅半导体器件中的元件的方法。 本发明公开了以下步骤:(1)在硅衬底上形成热氧化硅层,沉积多晶硅层,并在其上沉积第一氮化硅层,(2)构图有源区和场区,蚀刻 热氧化层,多晶硅层和场区域上的第一氮化硅层至有源区域图案,(3)沉积第二氮化硅层,然后沉积氧化硅层,(4)回蚀 通过施加反应离子蚀刻技术的氧化物层,在有源区域图案的侧面上形成氧化硅侧壁,并使用氧化物侧壁作为掩模蚀刻第二氮化硅层以暴露硅衬底( 5)去除氧化物侧壁,进行通道停止场离子注入,(6)进行场氧化处理以形成场氧化物层。

    Dual modem device and controlling method thereof
    57.
    发明授权
    Dual modem device and controlling method thereof 有权
    双调制解调器装置及其控制方法

    公开(公告)号:US08463976B2

    公开(公告)日:2013-06-11

    申请号:US12788108

    申请日:2010-05-26

    CPC classification number: G06F13/4022 G06F2213/0042 Y02D10/14 Y02D10/151

    Abstract: A dual modem device includes a first processor to communicate with a first network and a second processor to communicate with a second network. The first processor includes a USB module to transceive a signal with a computer side using a universal serial bus (USB) interface, a first packet control block to determine a type of the signal transceived via the USB module and to decide a communication path, and a first function block to process a signal associated with the first network. The second processor includes a first control block to process a control signal for the first processor, a second control block to process a control signal for the second processor, and a second function block to process a signal associated with the second network.

    Abstract translation: 双调制解调器装置包括与第一网络通信的第一处理器和与第二网络通信的第二处理器。 第一处理器包括USB模块,用于使用通用串行总线(USB)接口与计算机侧收发信号;第一分组控制块,用于确定通过USB模块收发的信号的类型并确定通信路径;以及 用于处理与第一网络相关联的信号的第一功能块。 第二处理器包括用于处理第一处理器的控制信号的第一控制块,用于处理第二处理器的控制信号的第二控制块以及处理与第二网络相关联的信号的第二功能块。

    Method of supporting operation of sleep mode in a wideband radio access system
    58.
    发明授权
    Method of supporting operation of sleep mode in a wideband radio access system 有权
    在宽带无线电接入系统中支持睡眠模式操作的方法

    公开(公告)号:US08310971B2

    公开(公告)日:2012-11-13

    申请号:US13333784

    申请日:2011-12-21

    CPC classification number: H04W52/0229 H04W48/08 Y02D70/146

    Abstract: A method of indicating downlink traffic to a mobile subscriber station that is in a sleep mode includes transmitting a sleep request message to a base station (BS); entering the sleep mode in response to a sleep response message received from the BS, wherein the sleep response message includes a first SLPID; receiving a traffic indication message including a FMT field indicating formats for the traffic indication message from the BS during a listening interval of the sleep mode, wherein the FMT field indicates one of an SLPID bitmap based format and an SLPID based format, and the traffic indication message further includes a second SLPID when the SLPID based format is used; and terminating the sleep mode to receive the downlink traffic when the second SLPID in the traffic indication message is same as the first SLPID included in the sleep response message.

    Abstract translation: 一种向处于睡眠模式的移动用户台指示下行链路业务的方法包括向基站(BS)发送睡眠请求消息; 响应于从BS接收到的睡眠响应消息进入睡眠模式,其中所述睡眠响应消息包括第一SLPID; 在休眠模式的监听间隔期间接收包括指示来自BS的业务指示消息的格式的FMT字段的业务指示消息,其中FMT字段指示基于SLPID位图的格式和基于SLPID的格式之一,并且业务指示 消息还包括当使用基于SLPID的格式时的第二SLPID; 以及当所述业务指示消息中的第二SLPID与包括在所述睡眠响应消息中的所述第一SLPID相同时,终止所述睡眠模式以接收所述下行链路业务。

    METHOD OF SUPPORTING OPERATION OF SLEEP MODE IN A WIDEBAND RADIO ACCESS SYSTEM
    59.
    发明申请
    METHOD OF SUPPORTING OPERATION OF SLEEP MODE IN A WIDEBAND RADIO ACCESS SYSTEM 有权
    支持宽带无线接入系统中休眠模式操作的方法

    公开(公告)号:US20120087291A1

    公开(公告)日:2012-04-12

    申请号:US13333784

    申请日:2011-12-21

    CPC classification number: H04W52/0229 H04W48/08 Y02D70/146

    Abstract: A method of indicating downlink traffic to a mobile subscriber station that is in a sleep mode includes transmitting a sleep request message to a base station (BS); entering the sleep mode in response to a sleep response message received from the BS, wherein the sleep response message includes a first SLPID; receiving a traffic indication message including a FMT field indicating formats for the traffic indication message from the BS during a listening interval of the sleep mode, wherein the FMT field indicates one of an SLPID bitmap based format and an SLPID based format, and the traffic indication message further includes a second SLPID when the SLPID based format is used; and terminating the sleep mode to receive the downlink traffic when the second SLPID in the traffic indication message is same as the first SLPID included in the sleep response message.

    Abstract translation: 一种向处于睡眠模式的移动用户台指示下行链路业务的方法包括向基站(BS)发送睡眠请求消息; 响应于从BS接收到的睡眠响应消息进入睡眠模式,其中所述睡眠响应消息包括第一SLPID; 在休眠模式的监听间隔期间接收包括指示来自BS的业务指示消息的格式的FMT字段的业务指示消息,其中FMT字段指示基于SLPID位图的格式和基于SLPID的格式之一,并且业务指示 消息还包括当使用基于SLPID的格式时的第二SLPID; 以及当所述业务指示消息中的第二SLPID与包括在所述睡眠响应消息中的所述第一SLPID相同时,终止所述睡眠模式以接收所述下行链路业务。

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