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公开(公告)号：US20140002049A1
公开(公告)日：2014-01-02
申请号：US13534780
申请日：2012-06-27
IPC分类号： G05F3/02
CPC分类号： H02M3/158 , H02M1/08 , H02M3/1588 , H02M3/338 , Y02B70/1466
摘要： Described is an apparatus which comprises: a low-side switch coupled to an output node for providing regulated voltage supply; and a first driver operable to cause the low-side switch to turn off when the output node rises above a first transistor threshold voltage. Described is also a voltage regulator which comprises: a signal generator to generate a pulse-width modulated (PWM) signal; a bridge having a low-side switch coupled to an output node for providing regulated voltage supply according to the PWM signal; a first driver operable to cause the low-side switch to turn off when the output node rises above a first transistor threshold voltage; and a bridge controller to provide control signals to the first driver. The voltage regulator may operate without diode clamps and its operation is self-timed. The voltage regulator also provides tolerance against process variation.
摘要翻译： 描述了一种装置，其包括：耦合到输出节点的低侧开关，用于提供稳压电压; 以及第一驱动器，其可操作以在所述输出节点上升到高于第一晶体管阈值电压时使所述低侧开关断开。 还描述了一种电压调节器，其包括：产生脉冲宽度调制（PWM）信号的信号发生器; 具有耦合到输出节点的低侧开关的桥，用于根据所述PWM信号提供稳压电源; 第一驱动器，其可操作以在所述输出节点上升到高于第一晶体管阈值电压时使所述低侧开关断开; 以及桥控制器，用于向第一驱动器提供控制信号。 电压调节器可以在没有二极管钳位的情况下工作，并且其操作是自定时的。 电压调节器还提供了过程变化的公差。
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公开(公告)号：US08471667B2
公开(公告)日：2013-06-25
申请号：US12955415
申请日：2010-11-29
申请人： Donald S. Gardner , Peter Hazucha , Gerhard Schrom
发明人： Donald S. Gardner , Peter Hazucha , Gerhard Schrom
IPC分类号： H01F5/00
CPC分类号： H01P1/2056 , H01F10/132 , H01F19/08 , H01F27/2804 , H01F27/29
摘要： Some embodiments include a die having a transformer. The transformer includes windings formed from a set of lines, such that no two lines belonging to any one winding are nearest neighbors. The lines are formed within one layer on the die. Other embodiments are described.
摘要翻译： 一些实施例包括具有变压器的管芯。 变压器包括由一组线组成的绕组，使得属于任何一个绕组的两条线不是最邻近的。 线在模具的一层内形成。 描述其他实施例。
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公开(公告)号：US20120194245A1
公开(公告)日：2012-08-02
申请号：US13405175
申请日：2012-02-24
申请人： Fabrice Paillet , Peter Hazucha , Gerhard Schrom , Tanay Karnik , Sung T. Moon , Donald S. Gardner
发明人： Fabrice Paillet , Peter Hazucha , Gerhard Schrom , Tanay Karnik , Sung T. Moon , Donald S. Gardner
IPC分类号： H03K3/017
摘要： Disclosed herein are pulse width modulator (PWM) solutions with comparators not relying on a variable reference to adjust duty cycle. In accordance with some embodiments, a pulse width modulator having a comparator with an applied adjustable waveform to generate a bit stream with a controllably adjustable duty cycle is provided.
摘要翻译： 这里公开了脉冲宽度调制器（PWM）解决方案，其中比较器不依赖于可变参考来调整占空比。 根据一些实施例，提供具有具有应用的可调波形的比较器以产生具有可控制可调整占空比的位流的脉宽调制器。
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公开(公告)号：US20110131797A1
公开(公告)日：2011-06-09
申请号：US13026470
申请日：2011-02-14
IPC分类号： H01F41/32
CPC分类号： H01F17/0033 , H01F17/0006 , H01F17/02 , H01F27/2804 , H01F41/041 , H01F41/046 , H01F2017/002 , H01F2017/0053 , H01F2017/0066 , Y10T29/4902 , Y10T29/49073 , Y10T29/49126 , Y10T29/49147
摘要： An inductor may be formed from a magnetic film on a package substrate. Conductors coupled either to a die or a voltage converter extend perpendicularly through the film to conductive plates, defining current paths through and across the film.
摘要翻译： 电感器可以由封装衬底上的磁性膜形成。 耦合到管芯或电压转换器的导体垂直延伸穿过膜到导电板，限定穿过膜并穿过膜的电流路径。
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公开(公告)号：US07852185B2
公开(公告)日：2010-12-14
申请号：US10430508
申请日：2003-05-05
申请人： Donald S. Gardner , Peter Hazucha , Gerhard Schrom
发明人： Donald S. Gardner , Peter Hazucha , Gerhard Schrom
IPC分类号： H01F5/00
CPC分类号： H01P1/2056 , H01F10/132 , H01F19/08 , H01F27/2804 , H01F27/29
摘要： A transformer integrated on a die, the transformer comprising a set of conductive lines formed on the die within one layer and interconnected among each other so that no two lines belonging to any one winding are nearest neighbors. The set of conductive lines is surrounded by a magnetic material, which may be amorphous CoZrTa, CoFeHfO, CoAlO, FeSiO, CoFeAlO, CoNbTa, CoZr, and other amorphous cobalt alloys. The transformer may be operated at frequencies higher than 10 MHz and as high as 1 GHz, with relatively low resistance and relatively high magnetic coupling between the windings.
摘要翻译： 集成在管芯上的变压器，所述变压器包括在一个层内形成在管芯上的一组导线，并且彼此互连，使得属于任何一个绕组的两条线不是最邻近的。 该组导电线被磁性材料包围，该材料可以是无定形CoZrTa，CoFeHfO，CoAlO，FeSiO，CoFeAlO，CoNbTa，CoZr等非晶态钴合金。 变压器可以在高于10MHz和高达1GHz的频率下操作，具有相对低的电阻和绕组之间的相对较高的磁耦合。
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公开(公告)号：US07843304B2
公开(公告)日：2010-11-30
申请号：US12431882
申请日：2009-04-29
申请人： Gerhard Schrom , Donald Gardner , Peter Hazucha , Fabrice Paillet , Tanay Karnik
发明人： Gerhard Schrom , Donald Gardner , Peter Hazucha , Fabrice Paillet , Tanay Karnik
IPC分类号： H01F5/00
CPC分类号： H01F17/0006 , H01F3/00 , H01F27/34 , H01F2017/0066
摘要： An apparatus includes a magnetic core, a ground node, and one or more vias to provide a connection between the magnetic core and the ground potential. The magnetic core includes a first magnetic layer and a second magnetic layer. In addition, the apparatus may include a conductive pattern. The conductive pattern may be at a third layer between the first and second magnetic layers. The apparatus may be included in inductors, transformers, transmission lines, and other components using ferromagnetic cores or shields. Such components may be integrated on a chip or die.
摘要翻译： 一种装置包括磁芯，接地节点和一个或多个通孔，以提供磁芯和地电位之间的连接。 磁芯包括第一磁性层和第二磁性层。 另外，该装置可以包括导电图案。 导电图案可以在第一和第二磁性层之间的第三层。 该装置可以包括在使用铁磁芯或屏蔽的电感器，变压器，传输线和其它部件中。 这样的部件可以集成在芯片或芯片上。
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公开(公告)号：US07719084B2
公开(公告)日：2010-05-18
申请号：US11479302
申请日：2006-06-30
IPC分类号： H01L21/00
CPC分类号： H01F41/046 , H01F17/0006 , H01F41/32 , H01L28/10
摘要： An embodiment is an inductor that may include a laminated material structure to decrease eddy currents therein that may limit the operation of the inductor at high frequency. An embodiment may employ electroless plating techniques to form a layer or layers of magnetic material within the laminated material structure, and in particular those magnetic layers adjacent to insulator layers.
摘要翻译： 一个实施例是可以包括层压材料结构以减少其中的涡流的电感器，其可以限制高频下的电感器的操作。 一个实施例可以采用化学镀技术在层压材料结构内形成一层或多层磁性材料，特别是与绝缘体层相邻的那些磁性层。
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58.发明申请METHODS OF FORMING MAGNETIC VIAS TO MAXIMIZE INDUCTANCE IN INTEGRATED CIRCUITS AND STRUCTURES FORMED THEREBY 有权形成磁性VIAS的方法最大限度地提高了集成电路中的电感和形成的结构公开(公告)号：US20090117325A1
公开(公告)日：2009-05-07
申请号：US11936724
申请日：2007-11-07
申请人： Donald Gardner , Gerhard Schrom , Peter Hazucha , Fabrice Paillet , Tanay Karnik
发明人： Donald Gardner , Gerhard Schrom , Peter Hazucha , Fabrice Paillet , Tanay Karnik
CPC分类号： H01F41/046 , H01F17/0006 , H01F27/324 , H01F2017/0066 , H01L23/5227 , H01L2924/0002 , Y10T29/4902 , Y10T428/24331 , H01L2924/00
摘要： Methods and associated structures of forming microelectronic devices are described. Those methods may include forming a first layer of a magnetic material on a substrate, forming an oxide layer on the first layer of the magnetic material, forming at least one conductive structure on the first magnetic layer, forming a dielectric layer on the at least one conductive structure, forming a second layer of the magnetic material on the at least one conductive structure, and forming a magnetic via coupled to the first and second layers of the magnetic material, wherein the magnetic via comprises a shape to increase inductance of the inductive structure.
摘要翻译： 描述形成微电子器件的方法和相关结构。 这些方法可以包括在衬底上形成磁性材料的第一层，在磁性材料的第一层上形成氧化物层，在第一磁性层上形成至少一个导电结构，在至少一个上形成介电层 在所述至少一个导电结构上形成所述磁性材料的第二层，以及形成耦合到所述磁性材料的所述第一和第二层的磁通孔，其中所述磁通孔包括增加所述电感结构的电感的形状 。
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公开(公告)号：US07518481B2
公开(公告)日：2009-04-14
申请号：US11479236
申请日：2006-06-30
IPC分类号： H01F5/00
CPC分类号： H01F17/0006 , H01F10/132 , H01F10/16 , H01F41/34 , H01F2017/0053 , H01F2017/0066 , H01L23/5227 , H01L2924/0002 , Y10T29/4902 , Y10T29/49071 , Y10T29/49073 , Y10T29/49156 , Y10T29/49165 , H01L2924/00
摘要： An embodiment is an inductor that may include a slotted magnetic material to decrease eddy currents therein that may limit the operation of the inductor at high frequency. An embodiment may employ electro- or electroless plating techniques to form a layer or layers of magnetic material within the slotted magnetic material structure, and in particular those magnetic material layers adjacent to insulator layers.
摘要翻译： 一个实施例是可以包括开槽磁性材料以减少其中的涡流的电感器，其可以限制高频下的电感器的操作。 一个实施例可以采用电镀或无电镀技术在开槽磁性材料结构内形成一层或多层磁性材料，特别是与绝缘体层相邻的那些磁性材料层。
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公开(公告)号：US20080003699A1
公开(公告)日：2008-01-03
申请号：US11479302
申请日：2006-06-30
IPC分类号： H01L21/00
CPC分类号： H01F41/046 , H01F17/0006 , H01F41/32 , H01L28/10
摘要： An embodiment is an inductor that may include a laminated material structure to decrease eddy currents therein that may limit the operation of the inductor at high frequency. An embodiment may employ electroless plating techniques to form a layer or layers of magnetic material within the laminated material structure, and in particular those magnetic layers adjacent to insulator layers.
摘要翻译： 一个实施例是可以包括层压材料结构以减少其中的涡流的电感器，其可以限制高频下的电感器的操作。 一个实施例可以采用化学镀技术在层压材料结构内形成一层或多层磁性材料，特别是与绝缘体层相邻的那些磁性层。
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