公开(公告)号：US20120330752A1

公开(公告)日：2012-12-27

申请号：US13530749

申请日：2012-06-22

Applicant: Kyung Hoon KIM

Inventor： Kyung Hoon KIM

IPC: G06Q30/02

CPC classification number: G06Q30/02

Abstract: Disclosed herein is a search word link advertisement system including: an advertisement executing unit determining a search word link advertisement based on search words input during a matching period and exposing the determined search word link advertisement to provide the advertisement; a log recording unit storing a history of the determined search word link advertisement; and a matching period adjusting unit determining a transmission amount of search word link advertisement at any point in time or periodically in a state in which the search word link advertisement is provided and optimizing and adjusting the matching period according to the determined transmission amount.

Abstract translation: 这里公开了一种搜索词链接广告系统，包括：广告执行单元，基于在匹配时段期间输入的搜索词来确定搜索词链接广告，并且公开所确定的搜索词链接广告以提供广告; 存储确定的搜索词链接广告的历史的日志记录单元; 以及匹配周期调整单元，在提供搜索词链接广告的状态下，在任何时间点或周期性地确定搜索词链接广告的传输量，并根据确定的传输量来优化并调整匹配周期。

公开(公告)号：US08284134B2

公开(公告)日：2012-10-09

申请号：US12264724

申请日：2008-11-04

Applicant: Seong-Il Park ,  Kyung-Hoon Kim

Inventor： Seong-Il Park ,  Kyung-Hoon Kim

IPC: G09G3/32

CPC classification number: G09G3/3233 ,  G09G2300/0819 ,  G09G2300/0861 ,  G09G2310/061 ,  G09G2320/0261

Abstract: A display device includes a light emitting element to emit light having an intensity that varies depending on a magnitude of a driving current, a capacitor connected between a first node and a second node, a driving transistor having an input terminal connected to a first voltage, an output terminal, and a control terminal connected to the second node, a first switching unit to connect a data voltage and a second voltage to the first node, a second switching unit to switch a connection between the second voltage and the second node, a third switching unit to connect the second node and the light emitting element to the output terminal of the driving transistor, and a fourth switching unit to switch a connection between the control terminal and the input terminal of the driving transistor.

Abstract translation: 显示装置包括：发光元件，其发光强度根据驱动电流的大小而变化，连接在第一节点和第二节点之间的电容器;驱动晶体管，具有与第一电压相连的输入端; 输出端子和连接到第二节点的控制端子，将数据电压和第二电压连接到第一节点的第一开关单元，用于切换第二电压和第二节点之间的连接的第二开关单元， 第三开关单元，用于将第二节点和发光元件连接到驱动晶体管的输出端;以及第四开关单元，用于切换控制端子与驱动晶体管的输入端子之间的连接。

公开(公告)号：US08283962B2

公开(公告)日：2012-10-09

申请号：US12005515

申请日：2007-12-27

Applicant: Dae-Han Kwon ,  Kyung-Hoon Kim ,  Dae-Kun Yoon ,  Taek-Sang Song

Inventor： Dae-Han Kwon ,  Kyung-Hoon Kim ,  Dae-Kun Yoon ,  Taek-Sang Song

IPC: H03K3/00

CPC classification number: G06F1/06

Abstract: A semiconductor memory device can optimize the layout area and current consumption based on multi-phase clock signals which are generated by dividing a source clock signal using a reset signal without a delay locked loop and a phase locked loop in order to have various phase information of low frequencies and different activation timings with a constant phase difference.

Abstract translation: 半导体存储器件可以基于多相时钟信号来优化布局面积和电流消耗，该多相时钟信号是通过使用没有延迟锁定环路和锁相环路的复位信号对源时钟信号进行分频而产生的，以便具有 低频和不同的激活时序具有恒定的相位差。

公开(公告)号：US08238193B2

公开(公告)日：2012-08-07

申请号：US13105414

申请日：2011-05-11

Applicant: Kyung-Hoon Kim ,  Sang-Yeon Byeon ,  Chang-Kyu Choi

Inventor： Kyung-Hoon Kim ,  Sang-Yeon Byeon ,  Chang-Kyu Choi

IPC: G11C8/18

CPC classification number: H03H11/26

Abstract: Circuit and method for recovering clock data in highly integrated semiconductor memory apparatus includes a plurality of signal receiving units configured to receive signals through a plurality of input/output pads and transfer the signals according to a receiving reference clock, the signal receiving units being divided into groups, a plurality of phase detection units configured to detect phases of signals output from the groups of the signal receiving units, a plurality of phase detection control units configured to control the phase detection units so that the phase detection units sequentially detect the phases of the signals output from each of the groups of the signal receiving units and a notification unit configured to output signals output from the phase detection units.

Abstract translation: 用于恢复高度集成的半导体存储装置中的时钟数据的电路和方法包括：多个信号接收单元，被配置为通过多个输入/输出焊盘接收信号，并根据接收的参考时钟传送信号，信号接收单元被分成 多个相位检测单元，被配置为检测从信号接收单元的组输出的信号的相位;多个相位检测控制单元，被配置为控制相位检测单元，使得相位检测单元顺序地检测相位检测单元的相位; 从信号接收单元的每个组输出的信号和被配置为输出从相位检测单元输出的信号的通知单元。

公开(公告)号：US20120194240A1

公开(公告)日：2012-08-02

申请号：US13219620

申请日：2011-08-27

Applicant: Kyung Hoon KIM ,  Hong Bae KIM

Inventor： Kyung Hoon KIM ,  Hong Bae KIM

IPC: H03L7/06

CPC classification number: H03L7/06 ,  G11C7/222 ,  G11C2207/2272 ,  H03L7/0805 ,  H03L7/0814 ,  H03L7/087 ,  H03L7/10

Abstract: A latency control circuit includes: a delay locked loop (DLL) configured to generate a DLL clock signal by delaying a clock signal by a delay time varied according to any one of dual locking points, and generate a loop change signal according to a locking point change; a control unit configured to generate a latency control signal in response to a reset signal, a delay signal generated by delaying the reset signal by a first delay time, and the loop change signal; and a latency signal generation unit configured to adjust a latency of a command signal in response to the latency control signal and output a latency signal.

Abstract translation: 延迟控制电路包括：延迟锁定环（DLL），被配置为通过根据双锁定点中的任一个延迟时钟信号延迟时钟信号来产生DLL时钟信号，并且根据锁定点生成环路变化信号 更改; 控制单元，被配置为响应于复位信号产生等待时间控制信号，通过将复位信号延迟第一延迟时间而产生的延迟信号和环路变化信号; 以及延迟信号生成单元，被配置为响应于等待时间控制信号来调整命令信号的等待时间并输出等待时间信号。

公开(公告)号：US20120098816A1

公开(公告)日：2012-04-26

申请号：US13051082

申请日：2011-03-18

Applicant: Seung-Kyu Lee ,  Kyung-Hoon Kim ,  Yang-Hwa Choi ,  Se-Hyang Kim ,  Chul-Ho Kim

Inventor： Seung-Kyu Lee ,  Kyung-Hoon Kim ,  Yang-Hwa Choi ,  Se-Hyang Kim ,  Chul-Ho Kim

IPC: G06F3/038

CPC classification number: G09G3/3648 ,  G09G3/3655 ,  G09G2300/0814 ,  G09G2320/0214 ,  G09G2330/021

Abstract: An LCD and a driving method thereof include: data writing for applying a common voltage and a data voltage to a plurality of pixels; and sustaining for applying a shifted common voltage shifted by a predetermined level from the common voltage to the plurality of pixels for a sustain period during which the plurality of pixels emit light, corresponding to the data voltage. The shifted common voltage is shifted to an opposite polarity of a polarity of a gate-off voltage applied to the plurality of pixels to float the plurality of pixels. During a sustain period, a gate-source voltage of the switching transistor can be increased, and accordingly an influence due to the leakage current can be minimized, thereby preventing image deterioration. Further, since capacitance of the sustain capacitor can be reduced so that power consumption of the LCD can be reduced.

Abstract translation: LCD及其驱动方法包括：向多个像素施加公共电压和数据电压的数据写入; 以及对应于所述数据电压，将用于从所述公共电压偏移了预定电平的偏移公共电压施加到所述多个像素，持续所述多个像素发光的维持周期。 偏移的公共电压被移动到施加到多个像素的栅极截止电压的极性的相反极性，以浮动多个像素。 在维持期间，可以提高开关晶体管的栅源电压，能够使由漏电流引起的影响最小化，防止图像劣化。 此外，由于能够减小维持电容器的电容，能够降低LCD的功耗。

公开(公告)号：US08130890B2

公开(公告)日：2012-03-06

申请号：US12005492

申请日：2007-12-27

Applicant: Kyung-Hoon Kim ,  Yong-Ki Kim ,  Dae-Han Kwon ,  Taek-Sang Song

Inventor： Kyung-Hoon Kim ,  Yong-Ki Kim ,  Dae-Han Kwon ,  Taek-Sang Song

IPC: H04L7/02 ,  H04L7/04

CPC classification number: G11C29/02 ,  G11C7/1066 ,  G11C7/22 ,  G11C7/222 ,  G11C29/023 ,  G11C29/028

Abstract: A data clock frequency divider circuit includes a training decoder and a frequency divider. The training decoder outputs a clock alignment training signal, which is indicative of the start of a clock alignment training, in response to a command and an address of a mode register set. The frequency divider, which is reset in response to an output of the training decoder, receives an internal data clock to divide a frequency of the internal data clock in half. The data clock frequency divider circuit secures a sufficient operating margin so that a data clock and a system clock are aligned within a pre-set clock training operation time by resetting the data clock to correspond to a timing in which the clock training operation starts, thereby providing a clock training for a high-speed system.

Abstract translation: 数据时钟分频器电路包括训练解码器和分频器。 响应于模式寄存器组的命令和地址，训练解码器输出表示时钟对准训练的开始的时钟对准训练信号。 响应于训练解码器的输出复位的分频器接收内部数据时钟以将内部数据时钟的频率分成两半。 数据时钟分频器电路确保足够的操作余量，使得数据时钟和系统时钟在预设的时钟训练操作时间内对齐，通过复位数据时钟以对应于时钟训练操作开始的定时，由此 为高速系统提供时钟训练。

公开(公告)号：US08074885B2

公开(公告)日：2011-12-13

申请号：US12901098

申请日：2010-10-08

Applicant: Dae Seong Kim ,  Byeong Cheon Jeong ,  Hyun Soo Park ,  Kyung Hoon Kim ,  Min Gyu Maing ,  Dong Won Lee

Inventor： Dae Seong Kim ,  Byeong Cheon Jeong ,  Hyun Soo Park ,  Kyung Hoon Kim ,  Min Gyu Maing ,  Dong Won Lee

IPC: G06K7/00

CPC classification number: G06K7/0008 ,  G06Q20/3278 ,  G07F7/0893

Abstract: An integrated RF card reader includes an integrated RF transmission unit including a Felica chip and a Felica security unit performing a security function that is needed to process a Felica type RF card where an RF function is removed. Since a variety of types can be embodied through a single RF transmission circuit by using the integrated RF card reader, a manufacturing cost can be reduced.

Abstract translation: 集成的R​​F读卡器包括一个集成的射频传输单元，它包括一个Felica芯片和一个执行安全功能的Felica安全单元，该安全功能是处理去除RF功能的Felica型RF卡所需要的。 由于可以通过使用集成RF读卡器的单个RF传输电路来实现各种类型，因此可以降低制造成本。

公开(公告)号：US20110302033A1

公开(公告)日：2011-12-08

申请号：US13152030

申请日：2011-06-02

Applicant: Keon Su LEE ,  Choong Hee LEE ,  Il Gu LEE ,  Yung Seong LEE ,  Kyung Hoon KIM ,  Hye Jin KANG

Inventor： Keon Su LEE ,  Choong Hee LEE ,  Il Gu LEE ,  Yung Seong LEE ,  Kyung Hoon KIM ,  Hye Jin KANG

IPC: G06Q30/00

CPC classification number: G06Q30/02 ,  G06Q30/0259 ,  G06Q30/0261 ,  G06Q30/0277

Abstract: Provided are a system and method for providing a wireless network service to a user terminal free of charge, by providing a doorway page for exposing an advertisement on the user terminal provided with the wireless network service through an access point. Accordingly, the user terminal may be provided with the wireless network service free of charge, other than the cost of viewing the advertisement exposed on the doorway page. An advertiser and a proprietor may expose the advertisement at the cost of providing the free wireless network service.

Abstract translation: 提供了一种通过提供通过接入点提供无线网络服务的用户终端上的广告曝光的门口页面来向用户终端免费提供无线网络服务的系统和方法。 因此，用户终端可以免费提供无线网络服务，而不是观看在门口页面上暴露的广告的费用。 广告商和所有者可以以提供免费无线网络服务为代价来公开该广告。

公开(公告)号：US20110279431A1

公开(公告)日：2011-11-17

申请号：US13042621

申请日：2011-03-08

Applicant: Seung-Kyu Lee ,  Kyung-Hoon Kim ,  Chul-Ho Kim ,  Dong-Hoon Lee

Inventor： Seung-Kyu Lee ,  Kyung-Hoon Kim ,  Chul-Ho Kim ,  Dong-Hoon Lee

IPC: G09G5/00

CPC classification number: G09G3/3655 ,  G09G3/3406 ,  G09G3/3614 ,  G09G2310/0235 ,  G09G2310/0237 ,  G09G2320/0252

Abstract: A liquid crystal display apparatus and a method of driving the liquid crystal display apparatus, which commonly boosts pixels of a first group and commonly boosts pixels of a second group. The liquid crystal display apparatus includes a first group of pixels for displaying an image and a second group of pixels for displaying an image. Each pixel of the first and second groups includes a storage capacitor for storing a data voltage. The liquid crystal display apparatus further includes a first storage common voltage line connected to storage capacitors of the pixels of the first group of pixels, a second storage common voltage line connected to storage capacitors of the pixels of the second group of pixels. A first storage common voltage is supplied to the pixels of the first group through the first storage common voltage line, and a second storage common voltage is supplied to the pixels of the second group through the second storage common voltage line.

Abstract translation: 液晶显示装置和驱动液晶显示装置的方法，其通常提高第一组的像素并且共同地提高第二组的像素。 液晶显示装置包括用于显示图像的第一组像素和用于显示图像的第二组像素。 第一组和第二组的每个像素包括用于存储数据电压的存储电容器。 液晶显示装置还包括连接到第一组像素的像素的存储电容器的第一存储公共电压线，连接到第二组像素的像素的存储电容器的第二存储公共电压线。 第一存储公共电压通过第一存储公共电压线提供给第一组的像素，并且第二存储公共电压通过第二存储公共电压线提供给第二组的像素。