公开(公告)号：US20120068725A1

公开(公告)日：2012-03-22

申请号：US13155623

申请日：2011-06-08

Applicant: Alberto Pagani

Inventor： Alberto Pagani

IPC: G01R31/26

CPC classification number: G01R31/2891 ,  C12Q1/00 ,  C12Q2304/00 ,  C12Q2326/00 ,  G01R1/06794 ,  G01R31/2884 ,  H01L21/00 ,  H01L22/34 ,  H01L2221/00 ,  H01L2924/00

Abstract: A sensing structure for use in testing integrated circuits on a substrate. The sensing structure includes at least two sensing regions connectable to a probe and at least one first sensing element. Each of the at least one first sensing elements is directly connected to two sensing regions such that for each sensing region a different value of an electrical parameter is measurable between the sensing region and a first reference potential so as to reliably determine a drift direction of a probe.

Abstract translation: 用于在基板上测试集成电路的感测结构。 感测结构包括可连接到探针和至少一个第一感测元件的至少两个感测区域。 所述至少一个第一感测元件中的每一个直接连接到两个感测区域，使得对于每个感测区域，在所述感测区域和第一参考电位之间可测量电参数的不同值，以便可靠地确定所述感测区域的漂移方向 探测。

公开(公告)号：US20110291679A1

公开(公告)日：2011-12-01

申请号：US12982753

申请日：2010-12-30

Applicant: Alberto Pagani

Inventor： Alberto Pagani

IPC: G01R31/00

CPC classification number: G01R31/31905 ,  G01R31/3172 ,  G01R31/31926

Abstract: A method of testing integrated circuits is provided. The method includes establishing at least one first physical communication channel between a test equipment and a respective group of integrated circuits under test by having probes of the test equipment contacting at least one corresponding physical contact terminal of each integrated circuit of the respective group. The method further includes having the test equipment exchanging, over the at least one first physical communication channel, the same test stimuli with each integrated circuit of the group. The method still further includes having each integrated circuit of the group establishing a corresponding second physical communication channel with the test equipment by having at least one physical contact terminal of the integrated circuit contacted by a corresponding probe of the test equipment. The method further includes having each integrated circuit of the group exchanging, over the second physical communication channel, a corresponding test response signal based on the received test stimuli with the test equipment. The test stimuli are exchanged by modulating at least one first carrier wave based on the test stimuli; the at least one first carrier wave has at least one first frequency. The test response signals of each integrated circuit of the group are exchanged by modulating at least one respective second carrier wave based on the test response signals; each second carrier wave have at least one respective second frequency.

Abstract translation: 提供了一种测试集成电路的方法。 该方法包括通过使测试设备的探针接触相应组的每个集成电路的至少一个对应的物理接触端，来建立测试设备与被测试的相应组的集成电路之间的至少一个第一物理通信信道。 所述方法还包括使所述测试设备在所述至少一个第一物理通信信道中与所述组的每个集成电路交换相同的测试刺激。 该方法还包括使该组的每个集成电路与测试设备建立相应的第二物理通信信道，其中该集成电路的至少一个物理接触端子与测试设备的相应探针接触。 该方法还包括使得该组的每个集成电路在第二物理通信信道上基于所接收的与测试设备的测试刺激相交换的测试响应信号。 通过基于测试刺激调制至少一个第一载波来交换测试刺激; 所述至少一个第一载波具有至少一个第一频率。 通过基于测试响应信号调制至少一个相应的第二载波来交换该组的每个集成电路的测试响应信号; 每个第二载波具有至少一个相应的第二频率。

公开(公告)号：US20110267086A1

公开(公告)日：2011-11-03

申请号：US13093738

申请日：2011-04-25

Applicant: Alberto Pagani

Inventor： Alberto Pagani

IPC: G01R31/302

CPC classification number: G01R31/31716 ,  G01R31/2884 ,  G01R31/3025 ,  G01R31/318511 ,  G01R35/00

Abstract: A test circuit is described of a circuit integrated on wafer of the type comprising at least one antenna of the embedded type comprising at least one test antenna associated with said at least one embedded antenna that realizes its connection of the wireless loopback type creating a wireless channel for said at least one embedded antenna and allows its electric test, transforming an electromagnetic signal of communication between said at least one embedded antenna and said at least one test antenna into an electric signal that can be read by a test apparatus.

Abstract translation: 描述了集成在晶片上的电路的测试电路，该电路包括至少一个嵌入式天线，包括与所述至少一个嵌入式天线相关联的至少一个测试天线，其实现其无线环回类型的连接，从而创建无线信道 对于所述至少一个嵌入式天线并允许其电测试，将所述至少一个嵌入式天线与所述至少一个测试天线之间的通信的电磁信号变换成可由测试设备读取的电信号。

公开(公告)号：US20100164526A1

公开(公告)日：2010-07-01

申请号：US12649109

申请日：2009-12-29

Applicant: Alberto Pagani

Inventor： Alberto Pagani

IPC: G01R31/02 ,  G01R1/06

CPC classification number: G01R1/06716 ,  G01R1/06727 ,  G01R1/06733

Abstract: A MEMS probe adapted to contact a corresponding terminal of an integrated circuit, integrated on at least one chip of a semiconductor material wafer during a test phase of the wafer is provided. The probe includes a support structure comprising a first access terminal and a second access terminal; the support structure defines a conductive path between said first access terminal and said second access terminal. The probes further-includes a probe region connected to the support structure adapted to contact the corresponding terminal of the integrated circuit during the test phase for providing at least one test signal received from the first access terminal and the second access terminal to the integrated circuit through at least one portion of the conductive path, and/or providing at least one test signal generated by the integrated circuit to at least one between the first access terminal and the second access terminal trough at least one portion of the conductive path. The probe region is arranged on the conductive path of the support structure between said first access terminal and said second access terminal.

Abstract translation: 提供一种MEMS探针，其适于在晶片的测试阶段期间与集成在半导体材料晶片的至少一个芯片上的集成电路的相应端子接触。 探针包括支撑结构，该支撑结构包括第一接入终端和第二接入终端; 所述支撑结构限定所述第一接入终端与所述第二接入终端之间的导电路径。 所述探头进一步包括连接到所述支撑结构的探针区域，所述探测区域在所述测试阶段期间与所述集成电路的相应端子接触，以便从所述第一接入终端接收的至少一个测试信号和所述第二接入终端通过 所述导电路径的至少一部分，和/或将由所述集成电路产生的至少一个测试信号提供给所述第一接入终端和所述第二接入终端之间的至少一个在所述导电路径的至少一部分。 探针区域布置在所述第一接入终端和所述第二接入终端之间的支撑结构的导电路径上。

公开(公告)号：US20080204055A1

公开(公告)日：2008-08-28

申请号：US12037319

申请日：2008-02-26

Applicant: Alberto Pagani

Inventor： Alberto Pagani

IPC: G01R31/303

CPC classification number: G01R31/2851 ,  G01R31/2886 ,  G01R31/3025 ,  G01R31/303 ,  H01L2924/0002 ,  H01L2924/00

Abstract: An integrated circuit integrated on a semiconductor material die and adapted to be at least partly tested wirelessly, wherein circuitry for setting a selected radio communication frequencies to be used for the wireless test of the integrated circuit are integrated on the semiconductor material die.

Abstract translation: 一种集成在半导体材料裸片上并适于至少部分地被无线测试的集成电路，其中用于设置用于集成电路的无线测试的所选择的无线电通信频率的电路集成在半导体材料裸片上。