摘要:
A method of estimating a DC offset value of a signal includes estimating a DC offset value of a preamble part of the signal using a pair of diodes (D1, D2) and a resistor (R) connected in parallel. During receipt of the data part of the signal, the diode pair (D1, D2) is switched out of the circuit by a switch (SW). During reception of the data part, the DC level is estimated using a low pass filter (R,C).
摘要:
A quadrature switching mixer is provided for mixing a received RF signal and a local oscillator signal, while rejecting an image signal associated with the RF signal. Input signal components in quadrature, that is, I and Q input components derived from the received RF signal, are respectively coupled through first and second input paths to corresponding commuting switches in a configuration of switches. Each of the switches operates to multiply respective quadrature components of RF and local oscillator signals to provide quadrature output signal components. A unidirectional device, such as a buffer amplifier included in a signal splitter, is placed in each input path to prevent any portion of an output signal component from leaking backward through one of the input paths to the other input path, and thus to the other output signal component.
摘要:
A method and apparatus for minimizing harmonic content in a digital signal driver circuit are disclosed. A digital input signal applied to an input node generates a corresponding digital output in a circuit with two or more MOS devices in cascode connection with each other. The slew rate of one or more edge transitions associated with the output signal are controlled using one or more parasitic capacitances associated with the fabrication of two or more cascode connected MOS devices. The two or more cascode connected MOS devices may further each have gate electrodes connected to a fixed potential so as to minimize said harmonic content. A control signal may further be applied to each gate electrode to turn off a leakage current path between source and drain electrodes. Harmonics may further be controlled by limiting a conductance between gate electrodes and fixed potentials using an active or passive device.
摘要:
A short-range radio transmitter of a communication device comprising a short-range radio and a long-range radio is controlled to delay packets which are scheduled to be transmitted at the same time as a long-range transmitter of the long-range radio commences or discontinues to transmit. A frequency synthesizer of the short-range radio is thereby not affected by a change in the power supply voltage which otherwise occurs at these moments due to transmission with high power by the long-range transmitter.
摘要:
The invention relates to a filter circuit and a method for making a filter circuit comprising at least one gyrator core section (GCi) having four inverters mutually connected in a loop configuration between a pair of input terminals (i—1; i—2) and a pair of output terminals (o—1; o—2). At least one common mode feedback section (CMIi, CMOi) is provided between the pair of input terminals and/or the pair of output terminals. The common mode feedback section comprises two series connections respectively formed by an inverter and a short-sectioned inverter connected antiparallelly between the input terminals or the output terminals. The inverters may be constituted by a MOS, CMOS or BiCMOS or bipolar transistor. According to the invention, the channel region dimensions of the transistors of the gyrator core section and/or the common mode feedback section are selected such that the relationship g*C≧gm*cm is fulfilled, where g is the effective conductive loading of the gyrator core section terminals, C is the effective capacitive loading of the gyrator core section terminals, gm is the effective gyration constant of the gyrator core section, and cm is the effective transcapacitance of the gyrator core section.
摘要:
A demodulator circuit for demodulating a frequency modulated input, which includes a detector (14) that is operable to produce a demodulated signal from an incoming frequency modulated signal. A tuning circuit (19) is connected to the detector and operable to vary the frequency response characteristics of the detector. An auxiliary detector (25, 26) is connected to receive a reference frequency signal and to provide an auxiliary tuning signal to the detector on the basis of detection of the reference frequency signal.
摘要:
An equalization amplifier (30) is disclosed which includes two amplifier stages (32, 34) connected in cascade. The first amplifier stage (32) includes a low pass filter amplifier (40) having a pole frequency of F1 and a feed forward path (36) bypassing the low pass filter amplifier. The feed forward path provides the input signal to an adder circuit (42) where it is added to the output of the low pass filter amplifier. The effect of this addition is to provide the first amplifier with a zero frequency of F2, where F2 is greater than F1. The resulting sum signal is applied to the second amplifier stage (34) which also has a low pass filter characteristic. The second filter has a pole frequency of F3, where F3 is greater than F2. The equalization amplifier is particularly useful for providing RIAA equalization of phono cartridge output signals.
摘要:
A digital affine transformation modulator and power amplifier drives a transmitter antenna. The modulator performs an affine transformation on a signal, wherein the I, Q space is mapped to a plurality of sectors. A signal in a sector is expressed as the sum of two vectors, the angles of which define the sector boundaries. A digital power amplifier comprises a plurality of amplifier cells, each cell comprising at least two amplifier units. For a given signal, each amplifier unit selectively amplifies a clock signal having a phase corresponding to one of the boundary angles of the signal's affine transformed sector. A subset of the plurality of amplifier cells receiving each phase clock signal are enabled, based on the magnitude of the associated vector describing the signal in affine transform space. The modulation scheme exhibits higher efficiency than quadrature modulation, without the bandwidth expansion and group delay mismatch of polar modulation.
摘要:
Methods and apparatus are disclosed for automatically adjusting antenna impedance match in a wireless transceiver employing phase-amplitude modulation. According to some embodiments of the invention, a wireless transceiver comprises a transmitter circuit and a receiver circuit connected to the antenna by a transmit/receive duplexer. An electronically adjustable matching network is located between the transmitter output and the antenna. To control the adjustable matching network, a directional coupler is located between the transmitter output and the matching network to separate transmit signals reflected from the antenna system, including the antenna, the matching network and the T/R duplexer. The reflected transmit signals are routed to the receiver circuit, which digitizes the reflected signal and determines an antenna reflection coefficient based on the digitized reflected signal and the modulation signal used to create the transmit signal. The complex antenna reflection coefficient is used to determine any adjustment needed to the antenna matching network.
摘要:
The present disclosure generally relates to the field of receiver structures in radio communication systems and more specifically to passive mixers in the receiver structure and to a technique for converting a first signal having a first frequency into a second signal having a second frequency by using a third signal having a third frequency. A passive mixer for converting a first signal having a first frequency into a second signal having a second frequency by using a third signal having a third frequency comprises a cancellation component 220 for generating a first cancellation signal for cancelling second order intermodulation components by superimposing the first signal weighted by a cancellation value on the third signal; and a mixing component 231 having a first terminal 232 for receiving the first signal, a second terminal 234 for outputting the second signal, and a third terminal 236 for receiving the first cancellation signal, wherein the mixing component 231 is adapted to provide the second signal as output at the second terminal 234 by mixing the first signal provided as input at the first terminal 232 and the first cancellation signal provided as input at the third terminal 236.