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公开(公告)号：US06634805B1
公开(公告)日：2003-10-21
申请号：US09974340
申请日：2001-10-10
申请人： Michael K. Templeton , Khoi A. Phan , Bharath Rangarajan , Bryan K. Choo , Ramkumar Subramanian
发明人： Michael K. Templeton , Khoi A. Phan , Bharath Rangarajan , Bryan K. Choo , Ramkumar Subramanian
IPC分类号： G03B500
CPC分类号： H01L21/6715 , G03F7/3021
摘要： A system and method is provided for applying a developer to a photoresist material wafer disposed on a semiconductor substrate. The developer system and method employ a developer plate having a plurality of a apertures for dispensing developer. Preferably, the developer plate has a bottom surface with a shape that is similar to the wafer. The developer plate is disposed above the wafer and substantially and/or completely surrounds the top surface of the wafer during application of the developer. A small gap is formed between the wafer and the bottom surface of the developer plate. The wafer and the developer plate form a parallel plate pair, such that the gap can be made small enough so that the developer fluid quickly fills the gap. The developer plate is disposed in very close proximity with respect to the wafer, such that the developer is squeezed between the two plates thereby spreading evenly the developer over the wafer.
摘要翻译： 提供了一种将显影剂施加到设置在半导体衬底上的光致抗蚀剂材料晶片的系统和方法。 显影剂系统和方法采用具有多个用于分配显影剂的孔的显影剂板。 优选地，显影剂板具有与晶片类似的形状的底表面。 显影剂板设置在晶片上方并且在施加显影剂的过程中基本上和/或完全地包围晶片的顶表面。 在晶片和显影剂板的底表面之间形成小的间隙。 晶片和显影剂板形成平行板对，使得间隙可以制得足够小，使得显影剂流体快速填充间隙。 显影剂板相对于晶片非常接近地设置，使得显影剂被挤压在两个板之间，从而将显影剂均匀地铺展在晶片上。
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公开(公告)号：US06573480B1
公开(公告)日：2003-06-03
申请号：US09800166
申请日：2001-03-06
IPC分类号： F27B514
CPC分类号： H01L21/67248 , H01L21/67115
摘要： In invention provides a system for reducing or eliminating side lobes in patterned resist coatings. The system heats the resist briefly to induce the resist to flow. The system allows the resist to flow long enough for the side lobes to level, but not so long as to corrupt the resist pattern. The original resist pattern may be biased to allow for some flow during the side lobe reduction process. The invention is useful in eliminating side lobes that typically result when an attenuated phase shift mask is used to form a patterned resist coating with fine, sharp-edged features.
摘要翻译： 本发明提供了用于减少或消除图案化抗蚀剂涂层中的旁瓣的系统。 该系统短暂加热抗蚀剂以引起抗蚀剂流动。 该系统允许抗蚀剂流动足够长的时间，以使旁瓣达到平坦度，但不会损坏抗蚀剂图案。 原始的抗蚀剂图案可以被偏置以允许在旁瓣还原过程中的一些流动。 本发明可用于消除通常在衰减的相移掩模用于形成具有精细，锐利边缘特征的图案化抗蚀剂涂层时所产生的旁瓣。
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公开(公告)号：US06196734B1
公开(公告)日：2001-03-06
申请号：US09410955
申请日：1999-10-05
IPC分类号： G03D500
CPC分类号： G03D13/006
摘要： A system for regulating temperature of a developer is provided. The system includes a plurality of optical fibers, each optical fiber directing radiation to respective portions of the developer. Radiation reflected from the respective portions are collected by a measuring system which processes the collected radiation. The reflected radiation are indicative of the temperature of the respective portions of the developer. The measuring system provides developer temperature related data to a processor which determines the temperature of the respective portions of the developer. The system also includes a plurality of heating devices; each heating device corresponds to a respective portion of the developer and provides for the heating thereof. The processor selectively controls the heating devices so as to regulate temperature of the respective portions of the developer.
摘要翻译： 提供了一种用于调节显影剂温度的系统。 该系统包括多个光纤，每个光纤将辐射引导到显影剂的相应部分。 从相应部分反射的辐射由处理收集的辐射的测量系统收集。 反射的辐射表示显影剂各部分的温度。 测量系统将显影剂温度相关数据提供给确定显影剂各部分的温度的处理器。 该系统还包括多个加热装置; 每个加热装置对应于显影剂的相应部分并提供其加热。 处理器选择性地控制加热装置，以便调节显影剂各部分的温度。
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54.发明授权Apparatus of monitoring and optimizing the development of a photoresist material 有权监测和优化光致抗蚀剂材料的发展的装置公开(公告)号：US06819427B1
公开(公告)日：2004-11-16
申请号：US09973849
申请日：2001-10-10
IPC分类号： G01N2155
CPC分类号： G03F7/3028 , G01N21/47 , G01N21/55 , G01N21/8422 , G01N21/9501 , G01N31/007 , G03F7/3071
摘要： A system and method is provided that facilitates the uniform development of a pattern on a photoresist material layer using a developer. The present invention accomplishes this end by considering the acid-base relationship of the photoresist material and developer and monitoring the development of water formed in the development process. Typically, photoresist material is purchased or manufactured with known concentrations of resin and photoacid generator. Therefore, by monitoring the development of water in the development process, the present invention can measure the acid consumption in the development process. The present invention can then utilize this information in optimizing the developer volume, developer concentration and developer time to improve the quality of the developed image pattern on the photoresist material layer.
摘要翻译： 提供了一种使用显影剂促进光致抗蚀剂材料层上的图案的均匀显影的系统和方法。 本发明通过考虑光致抗蚀剂材料和显影剂的酸碱关系并监测在显影过程中形成的水的发展来实现这一目的。 通常，以已知浓度的树脂和光致酸产生剂购买或制造光致抗蚀剂材料。 因此，通过监测开发过程中的水的发展，本发明可以测量开发过程中的酸消耗。 因此，本发明可以利用该信息来优化显影剂体积，显影剂浓度和显影剂时间，以提高光致抗蚀剂材料层上显影的图像图案的质量。
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公开(公告)号：US06534243B1
公开(公告)日：2003-03-18
申请号：US10000493
申请日：2001-10-23
申请人： Michael K. Templeton , Ramkumar Subramanian , Bharath Rangarajan , Kathleen R. Early , Ursula Q. Quinto
发明人： Michael K. Templeton , Ramkumar Subramanian , Bharath Rangarajan , Kathleen R. Early , Ursula Q. Quinto
IPC分类号： G03F7039
CPC分类号： G03F7/405 , G03F7/0035 , G03F7/40
摘要： In one embodiment, the present invention relates to a method of treating a patterned resist involving providing the patterned resist having a first number of structural features, the patterned resist comprising an acid catalyzed polymer; contacting a coating containing a coating material, at least one basic compound, a photoacid generator, and a dye with the patterned resist; irradiating the coated patterned resist; permitting a deprotection region to form within an inner portion of the patterned resist; and removing the coating and the deprotection region to provide a second number of patterned resist structural features, wherein the first number is smaller than the second number.
摘要翻译： 在一个实施方案中，本发明涉及一种处理图案化抗蚀剂的方法，包括提供具有第一数目的结构特征的图案化抗蚀剂，所述图案化抗蚀剂包含酸催化聚合物; 使含有涂层材料的涂层，至少一种碱性化合物，光致酸发生剂和染料与图案化的抗蚀剂接触; 照射经涂覆的图案化抗蚀剂; 允许在图案化抗蚀剂的内部部分内形成去保护区; 并且去除涂层和去保护区域以提供第二数量的图案化抗蚀剂结构特征，其中第一数目小于第二数量。
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56.发明授权Reducing resist residue defects in open area on patterned wafer using trim mask 有权使用修剪掩模减少图案化晶片上的开放区域中的抗蚀剂残留缺陷公开(公告)号：US06613500B1
公开(公告)日：2003-09-02
申请号：US09824079
申请日：2001-04-02
IPC分类号： G03F700
CPC分类号： G03F7/70425 , G03F7/2022 , G03F7/203 , G03F7/70466
摘要： One aspect of the present invention relates to a method for reducing resist residue defects on a wafer structure. The method involves providing a semiconductor structure having a photoresist, the photoresist comprising open areas and circuit areas thereon; irradiating the open areas and circuit areas through a first photomask with a first energy dose to effect an image-wise pattern in the photoresist; irradiating the open areas of the photoresist through a second photomask with a second energy dose; and developing the photoresist.
摘要翻译： 本发明的一个方面涉及减少晶片结构上的抗蚀剂残留缺陷的方法。 该方法包括提供具有光致抗蚀剂的半导体结构，光致抗蚀剂包括开放区域和其上的电路区域; 通过具有第一能量剂量的第一光掩模照射开放区域和电路区域以在光致抗蚀剂中实现成像图案; 通过具有第二能量剂量的第二光掩模照射光致抗蚀剂的开放区域; 并显影光致抗蚀剂。
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公开(公告)号：US06423650B1
公开(公告)日：2002-07-23
申请号：US09371715
申请日：1999-08-09
IPC分类号： H01L2131
摘要： In one embodiment, the present invention relates to a method of processing a semiconductor substrate, involving the steps of providing the semiconductor substrate having an upper surface; roughening the upper surface of the semiconductor substrate so that the upper surface of the semiconductor substrate has an Rtm of about 10 Å or more; and depositing an ultra-thin photoresist on the upper surface of the semiconductor substrate, the ultra-thin photoresist having a thickness of about 2,000 Å or less.
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公开(公告)号：US06828162B1
公开(公告)日：2004-12-07
申请号：US09894434
申请日：2001-06-28
IPC分类号： H01L2100
CPC分类号： H01L21/67253 , G01N21/4738 , H01L21/02129 , H01L21/31625
摘要： A system for monitoring and controlling a boron phosphorous doped silicon oxide (BPSG) deposition and reflow process is provided. The system includes one or more light sources, each light source directing light to one or more portions of a wafer upon which BPSG is deposited. Light reflected from the BPSG is collected by a measuring system, which processes the collected light. Light passing through the BPSG may similarly be collected by the measuring system, which processes the collected light. The collected light is indicative of the conformality of the BPSG deposition of the respective portions of the wafer. The measuring system provides BPSG deposition related data to a processor that determines the BPSG deposition of the respective portions of the wafer. The system also includes a plurality of reflow controlling devices, each such device corresponding to a respective portion of the wafer and providing for the heating and/or cooling thereof. The processor selectively controls the reflow controlling devices so as to regulate temperature of the respective portions of the wafer.
摘要翻译： 提供了一种用于监测和控制硼磷掺杂氧化硅（BPSG）沉积和回流工艺的系统。 该系统包括一个或多个光源，每个光源将光引导到沉积BPSG的晶片的一个或多个部分。 从BPSG反射的光被测量系统收集，该系统处理收集的光。 通过BPSG的光可以类似地由处理所收集的光的测量系统收集。 所收集的光表示晶片的各个部分的BPSG沉积的一致性。 测量系统将BPSG沉积相关数据提供给确定晶片各部分的BPSG沉积的处理器。 该系统还包括多个回流控制装置，每个这样的装置对应于晶片的相应部分并提供加热和/或冷却。 处理器选择性地控制回流控制装置，以便调节晶片各部分的温度。
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公开(公告)号：US06562248B1
公开(公告)日：2003-05-13
申请号：US09817518
申请日：2001-03-26
IPC分类号： G01N2100
摘要： A system for monitoring and controlling aperture etching in a complimentary phase shift mask is provided. The system includes one or more light sources, each light source directing light to one or more apertures etched on a mask. Light reflected from the apertures is collected by a measuring system, which processes the collected light. Light passing through the apertures may similarly be collected by the measuring system, which processes the collected light. The collected light is indicative of the depth and/or width of the openings on the mask. The measuring system provides depth and/or width related data to a processor that determines the acceptability of the aperture depth and/or width. The system also includes a plurality of etching devices associated with etching apertures in the mask. The processor selectively controls the etching devices so as to regulate aperture etching.
摘要翻译： 提供了一种用于在补偿相移掩模中监测和控制孔蚀刻的系统。 该系统包括一个或多个光源，每个光源将光引导到在掩模上蚀刻的一个或多个孔。 从孔径反射的光由测量系统收集，该系统处理所收集的光。 通过孔的光可以类似地由处理收集的光的测量系统收集。 收集的光指示掩模上的开口的深度和/或宽度。 测量系统向确定孔径深度和/或宽度的可接受性的处理器提供深度和/或宽度相关数据。 该系统还包括与掩模中的孔蚀刻相关联的多个蚀刻装置。 处理器选择性地控制蚀刻装置以调节孔径蚀刻。
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公开(公告)号：US06845345B1
公开(公告)日：2005-01-18
申请号：US09777435
申请日：2001-02-06
IPC分类号： G06F11/00
CPC分类号： G05B23/0283
摘要： A system for analyzing diagnostic information associated with a spin track is provided. The system includes one or more analysis systems that collect diagnostic information from one or more spin tracks. The system further includes one or more maintenance systems that schedule routine and/or special maintenance based on analysis of the diagnostic information. An alternative aspect of the system further includes one or more control information systems that generate of feedback control information employed in adapting the processes performed by the spin track.
摘要翻译： 提供了一种用于分析与自旋轨迹相关联的诊断信息的系统。 该系统包括从一个或多个自旋轨道收集诊断信息的一个或多个分析系统。 该系统还包括一个或多个维护系统，其基于对诊断信息的分析来调度例行和/或特殊维护。 该系统的另一方面还包括一个或多个控制信息系统，其产生用于适应由旋转轨迹执行的处理的反馈控制信息。
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