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    Apparatus And Method To Obtain Information Regarding Suppressed Faults
    53.
    发明申请
    Apparatus And Method To Obtain Information Regarding Suppressed Faults 有权
    获取关于抑制故障信息的装置和方法

    公开(公告)号：US20140149802A1

    公开(公告)日：2014-05-29

    申请号：US13688544

    申请日：2012-11-29

    申请人： Christopher J. Hughes ,  Jesus Corbal ,  Mark J. Charney ,  Milind B. Girkar ,  Elmoustapha Ould-Ahmed-Vall ,  Robert Valentine

    发明人： Christopher J. Hughes ,  Jesus Corbal ,  Mark J. Charney ,  Milind B. Girkar ,  Elmoustapha Ould-Ahmed-Vall ,  Robert Valentine

    IPC分类号： G06F11/00

    CPC分类号： G06F11/004 ,  G06F9/30036 ,  G06F9/3851 ,  G06F9/3855 ,  G06F9/3865 ,  G06F11/0724 ,  G06F11/0751 ,  G06F11/076 ,  G06F11/0772

    摘要： A processor includes an execution unit, a fault mask coupled to the execution unit, and a suppress mask coupled to the execution unit. The fault mask is to store a first plurality of bit values to indicate which elements of a multi-element vector have an associated fault generated in response to execution of an instruction on the element in the execution unit. The suppress mask is to store a second plurality of bit values to indicate which of the elements are to have an associated fault suppressed. The processor also includes counter logic to increment a counter in response to an indication of a first fault associated with the first element and received from the fault mask, and an indication of a first suppression associated with the first element and received from the suppress mask. Other embodiments are described as claimed.

    摘要翻译： 处理器包括执行单元，耦合到执行单元的故障掩模以及耦合到执行单元的抑制掩模。 故障掩码是存储第一多个比特值以指示多元素向量的哪些元素具有响应于在执行单元中的元素上的指令的执行而产生的相关联的故障。 抑制掩模是存储第二多个位值，以指示哪个元件将被抑制相关联的故障。 所述处理器还包括计数器逻辑，以响应于与所述第一元件相关联并从所述故障掩模接收到的第一故障的指示来增加计数器，以及与所述第一元件相关联并从所述抑制掩码接收到的第一抑制的指示。 其他实施例被描述为所要求保护的。

    METHODS, APPARATUS, INSTRUCTIONS, AND LOGIC TO PROVIDE VECTOR ADDRESS CONFLICT DETECTION FUNCTIONALITY
    54.
    发明申请
    METHODS, APPARATUS, INSTRUCTIONS, AND LOGIC TO PROVIDE VECTOR ADDRESS CONFLICT DETECTION FUNCTIONALITY 有权
    方法，装置，说明和逻辑提供矢量地址冲突检测功能

    公开(公告)号：US20140189308A1

    公开(公告)日：2014-07-03

    申请号：US13731006

    申请日：2012-12-29

    申请人： Christopher J. Hughes ,  Elmoustapha Ould-Ahmed-Vall ,  Robert Valentine ,  Jesus Corbal ,  Brett L. Toll ,  Mark J. Charney ,  Milind B. Girkar

    发明人： Christopher J. Hughes ,  Elmoustapha Ould-Ahmed-Vall ,  Robert Valentine ,  Jesus Corbal ,  Brett L. Toll ,  Mark J. Charney ,  Milind B. Girkar

    IPC分类号： G06F9/30

    CPC分类号： G06F9/30021 ,  G06F9/30018 ,  G06F9/30036 ,  G06F9/30109 ,  G06F9/30145 ,  G06F9/30185 ,  G06F9/3838 ,  G06F9/3887

    摘要： Instructions and logic provide SIMD address conflict detection functionality. Some embodiments include processors with a register with a variable plurality of data fields, each of the data fields to store an offset for a data element in a memory. A destination register has corresponding data fields, each of these data fields to store a variable second plurality of bits to store a conflict mask having a mask bit for each offset. Responsive to decoding a vector conflict instruction, execution units compare the offset in each data field with every less significant data field to determine if they hold a matching offset, and in corresponding conflict masks in the destination register, set any mask bits corresponding to a less significant data field with a matching offset. Vector address conflict detection can be used with variable sized elements and to generate conflict masks to resolve dependencies in gather-modify-scatter SIMD operations.

    摘要翻译： 指令和逻辑提供SIMD地址冲突检测功能。 一些实施例包括具有可变多个数据字段的寄存器的处理器，每个数据字段存储用于存储器中的数据元素的偏移量。 目的地寄存器具有对应的数据字段，这些数据字段中的每一个用于存储可变的第二多个位以存储具有每个偏移的掩码位的冲突掩码。 响应于对向量冲突指令进行解码，执行单元将每个数据字段中的偏移量与每个较不重要的数据字段进行比较，以确定它们是否保持匹配的偏移，并且在目标寄存器中的相应冲突掩码中，设置对应于较少 具有匹配偏移的重要数据字段。 向量地址冲突检测可以与可变大小的元素一起使用，并生成冲突掩码来解决收集修改分散SIMD操作中的依赖关系。

    SCALAR INTEGER INSTRUCTIONS CAPABLE OF EXECUTION WITH THREE REGISTERS
    60.
    发明申请
    SCALAR INTEGER INSTRUCTIONS CAPABLE OF EXECUTION WITH THREE REGISTERS 审中-公开
    标准整数指令可执行三个注册

    公开(公告)号：US20120185670A1

    公开(公告)日：2012-07-19

    申请号：US13007050

    申请日：2011-01-14

    申请人： Bret L. Toll ,  Robert Valentine ,  Maxim Locktyukhin ,  Elmoustapha Ould-Ahmed-Vall

    发明人： Bret L. Toll ,  Robert Valentine ,  Maxim Locktyukhin ,  Elmoustapha Ould-Ahmed-Vall

    IPC分类号： G06F15/76 ,  G06F9/02

    CPC分类号： G06F9/30036 ,  G06F9/3012 ,  G06F9/3016 ,  G06F9/30185

    摘要： A processing core implemented on a semiconductor chip is described. The processing core includes logic circuitry to identify whether vector instructions and integer scalar instructions are to be executed with two registers or three registers, where, in the case of two registers input operand information is destroyed in one of two registers, and, in the case of three registers input operand is not destroyed. The processing core also includes steering circuitry coupled to the logic circuitry. The steering circuitry is to control first data paths between scalar integer execution units and a scalar integer register bank such that two registers are accessed from the scalar register bank if two register execution is identified for the scalar integer instructions or three registers are accessed from the scalar integer register bank if three register execution is identified for the scalar integer instructions. The steering circuitry is also to control second data paths between vector execution units and a vector register bank such that two registers are accessed from the vector register bank if two register execution is identified for the vector instructions or three registers are accessed from the vector register bank if three register execution is identified for the vector instructions.

    摘要翻译： 描述了在半导体芯片上实现的处理核心。 处理核心包括用于识别矢量指令和整数标量指令是否要用两个寄存器或三个寄存器执行的逻辑电路，其中在两个寄存器的情况下输入操作数信息在两个寄存器之一中被销毁，并且在这种情况下 的三个寄存器输入操作数不会被破坏。 处理核心还包括耦合到逻辑电路的转向电路。 转向电路是控制标量整数执行单元和标量整数寄存器组之间的第一数据路径，以便如果为标量整数指令识别两个寄存器执行，则从标量寄存器组访问两个寄存器，或者从标量访问三个寄存器 整数寄存器组如果为标量整数指令标识了三个寄存器执行。 转向电路还用于控制向量执行单元和向量寄存器组之间的第二数据路径，使得如果为向量指令识别了两个寄存器执行，则从向量寄存器组访问两个寄存器，或者从向量寄存器组访问三个寄存器 如果为向量指令识别了三个寄存器执行。