公开(公告)号：US20240112623A1

公开(公告)日：2024-04-04

申请号：US18275012

申请日：2022-07-08

Applicant: Beijing BOE Technology Development Co., Ltd. ,  BOE Technology Group Co., Ltd.

Inventor： Miao LIU ,  Xueguang HAO ,  Jingbo XU ,  Xing YAO ,  Jingquan WANG ,  Xinyin WU ,  Xinguo LI ,  Zhichong WANG

IPC: G09G3/32

CPC classification number: G09G3/32 ,  G09G2300/0408 ,  G09G2300/0426 ,  G09G2300/0809 ,  G09G2310/0267

Abstract: A display substrate, comprising a base substrate and a scan drive control circuit which is disposed in a non-display area of the base substrate. The scan drive control circuit comprises an input circuit, an output control circuit, and an output circuit. The output control circuit is connected to the input circuit and the output circuit. The output control circuit comprises a first node control capacitor and a second node control capacitor. The length of the first node control capacitor in a first direction LC1k, the length of the second node control capacitor in the first direction LC2k and the length of the scan drive control circuit in the first direction LY satisfy the following formula:







L

C
⁢
1
⁢
k



L
Y

公开(公告)号：US20220383822A1

公开(公告)日：2022-12-01

申请号：US17628779

申请日：2021-04-09

Applicant: BOE Technology Group Co., Ltd.

Inventor： Guangliang SHANG ,  Jie ZHANG ,  Shuo HUANG ,  Libin LIU ,  Shiming SHI ,  Hao LIU ,  Haoliang ZHENG ,  Xing YAO

IPC: G09G3/3266 ,  G11C19/28 ,  G09G3/36

Abstract: A shift register, a driving method, a driving control circuit and a display device. The method comprises: at a data refresh stage (T10), applying to an input signal end (IP) an input signal having a pulse level, applying a control clock pulse signal to a control clock signal end, and applying a noise reduction clock pulse signal to a noise reduction clock signal end; at a noise reduction holding phase (T21-1), applying a fixed voltage signal to the input signal end (IP), applying a fixed voltage signal to the control clock signal end, and applying a fixed voltage signal to the noise reduction clock signal end; and at a noise reduction enhancement stage (T22-1), applying a fixed voltage signal to the input signal end (IP), applying a fixed voltage signal to the control clock signal end, and applying a clock pulse signal to the noise reduction clock signal end.

公开(公告)号：US20220068212A1

公开(公告)日：2022-03-03

申请号：US17363639

申请日：2021-06-30

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Xing YAO ,  Chen XU ,  Jingquan WANG ,  Xinyin WU

IPC: G09G3/3266 ,  H01L27/32

Abstract: A display substrate is provided. The display substrate includes a base substrate including a display region and a peripheral region, and a gate scan driving circuit, a light-emitting control scan driving circuit, and a first power line, the gate scan driving circuit includes a first stabilizing capacitor, a first electrode plate of the first stabilizing capacitor is electrically connected to the output terminal of the gate scan driving circuit; and the light-emitting control scan driving circuit includes a second stabilizing capacitor, a first electrode plate of the second stabilizing capacitor is electrically connected to the output terminal, a second electrode plate of the second stabilizing capacitor is electrically connected to the first power line, the second electrode plate of the second stabilizing capacitor includes a first part and a second part, and an organic insulation layer is provided between the first part and the second part.

公开(公告)号：US20210193007A1

公开(公告)日：2021-06-24

申请号：US16985925

申请日：2020-08-05

Applicant: Beijing BOE Technology Development Co., Ltd. ,  BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Hongfei CHENG ,  Xing YAO

IPC: G09G3/20 ,  G11C19/28

Abstract: A shift register circuit and a driving method thereof, a gate driving circuit and a display panel are provided. The shift register circuit includes: an input terminal; a first reference voltage terminal; a second reference voltage terminal; a first clock signal terminal; a second clock signal terminal; an output terminal; an input circuit, a first control circuit; a second control circuit; a third control circuit; a compensation circuit, a first node, a second node, a third node and an output circuit, the compensation circuit is configured to compensate a voltage of at least one of the first node, the second node, and the third node in response to the second clock signal.

公开(公告)号：US20190180834A1

公开(公告)日：2019-06-13

申请号：US16138878

申请日：2018-09-21

Applicant: BOE Technology Group Co., Ltd.

Inventor： Lijun YUAN ,  Mingfu HAN ,  Seung Woo HAN ,  Xing YAO ,  Zhichong WANG ,  Guangliang SHANG ,  Haoliang ZHENG

IPC: G11C19/28 ,  G09G3/3258

Abstract: Embodiments of the present application provide a shift register unit, a method for driving the same, a gate driving circuit, and a display apparatus. The shift register unit comprises at least two sub-circuits of a first output sub-circuit, a second output sub-circuit, and a third output sub-circuit. The first output sub-circuit is configured to output a voltage at a signal output terminal to a reset signal output terminal; the second output sub-circuit is configured to output the voltage at the signal output terminal to a gating signal output terminal; and the third output sub-circuit is configured to output a voltage at a second voltage terminal to a light-emitting control signal output terminal or is configured to output a voltage at a first voltage terminal to the light-emitting control signal output terminal.

公开(公告)号：US20190108809A1

公开(公告)日：2019-04-11

申请号：US16149432

申请日：2018-10-02

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Haoliang ZHENG ,  Seungwoo HAN ,  Guangliang SHANG ,  Xing YAO ,  Lijun YUAN ,  Zhichong WANG ,  Mingfu HAN ,  Yinglong HUANG

IPC: G09G3/36 ,  G11C19/28

Abstract: A shift register, a gate drive circuit, a display apparatus and a driving method of the shift register are provided. The shift register includes an input subcircuit, a first and a second output subcircuits, a trigger signal input terminal, a first and a second signal output terminals, a first and a second clock terminals and a pull-up node, a control terminal and an output terminal of the input subcircuit are electrically coupled to the trigger signal input terminal and the pull-up node, respectively, for providing a valid signal received by the control terminal of the input subcircuit to the pull-up node. The shift register is provided with the first and second output subcircuits which share the same input subcircuit, greatly reducing the number of devices and thus greatly simplifying the structure of the cascaded shift registers and reducing the area of the whole display apparatus.

公开(公告)号：US20180233210A1

公开(公告)日：2018-08-16

申请号：US15503830

申请日：2016-08-25

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Mingfu HAN ,  Guangliang SHANG ,  Yuanbo ZHANG ,  Yujie GAO ,  Yan YAN ,  Yingmeng MIAO ,  Seungwoo HAN ,  Zhihe JIN ,  Xing YAO ,  Haoliang ZHENG

IPC: G11C19/28 ,  G09G3/20

CPC classification number: G11C19/287 ,  G09G3/20 ,  G09G2300/0426 ,  G09G2310/0245 ,  G09G2310/0267 ,  G09G2310/0286 ,  G11C19/28

Abstract: A supplement resetting module for a gate driver circuit, including a pull-up control unit, a pull-down control unit, a clock signal input end, a predetermined level input end, a first control signal input end, a second control signal input end and a signal output end. A control end of the pull-up control unit is connected to the clock signal input end, an output end of the pull-up control unit is connected to the signal output end, a first control end of the pull-down control unit is connected to the first control signal input end, a second control end of the pull-down control unit is connected to the second control signal input end, an input end of the pull-down control unit is connected to the predetermined level input end, and an output end of the pull-down control unit is connected to the signal output end.

公开(公告)号：US20180188562A1

公开(公告)日：2018-07-05

申请号：US15794298

申请日：2017-10-26

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Zhihe JIN ,  Seungwoo HAN ,  Mingfu HAN ,  Xing YAO ,  Guangliang SHANG ,  Zhichong WANG ,  Lijun YUAN ,  Haoliang ZHENG ,  Yunsik IM

IPC: G02F1/1335 ,  G02F1/1343 ,  G02F1/133

CPC classification number: G02F1/1336 ,  G02F1/13306 ,  G02F1/133553 ,  G02F1/134309 ,  G02F1/13439 ,  G02F1/19 ,  G02F2001/133616 ,  G02F2001/133618 ,  G02F2201/12 ,  G02F2202/10 ,  G02F2202/101 ,  G02F2203/02

Abstract: The present application discloses a reflective display panel, a driving method thereof, a control method of a pixel unit and a reflective display device. The reflective display panel comprises: a base substrate, a reflective layer, first and second electrode layers, wherein the first electrode layer is on a side of the reflective layer distal to the base substrate, the second electrode layer is on a side of the first electrode layer distal to the base substrate and insulated from the first electrode layer, materials of the first and second electrode layers are each an electro-optic material, and orthogonal projections of the second and first electrode layers on the base substrate have overlapping areas corresponding to the pixel units.

公开(公告)号：US20180047329A1

公开(公告)日：2018-02-15

申请号：US15539220

申请日：2016-11-01

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Guangliang SHANG ,  Seungwoo HAN ,  Haoliang ZHENG ,  Xing YAO ,  Mingfu HAN ,  Hyunsic CHOI ,  Yunsik IM ,  Yinglong HUANG ,  Jungmok JUN ,  Xue DONG

IPC: G09G3/20 ,  G11C19/28

CPC classification number: G11C19/287 ,  G09G3/2096 ,  G09G3/36 ,  G09G3/3666 ,  G09G3/3677 ,  G09G2300/0408 ,  G09G2310/0286 ,  G09G2320/0223 ,  G11C5/063 ,  G11C19/28

Abstract: The present disclosure provides a shift register circuit, an array substrate, and a display device. For a first driver and a second driver adjacent to each other in a direction substantially perpendicular to the gate line, a first driving input wiring of the first driver is arranged to input a first clock driving signal to individual shift registers successively from a shift register at a first end position of the first driver to a shift register at a second end position of the first driver, and a second driving input wiring of the second driver is arranged to input a second clock driving signal to individual shift registers successively from a shift register at a second end position of the second driver to a shift register at a first end position of the second driver.

公开(公告)号：US20140139765A1

公开(公告)日：2014-05-22

申请号：US14084199

申请日：2013-11-19

Applicant: Boe Technology Group Co. Ltd.

Inventor： Xing YAO

IPC: G02F1/1343 ,  G02B27/22

CPC classification number: H04N13/312 ,  G02B27/22 ,  G02B27/2214 ,  H04N13/356 ,  H04N2213/001 ,  Y10T29/49105

Abstract: Embodiments of the present invention provide a switch cell and manufacturing method thereof, a display substrate, and a display device and the manufacturing method thereof, the driving power required by the switch cell can be reduced. The switch cell for converting a 2D image to be displayed by a display substrate into a 3D image comprises: a switch substrate; and at least one metal electrode provided on the switch substrate, wherein the position of the metal electrode is configured to be correspond to at least a portion of one corresponding black matrix of at least one black matrix provided on a display substrate.

Abstract translation: 本发明的实施例提供一种开关电池及其制造方法，显示基板和显示装置及其制造方法，可以减少开关电池所需的驱动电力。 用于将由显示基板显示的2D图像转换为3D图像的开关单元包括：开关基板; 以及设置在开关基板上的至少一个金属电极，其中金属电极的位置被配置为对应于设置在显示基板上的至少一个黑矩阵的一个对应的黑矩阵的至少一部分。