Alignment and ordering of vector elements for single instruction multiple data processing
    51.
    发明授权
    Alignment and ordering of vector elements for single instruction multiple data processing 有权
    用于单指令多数据处理的向量元素的对齐和排序

    公开(公告)号:US07197625B1

    公开(公告)日:2007-03-27

    申请号:US09662832

    申请日:2000-09-15

    IPC分类号: G06F15/80 G06F9/312

    摘要: The present invention provides alignment and ordering of vector elements for SIMD processing. In the alignment of vector elements for SIMD processing, one vector is loaded from a memory unit into a first register and another vector is loaded from the memory unit into a second register. The first vector contains a first byte of an aligned vector to be generated. Then, a starting byte specifying the first byte of an aligned vector is determined. Next, a vector is extracted from the first register and the second register beginning from the first bit in the first byte of the first register continuing through the bits in the second register. Finally, the extracted vector is replicated into a third register such that the third register contains a plurality of elements aligned for SIMD processing. In the ordering of vector elements for SIMD processing, a first vector is loaded from a memory unit into a first register and a second vector is loaded from the memory unit into a second register. Then, a subset of elements are selected from the first register and the second register. The elements from the subset are then replicated into the elements in the third register in a particular order suitable for subsequent SIMD vector processing.

    摘要翻译: 本发明提供用于SIMD处理的向量元素的对准和排序。 在用于SIMD处理的向量元素的对齐中,一个向量从存储器单元加载到第一寄存器中,另一个向量从存储器单元加载到第二寄存器中。 第一个向量包含要生成的对齐向量的第一个字节。 然后,确定指定对齐向量的第一个字节的起始字节。 接下来,从第一寄存器提取向量,并且从第一寄存器的第一字节的第一位开始的第二寄存器继续通过第二寄存器中的位。 最后,将所提取的矢量复制到第三寄存器中,使得第三寄存器包含对准用于SIMD处理的多个元素。 在用于SIMD处理的向量元素的排序中,将第一向量从存储器单元加载到第一寄存器中,并且将第二向量从存储器单元加载到第二寄存器中。 然后,从第一寄存器和第二寄存器中选择元件的子集。 然后将来自子集的元素以适合于随后的SIMD向量处理的特定顺序复制到第三寄存器中的元素中。

    User programmable geometry engine
    52.
    发明授权
    User programmable geometry engine 有权
    用户可编程几何引擎

    公开(公告)号:US06900810B1

    公开(公告)日:2005-05-31

    申请号:US10727822

    申请日:2003-12-03

    IPC分类号: G06T1/00 G06T15/00

    CPC分类号: G06T15/005

    摘要: A programmable geometry engine is described. One embodiment of the programmable geometry engine includes a programmable primitive engine configured to receive primitive commands that include information for processing vertex data using user-developed programs or subroutines. The programmable primitive engine also is configured to transmit program commands that include program pointers and data pointers. In addition, the programmable geometry engine includes a processing engine configured to receive the program commands. The processing engine is further configured to retrieve the user-developed programs or subroutines using the program pointers and to retrieve vertex data using the data pointers. Also, the processing engine is configured to process the vertex data based on instructions included in the user-developed programs or subroutines to produce processed vertex data and to transmit results to the programmable primitive engine.

    摘要翻译: 描述了可编程几何引擎。 可编程几何引擎的一个实施例包括可编程原语引擎,其被配置为接收包括用于使用用户开发的程序或子例程处理顶点数据的信息的原始命令。 可编程原语引擎还被配置为传送包括程序指针和数据指针的程序命令。 另外,可编程几何引擎包括配置成接收程序命令的处理引擎。 处理引擎还被配置为使用程序指针检索用户开发的程序或子程序,并使用数据指针检索顶点数据。 此外,处理引擎被配置为基于包括在用户开发的程序或子程序中的指令来处理顶点数据,以产生经处理的顶点数据并将结果发送到可编程原始引擎。

    System, method and article of manufacture for decomposing surfaces using guard curves and reversed stitching
    53.
    发明授权
    System, method and article of manufacture for decomposing surfaces using guard curves and reversed stitching 有权
    使用防护曲线和反向缝合分解表面的系统,方法和制品

    公开(公告)号:US06624811B1

    公开(公告)日:2003-09-23

    申请号:US09652866

    申请日:2000-08-31

    IPC分类号: G06T1720

    CPC分类号: G06T17/20

    摘要: A system, method and article of manufacture are provided for decomposing surfaces using guard curves for rendering purposes during computer graphics processing. Initially, a patch is received. Thereafter, a plurality of strip curves associated with the patch is defined in a first predetermined direction. As such, areas are defined by the strip curves which are adapted for being decomposed into a plurality of primitives. Next, at least one guard curve associated with the patch is generated. The guard curve is positioned along ends of the strip curves and in a second predetermined direction perpendicular with respect to the first predetermined direction.

    摘要翻译: 提供了一种用于在计算机图形处理期间用于渲染目的的保护曲线来分解表面的系统,方法和制品。 最初,接收到一个补丁。 此后,在第一预定方向上限定与贴片相关联的多条带状曲线。 因此,区域由适于被分解成多个图元的条带曲线限定。 接下来,生成与补丁相关联的至少一个保护曲线。 保护曲线沿着带状曲线的端部并且在相对于第一预定方向垂直的第二预定方向上定位。

    Tessellation system, method and computer program product with interior and surrounding meshes
    54.
    发明授权
    Tessellation system, method and computer program product with interior and surrounding meshes 有权
    镶嵌系统,方法和计算机程序产品与内部和周围的网格

    公开(公告)号:US06600488B1

    公开(公告)日:2003-07-29

    申请号:US10287988

    申请日:2002-11-04

    IPC分类号: G06T1530

    CPC分类号: G06T17/20

    摘要: A system, method and article of manufacture are provided for decomposing surfaces for rendering purposes during computer graphics processing. Initially, an interior mesh of primitives is defined in a surface to be rendered. Next, a plurality of surrounding meshes is defined along sides of the interior mesh. The exterior sides of the surrounding meshes each include a plurality of equally sized segments and at least one fractional segment that is a fraction of the equally sized segments. With this configuration, a pattern of triangles is used that permits the number of triangles to be varied continuously from frame to frame while accommodating incremental evaluation techniques such as forward differencing without visual artifacts such as popping.

    摘要翻译: 在计算机图形处理期间提供用于分解表面以用于呈现目的的系统,方法和制造品。 最初,原始图案的内部网格被定义在要渲染的表面中。 接下来,沿着内部网格的侧面限定多个周围的网格。 周围网格的外侧各自包括多个相同大小的段和至少一个小数段,其是相当大小的段的一部分。 使用这种配置,使用三角形图案,其允许三角形的数量从帧到帧连续变化,同时容纳诸如前向差分的增量评估技术,而不会出现诸如弹出的视觉伪影。

    System, method and article of manufacture for fractional tessellation during graphics processing
    55.
    发明授权
    System, method and article of manufacture for fractional tessellation during graphics processing 有权
    图形处理中的分数细分的系统,方法和制造

    公开(公告)号:US06504537B1

    公开(公告)日:2003-01-07

    申请号:US09655103

    申请日:2000-09-05

    IPC分类号: G06T1530

    CPC分类号: G06T17/20

    摘要: A system, method and article of manufacture are provided for decomposing surfaces for rendering purposes during computer graphics processing. Initially, an interior mesh of primitives is defined in a surface to be rendered. Next, a plurality of surrounding meshes is defined along sides of the interior mesh. The exterior sides of the surrounding meshes each include a plurality of equally sized segments and at least one fractional segment that is a fraction of the equally sized segments. With this configuration, a pattern of triangles is used that permits the number of triangles to be varied continuously from frame to frame while accommodating incremental evaluation techniques such as forward differencing without visual artifacts such as popping.

    摘要翻译: 在计算机图形处理期间提供用于分解表面以用于呈现目的的系统,方法和制造品。 最初,原始图案的内部网格被定义在要渲染的表面中。 接下来,沿着内部网格的侧面限定多个周围的网格。 周围网格的外侧各自包括多个相同大小的段和至少一个小数段,其是相当大小的段的一部分。 使用这种配置,使用三角形图案,其允许三角形的数量从帧到帧连续变化,同时容纳诸如前向差分的增量评估技术,而不会出现诸如弹出的视觉伪影。

    Optical system for single camera stereo video
    56.
    发明授权
    Optical system for single camera stereo video 失效
    单相立体声视频光学系统

    公开(公告)号:US5835133A

    公开(公告)日:1998-11-10

    申请号:US590347

    申请日:1996-01-23

    摘要: A mechanism and method for recording stereo video with standard camera system electronics and a uniquely adapted optical assembly is disclosed. The optical assembly comprises left and right optical channels disposed to capture and project separate left and right images onto a single image sensor such that the boundary between the projected images is sharply delineated with no substantial overlap or gap. The viewpoints of the left and right optical channels are separated by a distance, d, such that the captured images are differentiated to produce a stereo image pair. By proper disposition of the left and right optical channels, stereo image pairs exhibiting full stereo overlap without keystone distortion are obtained. One image of the stereo pair is produced for visualization by the left eye and the other image is produced for visualization by the right eye. Alternatively, the images can be interrogated by a computer system for generating three dimensional position data. The image sensor is scanned in a standard fashion such that the left and right images are sampled by the video sampling circuitry of the camera unit at substantially the same time. In one mode, a pair of anamorphic lenses compress the left and right images along the axis of the image sensor scan lines so that each video field represents a stereo pair of images at a substantially unity anamorphic ratio and at an aspect ratio substantially equal to that of the image sensor. In a another mode, a conventional (non-distorting) lens is utilized and each video frame represents a pair of images having an aspect ratio equal to one-half that of the image sensor. A stereo playback mechanism and method is also disclosed.

    摘要翻译: 公开了一种使用标准摄像机系统电子装置记录立体视频和独特适用的光学组件的机构和方法。 光学组件包括左和右光学通道,其被设置成捕获并将分离的左和右图像投影到单个图像传感器上,使得投影图像之间的边界被清楚地描绘而没有实质的重叠或间隙。 左和右光学通道的视点被分开距离d,使得捕获的图像被区分以产生立体图像对。 通过适当地设置左右光通道,可以获得没有梯形失真的完全立体重叠的立体图像对。 立体声对的一个图像被产生用于由左眼进行可视化,并且另一图像被产生用于通过右眼可视化。 或者,可以由用于产生三维位置数据的计算机系统询问图像。 以标准方式扫描图像传感器,使得左右图像基本上同时由相机单元的视频采样电路采样。 在一种模式中,一对变形透镜沿着图像传感器扫描线的轴压缩左图像和右图像,使得每个视频场以基本上一致的变形比表示立体图像,并且基本上与 的图像传感器。 在另一种模式中,使用常规(非失真)透镜,并且每个视频帧表示具有等于图像传感器的一半的宽高比的一对图像。 还公开了立体声播放机构和方法。

    HARDWARE OVERRIDE OF APPLICATION PROGRAMMING INTERFACE PROGRAMMED STATE
    58.
    发明申请
    HARDWARE OVERRIDE OF APPLICATION PROGRAMMING INTERFACE PROGRAMMED STATE 有权
    应用编程接口编程状态的硬件

    公开(公告)号:US20120284568A1

    公开(公告)日:2012-11-08

    申请号:US13550468

    申请日:2012-07-16

    IPC分类号: G06F11/30

    摘要: A method and system for overriding state information programmed into a processor using an application programming interface (API) avoids introducing error conditions in the processor. An override monitor unit within the processor stores the programmed state for any setting that is overridden so that the programmed state can be restored when the error condition no longer exists. The override monitor unit overrides the programmed state by forcing the setting to a legal value that does not cause an error condition. The processor is able to continue operating without notifying a device driver that an error condition has occurred since the error condition is avoided.

    摘要翻译: 使用应用编程接口(API)将编程到处理器中的状态信息进行覆盖的方法和系统避免了在处理器中引入错误状况。 处理器内的覆盖监视单元存储被覆盖的任何设置的编程状态,以便当错误条件不再存在时可以恢复编程状态。 覆盖监视器单元通过强制设置为不引起错误条件的合法值来覆盖编程状态。 处理器能够在不通知设备驱动程序的情况下继续运行,因为避免了错误条件,所以发生了错误状况。

    Providing extended precision in SIMD vector arithmetic operations
    59.
    发明授权
    Providing extended precision in SIMD vector arithmetic operations 有权
    提供SIMD向量算术运算的扩展精度

    公开(公告)号:US08074058B2

    公开(公告)日:2011-12-06

    申请号:US12480414

    申请日:2009-06-08

    IPC分类号: G06F15/00

    摘要: The present invention provides extended precision in SIMD arithmetic operations in a processor having a register file and an accumulator. A first set of data elements and a second set of data elements are loaded into first and second vector registers, respectively. Each data element comprises N bits. Next, an arithmetic instruction is fetched from memory. The arithmetic instruction is decoded. Then, the first vector register and the second vector register are read from the register file. The present invention executes the arithmetic instruction on corresponding data elements in the first and second vector registers. The resulting element of the execution is then written into the accumulator. Then, the resulting element is transformed into an N-bit width element and written into a third register for further operation or storage in memory. The transformation of the resulting element can include, for example, rounding, clamping, and/or shifting the element.

    摘要翻译: 本发明在具有寄存器文件和累加器的处理器中提供SIMD算术运算的扩展精度。 第一组数据元素和第二组数据元素分别被加载到第一和第二向量寄存器中。 每个数据元素包括N位。 接下来,从存储器中取出算术指令。 算术指令被解码。 然后,从寄存器文件读取第一向量寄存器和第二向量寄存器。 本发明对第一和第二向量寄存器中的相应数据元素执行算术指令。 然后将执行的结果元素写入累加器。 然后,将所得到的元素变换为N位元素,并写入第三寄存器以进一步操作或存储在存储器中。 所得到的元件的变换可以包括例如舍入,夹紧和/或移动元件。