公开(公告)号：US20070252221A1

公开(公告)日：2007-11-01

申请号：US11785464

申请日：2007-04-18

申请人： Hiroyuki Ohta

发明人： Hiroyuki Ohta

IPC分类号： H01L29/94

CPC分类号： H01L21/823878 ,  H01L21/823418 ,  H01L21/823468 ,  H01L21/823481 ,  H01L21/823814 ,  H01L21/823864

摘要： The semiconductor device comprises gate electrodes 50 formed on a silicon substrate 32 with a gate insulation film 48 formed therebetween, source/drain diffused layers 66n, 66p formed in the silicon substrate 32 on both sides of the gate electrodes 50, a skirt-like insulation film 58 formed on a lower part of the side wall of the gate electrode 50 and on the side end of the gate insulation film 48, and a sidewall insulation film 60 formed on the exposed part of the side wall of the gate electrode 50, which is not covered with the skirt-like insulation film 58 and the side surface of the skirt-like insulation film 58.

摘要翻译： 半导体器件包括形成在硅衬底32上的栅电极50，栅极绝缘膜48形成在它们之间，源极/漏极扩散层66 n，66 p形成在栅电极50两侧的硅衬底32中， 形成在栅极电极50的侧壁的下部和栅极绝缘膜48的侧端的绝缘膜58以及形成在栅电极50的侧壁的暴露部分上的侧壁绝缘膜60 ，其不被裙状绝缘膜58和裙状绝缘膜58的侧表面覆盖。

公开(公告)号：US20070240519A1

公开(公告)日：2007-10-18

申请号：US11698584

申请日：2007-01-25

申请人： Hiromi Shimazu ,  Hiroyuki Ohta

发明人： Hiromi Shimazu ,  Hiroyuki Ohta

IPC分类号： G01B7/16

CPC分类号： G01B7/18

摘要： It is an object to prevent breakage of a mechanical quantity measuring apparatus made of a monocrystalline silicon substrate due to a large distortion. A mounting board for measuring distortion is provided on a rear surface of a sensor chip made of a semiconductor monocrystalline substrate having a distortion detecting unit. Even when a large distortion occurs in an object to be measured, a distortion occurring in the semiconductor monocrystalline substrate can be controlled by the mounting board. Therefore, the semiconductor monocrystalline substrate is not broken, and a highly reliable mechanical quantity measuring apparatus can be provided.

摘要翻译： 其目的是防止由于大的变形而由单晶硅衬底制成的机械量测量装置的破损。 用于测量变形的安装板设置在由具有失真检测单元的半导体单晶衬底制成的传感器芯片的后表面上。 即使在要测量的对象发生大的失真，也可以通过安装基板来控制在半导体单晶衬底中产生的变形。 因此，半导体单晶衬底不会破裂，并且可以提供高度可靠的机械量测量装置。

公开(公告)号：US20070202695A1

公开(公告)日：2007-08-30

申请号：US11504585

申请日：2006-08-16

申请人： Kazuo Kawamura ,  Hiroyuki Ohta

发明人： Kazuo Kawamura ,  Hiroyuki Ohta

IPC分类号： H01L21/44

CPC分类号： H01L21/28518 ,  H01L21/0206 ,  H01L21/2633 ,  H01L21/28052 ,  H01L21/823412 ,  H01L21/823425 ,  H01L21/823807 ,  H01L21/823814 ,  H01L29/665 ,  H01L29/6653

摘要： A semiconductor device fabrication method that prevents an increase in junction leakage current in a semiconductor device in which nickel silicide is used as a gate electrode, a source electrode, and a drain electrode. A native oxide film formed on the surface of a semiconductor substrate where a gate region, a source region, and a drain region are formed is removed by sputter etching in which control is exercised in order to suppress the penetration of the semiconductor substrate by ions to 2 nm or less from the surface. A film of nickel or a nickel compound is formed on the surface of the semiconductor substrate where the native oxide film is removed, and nickel silicide is formed in the gate region, the source region, and the drain region by anneal. As a result, the formation of a spike is prevented in the gate region, the source region, and the drain region and a leakage current is decreased.

摘要翻译： 一种半导体器件制造方法，其防止了使用硅化镍作为栅电极，源电极和漏电极的半导体器件中的结漏电流的增加。 通过溅射蚀刻去除形成在其上形成栅极区域，源极区域和漏极区域的半导体衬底的表面上的自然氧化膜，其中通过溅射蚀刻来进行控制，以便抑制半导体衬底由离子穿透到 距表面2nm以下。 在去除了自然氧化膜的半导体衬底的表面上形成镍或镍化合物的膜，并且通过退火在栅极区，源极区和漏极区中形成硅化镍。 结果，在栅极区域，源极区域和漏极区域中防止形成尖峰，并且漏电流减小。

公开(公告)号：US07252010B2

公开(公告)日：2007-08-07

申请号：US11239018

申请日：2005-09-30

申请人： Hiroyuki Ohta ,  Takashi Sumigawa

发明人： Hiroyuki Ohta ,  Takashi Sumigawa

IPC分类号： G01L9/00

CPC分类号： G01L9/0055

摘要： In order to realize a compact wireless pressure sensor system which transmits an accurate pressure value, the present invention provides a pressure sensor system constructed at least by a silicon chip on which a circuit operated by electromagnetic wave energy is mounted, and a film which supports an antenna, in which film a through-hole is provided in the vicinity of a diaphragm part.

摘要翻译： 为了实现传递精确的压力值的紧凑型无线压力传感器系统，本发明提供一种至少由硅芯片构成的压力传感器系统，其上安装有由电磁波能量操作的电路，以及支撑 天线，其中薄膜在隔膜部分附近设置有通孔。

公开(公告)号：US07223664B2

公开(公告)日：2007-05-29

申请号：US11066222

申请日：2005-02-28

申请人： Hiroyuki Ohta

发明人： Hiroyuki Ohta

IPC分类号： H01L21/336

CPC分类号： H01L21/823878 ,  H01L21/823418 ,  H01L21/823468 ,  H01L21/823481 ,  H01L21/823814 ,  H01L21/823864

摘要： The semiconductor device comprises gate electrodes 50 formed on a silicon substrate 32 with a gate insulation film 48 formed therebetween, source/drain diffused layers 66n, 66p formed in the silicon substrate 32 on both sides of the gate electrodes 50, a skirt-like insulation film 58 formed on a lower part of the side wall of the gate electrode 50 and on the side end of the gate insulation film 48, and a sidewall insulation film 60 formed on the exposed part of the side wall of the gate electrode 50, which is not covered with the skirt-like insulation film 58 and the side surface of the shirt-like insulation film 58.

摘要翻译： 半导体器件包括形成在硅衬底32上的栅电极50，栅极绝缘膜48形成在它们之间，源极/漏极扩散层66 n，66 p形成在栅电极50两侧的硅衬底32中， 形成在栅极电极50的侧壁的下部和栅极绝缘膜48的侧端的绝缘膜58以及形成在栅电极50的侧壁的暴露部分上的侧壁绝缘膜60 ，其不被裙状绝缘膜58和衬衫状绝缘膜58的侧表面覆盖。

公开(公告)号：US07193270B2

公开(公告)日：2007-03-20

申请号：US10849211

申请日：2004-05-20

申请人： Hiroyuki Ohta ,  Yukihiro Kumagai ,  Masahiro Moniwa ,  Shingo Nasu

发明人： Hiroyuki Ohta ,  Yukihiro Kumagai ,  Masahiro Moniwa ,  Shingo Nasu

IPC分类号： H01L29/76

CPC分类号： H01L29/66742 ,  H01L27/0688 ,  H01L27/105 ,  H01L27/1052 ,  H01L29/42392 ,  H01L29/78642

摘要： A semiconductor device which, even when a vertical transistor is adopted, is able to prevent a product yield from decreasing and performance from deteriorating, and at the same time, to achieve high-density integration of chips and high performance. The semiconductor device includes: a semiconductor substrate; a tower-like gate pillar formed on the semiconductor substrate via an insulation layer and including a channel region formed so as to be positioned between impurity diffusion regions in a vertically extended direction with respect to a principal side of the substrate; a gate insulation film formed on an outer surface of the gate pillar; and a gate electrode film including multiple conductive layers formed on an outer surface of the gate insulation film.

摘要翻译： 即使采用垂直晶体管也能够防止产品产量降低和性能劣化的半导体器件，同时实现芯片的高密度集成和高性能化。 半导体器件包括：半导体衬底; 通过绝缘层形成在半导体衬底上的塔状栅极柱，并且包括沟道区域，该沟道区域形成为位于相对于衬底的主面沿垂直延伸方向的杂质扩散区域之间; 形成在所述门柱的外表面上的栅极绝缘膜; 以及在所述栅极绝缘膜的外表面上形成有多个导电层的栅极电极膜。

公开(公告)号：US20060219022A1

公开(公告)日：2006-10-05

申请号：US11239018

申请日：2005-09-30

申请人： Hiroyuki Ohta ,  Takashi Sumigawa

发明人： Hiroyuki Ohta ,  Takashi Sumigawa

IPC分类号： G01L9/00

CPC分类号： G01L9/0055

摘要： In order to realize a compact wireless pressure sensor system which transmits an accurate pressure value, the present invention provides a pressure sensor system constructed at least by a silicon chip on which a circuit operated by electromagnetic wave energy is mounted, and a film which supports an antenna, in which film a through-hole is provided in the vicinity of a diaphragm part.

摘要翻译： 为了实现传递精确的压力值的紧凑型无线压力传感器系统，本发明提供一种至少由硅芯片构成的压力传感器系统，其上安装有由电磁波能量操作的电路，以及支撑 天线，其中薄膜在隔膜部分附近设置有通孔。

公开(公告)号：US20060202301A1

公开(公告)日：2006-09-14

申请号：US11433671

申请日：2006-05-15

申请人： Hiroyuki Ohta ,  Yasunori Iriyama

发明人： Hiroyuki Ohta ,  Yasunori Iriyama

IPC分类号： H01L29/00

CPC分类号： H01L21/823481 ,  H01L21/76224

摘要： A semiconductor device includes: a silicon substrate with semiconductor elements; an isolation trench formed in the silicon substrate for isolating active regions in the silicon substrate, the isolation trench having a trapezoidal cross sectional shape having a width gradually narrowing with a depth from the surface of the silicon substrate; a first liner insulating film formed on the surface of the trench and made of a silicon oxide film or a silicon oxynitride film having a thickness of 1 to 5 nm; a second liner insulating film formed on the first liner insulating film and made of a silicon nitride film having a thickness of 2 to 8 nm; and an isolation region burying the trench defined by the second liner insulating film.

公开(公告)号：US07037803B2

公开(公告)日：2006-05-02

申请号：US10721870

申请日：2003-11-26

申请人： Kengo Inoue ,  Toshifumi Mori ,  Ryou Nakamura ,  Hiroyuki Ohta ,  Takashi Saiki

发明人： Kengo Inoue ,  Toshifumi Mori ,  Ryou Nakamura ,  Hiroyuki Ohta ,  Takashi Saiki

IPC分类号： H01L21/76

CPC分类号： H01L21/76224 ,  H01L21/823871 ,  H01L21/823878

摘要： A semiconductor device manufacture method has the steps of: (a) forming a polishing stopper layer over a semiconductor substrate; (b) etching the semiconductor substrate to form a trench; (c) forming a first liner insulating layer of silicon oxide over the surface of the trench; (d) forming a second liner insulating layer of silicon nitride over the first liner insulating layer, the second liner insulating layer having a thickness of at least 20 nm or at most 8 nm; (e1) depositing a third liner insulating layer of silicon oxide over the second liner insulating layer by plasma CVD at a first bias; and (e2) depositing an isolation layer of silicon oxide by plasma CVD at a second bias higher than the first bias, the isolation layer burying a recess defined by the third liner insulating layer.

摘要翻译： 半导体器件制造方法具有以下步骤：（a）在半导体衬底上形成抛光阻挡层; （b）蚀刻半导体衬底以形成沟槽; （c）在所述沟槽的表面上形成氧化硅的第一衬垫绝缘层; （d）在所述第一衬垫绝缘层上形成氮化硅的第二衬垫绝缘层，所述第二衬垫绝缘层的厚度为至少20nm或至多8nm; （e1）在第一偏压下通过等离子体CVD沉积第二衬里绝缘层上的第三衬垫绝缘层氧化硅; 和（e2）以高于第一偏压的第二偏压通过等离子体CVD沉积氧化硅隔离层，隔离层埋设由第三衬里绝缘层限定的凹部。

公开(公告)号：US07009279B2

公开(公告)日：2006-03-07

申请号：US10845290

申请日：2004-05-12

申请人： Shingo Nasu ,  Tomio Iwasaki ,  Hiroyuki Ohta ,  Yukihiro Kumagai ,  Shuji Ikeda

发明人： Shingo Nasu ,  Tomio Iwasaki ,  Hiroyuki Ohta ,  Yukihiro Kumagai ,  Shuji Ikeda

IPC分类号： H01L31/117

CPC分类号： H01L29/167 ,  H01L21/2807 ,  H01L29/1004 ,  H01L29/1054 ,  H01L29/4966 ,  H01L29/7378

摘要： In semiconductor devices, a semiconductor device is provided which is high in reliability while suppressing changes in characteristics such as threshold voltages. In a semiconductor device which has a gate dielectric film above a semiconductor substrate and also has above the gate dielectric film a gate electrode film made of silicon germanium chosen as its main constituent material, or alternatively in a semiconductor device which has beneath the gate dielectric film a channel made of silicon as its main constituent material and which has below the channel a channel underlayer film made of silicon germanium as its main constituent material, a specifically chosen dopant, such as cobalt (Co) or carbon (C) or nitrogen (N), is added to the gate electrode and the channel underlayer film, for use as the unit for suppressing diffusion of germanium in the gate electrode or in the channel underlayer film.

摘要翻译： 在半导体器件中，提供了一种在抑制诸如阈值电压的特性变化的同时高可靠性的半导体器件。 在半导体器件中，在半导体衬底上方具有栅极电介质膜，并且还具有栅极电介质膜上方的由选择为主要构成材料的硅锗制成的栅电极膜，或者替代地在栅极电介质膜下方的半导体器件 由硅作为其主要构成材料的通道，并且在通道下方具有由硅锗作为其主要构成材料的沟道下层膜，特别选择的掺杂剂，例如钴（Co）或碳（C）或氮（N ）添加到栅极电极和沟道下层膜中，用作抑制栅极电极或沟道下层膜中锗扩散的单元。