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    Semiconductor Devices and Methods of Forming Thereof
    51.
    发明申请
    Semiconductor Devices and Methods of Forming Thereof 审中-公开
    半导体器件及其形成方法

    公开(公告)号：US20150321901A1

    公开(公告)日：2015-11-12

    申请号：US14798112

    申请日：2015-07-13

    Applicant: Infineon Technologies AG

    Inventor： Alfons Dehe ,  Carsten Ahrens ,  Stefan Barzen ,  Wolfgang Friza

    IPC: B81B3/00

    CPC classification number: B81B3/0072 ,  B81B3/001 ,  B81B3/0027 ,  B81B2201/0257 ,  B81B2203/0127 ,  B81B2203/0315 ,  B81C1/00182 ,  B81C1/00404 ,  B81C1/00984 ,  B81C2201/017 ,  B81C2201/115

    Abstract: In accordance with an embodiment of the present invention, a method of forming a semiconductor device includes forming a sacrificial layer over a first surface of a workpiece having the first surface and an opposite second surface. A membrane is formed over the sacrificial layer. A through hole is etched through the workpiece from the second surface to expose a surface of the sacrificial layer. At least a portion of the sacrificial layer is removed from the second surface to form a cavity under the membrane. The cavity is aligned with the membrane.

    Abstract translation: 根据本发明的实施例，形成半导体器件的方法包括在具有第一表面和相对的第二表面的工件的第一表面上形成牺牲层。 在牺牲层上形成膜。 从第二表面通过工件蚀刻通孔以暴露牺牲层的表面。 牺牲层的至少一部分从第二表面移除以在膜下形成空腔。 空腔与膜对准。

    Integrated Circuits with Magnetic Core Inductors and Methods of Fabrications Thereof
    53.
    发明申请
    Integrated Circuits with Magnetic Core Inductors and Methods of Fabrications Thereof 审中-公开
    具有磁芯电感器的集成电路及其制造方法

    公开(公告)号：US20140203399A1

    公开(公告)日：2014-07-24

    申请号：US14219944

    申请日：2014-03-19

    Applicant: Infineon Technologies AG

    Inventor： Renate Hofmann ,  Carsten Ahrens ,  Wolfgang Klein ,  Alexander Glas

    IPC: H01L49/02 ,  H01F27/28

    CPC classification number: H01L28/10 ,  H01F27/2804 ,  H01F41/046 ,  H01F2017/0066 ,  H01L23/5227 ,  H01L25/16 ,  H01L2924/0002 ,  H01L2924/00

    Abstract: In one embodiment, a method of forming a semiconductor device includes forming a first inductor coil within and/or over a substrate. The first inductor coil is formed adjacent a top side of the substrate. First trenches are formed within the substrate adjacent the first inductor coil. The first trenches are filled at least partially with a magnetic fill material. At least a first portion of the substrate underlying the first inductor coil is thinned. A backside magnetic layer is formed under the first portion of the substrate. The backside magnetic layer and the magnetic fill material form at least a part of a magnetic core region of the first inductor coil.

    Abstract translation: 在一个实施例中，形成半导体器件的方法包括在衬底之内和/或之上形成第一电感线圈。 第一电感线圈形成在衬底的顶侧附近。 第一沟槽形成在与第一电感线圈相邻的衬底内。 至少部分地用磁性填充材料填充第一沟槽。 至少第一电感线圈下面的衬底的第一部分变薄。 背面磁性层形成在基板的第一部分之下。 背面磁性层和磁性填充材料形成第一电感线圈的磁芯区域的至少一部分。

    Protective structure
    54.
    发明授权
    Protective structure 有权
    防护结构

    公开(公告)号：US08766415B2

    公开(公告)日：2014-07-01

    申请号：US14011885

    申请日：2013-08-28

    Applicant: Infineon Technologies AG

    Inventor： Andre Schmenn ,  Damian Sojka ,  Carsten Ahrens

    IPC: H01L31/075 ,  H01L31/105 ,  H01L31/117

    CPC classification number: H01L27/0255 ,  H01L21/22 ,  H01L21/265 ,  H01L29/66121 ,  H01L29/868

    Abstract: A protective structure may include: a semiconductor substrate having a doping of a first conductivity type; a semiconductor layer having a doping of a second conductivity type arranged at a surface of the semiconductor substrate; a buried layer having a doping of the second conductivity type arranged in a first region of the semiconductor layer and at the junction between the semiconductor layer and the semiconductor substrate; a first dopant zone having a doping of the first conductivity type arranged in the first region of the semiconductor layer above the buried layer; a second dopant zone having a doping of the second conductivity type arranged in a second region of the semiconductor layer; an electrical insulation arranged between the first region and the second region of the semiconductor layer; and a common connection device for the first dopant zone and the second dopant zone.

    Abstract translation: 保护结构可以包括：具有第一导电类型的掺杂的半导体衬底; 具有布置在所述半导体衬底的表面处的第二导电类型的掺杂的半导体层; 具有布置在所述半导体层的第一区域中以及所述半导体层和所述半导体衬底之间的接合处的掺杂所述第二导电类型的掩埋层; 第一掺杂区，其具有布置在所述半导体层的所述第一区域之上的所述第一导电类型的掺杂; 具有布置在所述半导体层的第二区域中的所述第二导电类型的掺杂的第二掺杂区; 布置在半导体层的第一区域和第二区域之间的电绝缘体; 以及用于第一掺杂区和第二掺杂区的公共连接装置。

    Integrated circuits with magnetic core inductors and methods of fabrications thereof
    55.
    发明授权
    Integrated circuits with magnetic core inductors and methods of fabrications thereof 有权
    具有磁芯电感器的集成电路及其制造方法

    公开(公告)号：US08709831B2

    公开(公告)日：2014-04-29

    申请号：US13903935

    申请日：2013-05-28

    Applicant: Infineon Technologies Ag

    Inventor： Renate Hofmann ,  Carsten Ahrens ,  Wolfgang Klein ,  Alexander Glas

    IPC: H01L27/22

    CPC classification number: H01L28/10 ,  H01F27/2804 ,  H01F41/046 ,  H01F2017/0066 ,  H01L23/5227 ,  H01L25/16 ,  H01L2924/0002 ,  H01L2924/00

    Abstract: In one embodiment, a method of forming a semiconductor device includes forming a first inductor coil within and/or over a substrate. The first inductor coil is formed adjacent a top side of the substrate. First trenches are formed within the substrate adjacent the first inductor coil. The first trenches are filled at least partially with a magnetic fill material. At least a first portion of the substrate underlying the first inductor coil is thinned. A backside magnetic layer is formed under the first portion of the substrate. The backside magnetic layer and the magnetic fill material form at least a part of a magnetic core region of the first inductor coil.

    Abstract translation: 在一个实施例中，形成半导体器件的方法包括在衬底之内和/或之上形成第一电感线圈。 第一电感线圈形成在衬底的顶侧附近。 第一沟槽形成在与第一电感线圈相邻的衬底内。 至少部分地用磁性填充材料填充第一沟槽。 至少第一电感线圈下面的衬底的第一部分变薄。 背面磁性层形成在基板的第一部分之下。 背面磁性层和磁性填充材料形成第一电感线圈的磁芯区域的至少一部分。

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