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公开(公告)号:US11444188B2
公开(公告)日:2022-09-13
申请号:US16648402
申请日:2017-12-21
Applicant: Intel Corporation
Inventor: Ravi Pillarisetty , Nicole K. Thomas , Hubert C. George , Jeanette M. Roberts , Payam Amin , Zachary R. Yoscovits , Roman Caudillo , James S. Clarke
IPC: H01L29/778 , H01L29/12 , H01L21/321 , H01L21/8234 , H01L29/165 , H01L29/66 , H01L29/76 , H01L29/82 , B82Y10/00 , B82Y40/00
Abstract: Disclosed herein are quantum dot devices, as well as related computing devices and methods. For example, in some embodiments, a quantum dot device may include: a base; a fin extending away from the base, wherein the fin includes a quantum well layer; an insulating material at least partially above the fin, wherein the insulating material includes a trench above the fin; and a gate metal on the insulating material and extending into the trench.
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公开(公告)号:US11387399B2
公开(公告)日:2022-07-12
申请号:US16305592
申请日:2016-06-09
Applicant: Intel Corporation
Inventor: Jeanette M. Roberts , Ravi Pillarisetty , David J. Michalak , Zachary R. Yoscovits , James S. Clarke , Van H. Le
Abstract: Disclosed herein are quantum dot devices, as well as related computing devices and methods. For example, in some embodiments, a quantum dot device may include: a substrate and a quantum well stack disposed on the substrate. The quantum well stack may include a quantum well layer and a back gate, and the back gate may be disposed between the quantum well layer and the substrate.
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公开(公告)号:US20220005943A1
公开(公告)日:2022-01-06
申请号:US17481406
申请日:2021-09-22
Applicant: Intel Corporation
Inventor: Jeanette M. Roberts , James S. Clarke , Ravi Pillarisetty , David J. Michalak , Zachary R. Yoscovits
IPC: H01L29/778 , H01L29/06 , H01L29/12 , H01L29/423 , H01L29/66 , H01L29/76
Abstract: Disclosed herein are quantum dot devices, as well as related computing devices and methods. For example, in some embodiments, a quantum dot device may include: a quantum well stack; a plurality of gates disposed on the quantum well stack; and a top gate at least partially disposed on the plurality of gates such that the plurality of gates are at least partially disposed between the top gate and the quantum well stack.
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公开(公告)号:US10991802B2
公开(公告)日:2021-04-27
申请号:US16306475
申请日:2016-06-10
Applicant: Intel Corporation
Inventor: Ravi Pillarisetty , Van H. Le , Jeanette M. Roberts , David J. Michalak , James S. Clarke , Zachary R. Yoscovits
IPC: H01L39/22 , H01L29/15 , G06N10/00 , H01L29/165 , H01L29/66 , H01L29/778 , H01L29/78 , B82Y10/00
Abstract: Disclosed herein are quantum dot devices with gate interface materials, as well as related computing devices and methods. For example, a quantum dot device may include a quantum well stack, a gate interface material, and a high-k gate dielectric. The gate interface material may be disposed between the high-k gate dielectric and the quantum well stack.
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公开(公告)号:US10978582B2
公开(公告)日:2021-04-13
申请号:US16097578
申请日:2016-06-10
Applicant: Intel Corporation
Inventor: Jeanette M. Roberts , Ravi Pillarisetty , David J. Michalak , Zachary R. Yoscovits , James S. Clarke
IPC: H01L29/778 , H01L29/66 , H01L29/165 , H01L29/423 , H01L29/10 , H01L29/76 , B82Y40/00 , B82Y10/00 , G06N10/00 , H01L21/3213 , H01L29/12 , H01L29/40 , H01L29/43 , H01L29/49 , H03K17/687 , H01L29/06 , H01L21/02 , H01L21/027 , H01L21/28 , H01L21/321
Abstract: Disclosed herein are quantum dot devices with patterned gates, as well as related computing devices and methods. For example, a quantum dot device may include gates disposed on a quantum well stack. In some embodiments, the gates may include a first gate with a first length; two second gates with second lengths arranged such that the first gate is disposed between the second gates; and two third gates with third lengths arranged such that the second gates are disposed between the third gates; and the first, second, and third lengths may all be different. In some embodiments, the gates may include a first set of gates alternatingly arranged with a second set of gates, spacers may be disposed between gates of the first set and gates of the second set, and gates in the first or second set may include a gate dielectric having a U-shaped cross-section.
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公开(公告)号:US20210036110A1
公开(公告)日:2021-02-04
申请号:US16648442
申请日:2017-12-17
Applicant: Intel Corporation
Inventor: Nicole K. Thomas , James S. Clarke , Jessica M. Torres , Ravi Pillarisetty , Kanwaljit Singh , Payam Amin , Hubert C. George , Jeanette M. Roberts , Roman Caudillo , David J. Michalak , Zachary R. Yoscovits , Lester Lampert
IPC: H01L29/12 , H01L27/088 , H01L21/8234 , H01L29/66 , H01L29/82
Abstract: Disclosed herein are quantum dot devices, as well as related computing devices and methods. For example, in some embodiments, a quantum dot device may include: a quantum well stack including a quantum well layer, wherein the quantum well layer includes an isotopically purified material; a gate dielectric above the quantum well stack; and a gate metal above the gate dielectric, wherein the gate dielectric is between the quantum well layer and the gate metal.
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公开(公告)号:US10910488B2
公开(公告)日:2021-02-02
申请号:US16019334
申请日:2018-06-26
Applicant: Intel Corporation
Inventor: Hubert C. George , Lester Lampert , James S. Clarke , Ravi Pillarisetty , Zachary R. Yoscovits , Nicole K. Thomas , Roman Caudillo , Kanwaljit Singh , David J. Michalak , Jeanette M. Roberts
IPC: H01L29/775 , H01L29/423 , H01L29/66 , H01L29/78 , H01L27/088 , H01L29/12 , H01L29/40 , H01L29/76 , H01L29/06 , B82Y10/00 , H01L29/778 , H01L29/82
Abstract: Disclosed herein are quantum dot devices, as well as related computing devices and methods. For example, in some embodiments, a quantum dot device may include: a base; a fin extending away from the base, wherein the fin has a first side face and a second side face, and the fin includes a quantum well layer; and a gate above the fin, wherein the gate extends down along the first side face.
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公开(公告)号:US10763349B2
公开(公告)日:2020-09-01
申请号:US16097730
申请日:2016-06-29
Applicant: Intel Corporation
Inventor: Ravi Pillarisetty , Van H. Le , Jeanette M. Roberts , James S. Clarke , Zachary R. Yoscovits , David J. Michalak
IPC: H01L29/778 , H01L29/06 , H01L29/12 , H01L29/66 , H01L29/786 , H01L29/15 , H01L49/00 , H01L27/088 , H01L29/775 , H01L29/417 , H01L29/78
Abstract: Disclosed herein are quantum dot devices, as well as related computing devices and methods. For example, in some embodiments, a quantum dot device may include: a quantum well stack including a quantum well layer, a doped layer, and a barrier layer disposed between the doped layer and the quantum well layer; and gates disposed above the quantum well stack. The doped layer may include a first material and a dopant, the first material may have a first diffusivity of the dopant, the barrier layer may include a second material having a second diffusivity of the dopant, and the second diffusivity may be less than the first diffusivity.
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公开(公告)号:US10763347B2
公开(公告)日:2020-09-01
申请号:US16349955
申请日:2016-12-14
Applicant: Intel Corporation
Inventor: Payam Amin , Nicole K. Thomas , James S. Clarke , Jessica M. Torres , Ravi Pillarisetty , Hubert C. George , Kanwaljit Singh , Van H. Le , Jeanette M. Roberts , Roman Caudillo , Zachary R. Yoscovits , David J. Michalak
IPC: H01L29/775 , G06N10/00 , H01L21/02 , H01L29/12 , H01L29/165 , H01L29/66 , H01L29/06 , H01L29/76 , H01L29/423 , H01L29/40 , B82Y10/00 , B82Y40/00 , H01L29/778 , H01L29/82
Abstract: Disclosed herein are quantum dot devices, as well as related computing devices and methods. For example, in some embodiments, a quantum processing device may include: a quantum well stack having alternatingly arranged relaxed and strained layers; and a plurality of gates disposed above the quantum well stack to control quantum dot formation in the quantum well stack.
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公开(公告)号:US10734482B2
公开(公告)日:2020-08-04
申请号:US16097592
申请日:2016-06-08
Applicant: Intel Corporation
Inventor: Jeanette M. Roberts , Ravi Pillarisetty , David J. Michalak , Zachary R. Yoscovits , James S. Clarke
IPC: H01L29/12 , H01L29/66 , H01L29/165 , B82Y10/00 , B82Y40/00 , H01L29/423 , H01L29/76 , H01L21/28 , H01L21/321 , H01L29/49 , H01L29/778 , H03K17/687 , H01L29/06
Abstract: Disclosed herein are quantum dot devices, as well as related computing devices and methods. For example, in some embodiments, a quantum dot device may include: a base; a fin extending away from the base, wherein the fin includes a quantum well layer; and one or more gates disposed on the fin. In some such embodiments, the one or more gates may include first, second, and third gates. Spacers may be disposed on the sides of the first and second gates, such that a first spacer is disposed on a side of the first gate proximate to the second gate, and a second spacer, physically separate from the first spacer, is disposed on a side of the second gate proximate to the first gate. The third gate may be disposed on the fin between the first and second gates and extend between the first and second spacers.
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