-
公开(公告)号：US20190034015A1
公开(公告)日：2019-01-31
申请号：US16148259
申请日：2018-10-01
Applicant: Japan Display Inc.
Inventor： Hiroyuki Abe , Takayuki Suzuki
IPC: G06F3/041 , G02F1/1343 , G02F1/1345 , G06F3/044 , G02F1/1333
Abstract: To enable size reduction of a display device having a touch sensor function in which a display area has a non-rectangular shape. In a display area, video lines extend in the first direction, and scan lines and common electrodes extend in the second direction. A video signal transmission circuit is arranged along a first edge of the display area, with which the one ends of the video lines are aligned. A scan line driver is arranged along a second edge of the display area, with which the ends of the scan lines and the common electrodes are aligned. The display area has a shape including an overlapping part between the first edge and the second edge. In a part of the frame area adjacent to the overlapping part, the scan line driver is arranged more outward than the video signal transmission circuit.
-
公开(公告)号：US10134351B2
公开(公告)日：2018-11-20
申请号：US15898272
申请日：2018-02-16
Applicant: Japan Display Inc.
Inventor： Takayuki Suzuki , Hiroyuki Abe , Masahiro Maki , Mitsuru Goto
IPC: G06F3/044 , G09G3/36 , G06F3/041 , G02F1/133 , G02F1/1333 , G02F1/1335 , G02F1/1362
Abstract: A display device includes pixel electrodes formed in an image display area of a substrate, a common electrode formed in the image display area, inside signal lines formed inside the image display area, and electrically connected to the pixel electrodes, outside signal lines formed outside the image display area, and electrically connected to the inside signal lines, and a common line formed inside and outside the image display area, and electrically connected to the common electrode. An image is displayed under a control of a light using an electric field developed between the pixel electrodes and the common electrode. A coupling capacitance is formed between the inside signal lines and the common electrode. The outside signal lines each include a first portion, and a second portion higher in electric resistance than the first portion and the inside signal lines.
-
公开(公告)号：US10120475B2
公开(公告)日：2018-11-06
申请号：US15421581
申请日：2017-02-01
Applicant: Japan Display Inc.
Inventor： Hiroyuki Abe , Takayuki Suzuki
IPC: G06F3/041 , G02F1/1333 , G02F1/1343 , G06F3/044 , G02F1/1345
Abstract: To enable size reduction of a display device having a touch sensor function in which a display area has a non-rectangular shape. In a display area, video lines extend in the first direction, and scan lines and common electrodes extend in the second direction. A video signal transmission circuit is arranged along a first edge of the display area, with which the one ends of the video lines are aligned. A scan line driver is arranged along a second edge of the display area, with which the ends of the scan lines and the common electrodes are aligned. The display area has a shape including an overlapping part between the first edge and the second edge. In a part of the frame area adjacent to the overlapping part, the scan line driver is arranged more outward than the video signal transmission circuit.
-
公开(公告)号：US10101618B2
公开(公告)日：2018-10-16
申请号：US15427406
申请日：2017-02-08
Applicant: Japan Display Inc.
Inventor： Hiroyuki Abe , Kentaro Agata , Masaki Murase , Kazune Matsumura
IPC: G02F1/1345 , H01L27/12 , G02F1/1368 , G02F1/1362 , G02F1/1333 , G02F1/1343
Abstract: In an IPS-mode liquid crystal display device, the area of a terminal portion is decreased. A liquid crystal display device includes a TFT substrate and a counter substrate attached to the TFT substrate with a sealing material, and includes a display region and a terminal portion formed on the TFT substrate. A shielding transparent conductive film is formed on the outer side of the counter substrate. On the terminal portion, an earth pad formed with a transparent conductive film is formed on an organic passivation film. The shielding transparent conductive film is connected to the earth pad through a conductor. Below organic passivation film of the terminal portion, a wire is formed.
-
公开(公告)号：US09972268B2
公开(公告)日：2018-05-15
申请号：US15097414
申请日：2016-04-13
Applicant: Japan Display Inc.
Inventor： Hiroyuki Abe , Takayuki Suzuki
CPC classification number: G09G3/3677 , G09G2300/0434 , G09G2310/0283 , G09G2310/0286 , G09G2310/08 , G11C19/28
Abstract: The plurality of stages of circuit blocks of a driver circuit in a display device include a first transistor and a second transistor. The first transistor is connected at its gate with a first node and controls conductivity between a scanning signal line and a first clock signal line applied with a first clock signal. The first node is at an active potential when at least any one signal of signals output from one stage in each of a forward direction and a reverse direction is at the active potential. The second transistor is connected at its gate with the first node and controls conductivity between the first clock signal line and an input signal line of another stage of circuit block.
-
Patent Agency Ranking
公开(公告)号：US20180102103A1
公开(公告)日：2018-04-12
申请号：US15830061
申请日：2017-12-04
Applicant: Japan Display Inc.
Inventor： Hiroyuki Abe , Masahiro Maki , Hideo Sato , Hiroaki Komatsu
CPC classification number: G09G3/3677 , G09G3/006 , G09G3/3611 , G09G3/3688 , G09G2310/0248 , G09G2310/0251 , G09G2310/0281 , G09G2310/0283 , G09G2310/0286 , G09G2310/0289 , G09G2310/0297 , G09G2310/08
Abstract: A gate signal line driving circuit includes plural basic circuits, each outputting to a gate signal line a gate signal which is high during a high signal period and low during a low signal period. Each of the basic circuits includes: agate line high voltage application circuit which is turned on in accordance with the high signal period to apply the high voltage to the gate signal line; a gate line low voltage application circuit which is turned on in accordance with the low signal period t apply the low voltage to the gate signal line; and a second gate line low voltage application circuit which is turned on to apply the low voltage to the gate signal line in at least a part of a period between turning off the gate line high voltage application circuit and turning on the gate line low voltage application circuit.
-
公开(公告)号：US09704447B2
公开(公告)日：2017-07-11
申请号：US15227015
申请日：2016-08-03
Applicant: Japan Display Inc.
Inventor： Takayuki Suzuki , Hiroyuki Abe , Masahiro Maki , Mitsuru Goto
IPC: G06F3/044 , G09G3/36 , G06F3/041 , G02F1/133 , G02F1/1333 , G02F1/1335
CPC classification number: G09G3/3655 , G02F1/13306 , G02F1/133345 , G02F1/13338 , G02F1/133512 , G02F1/133528 , G02F1/136286 , G02F2001/133302 , G02F2201/121 , G02F2201/123 , G02F2202/104 , G06F3/0412 , G06F3/0418 , G06F3/044 , G06F2203/04103 , G09G3/36 , G09G2300/0426 , G09G2320/0219 , G09G2320/0626
Abstract: A display device includes pixel electrodes formed in an image display area of a substrate, a common electrode formed in the image display area, inside signal lines formed inside the image display area, and electrically connected to the pixel electrodes, outside signal lines formed outside the image display area, and electrically connected to the inside signal lines, and a common line formed inside and outside the image display area, and electrically connected to the common electrode. An image is displayed under a control of a light using an electric field developed between the pixel electrodes and the common electrode. A coupling capacitance is formed between the inside signal lines and the common electrode. The outside signal lines each include a first portion, and a second portion higher in electric resistance than the first portion and the inside signal lines.
-
公开(公告)号：US09542897B2
公开(公告)日：2017-01-10
申请号：US14805134
申请日：2015-07-21
Applicant: Japan Display Inc.
Inventor： Hiroyuki Abe , Masahiro Maki , Hideo Sato , Hiroaki Komatsu
CPC classification number: G09G3/3677 , G09G3/006 , G09G3/3611 , G09G3/3688 , G09G2310/0248 , G09G2310/0251 , G09G2310/0281 , G09G2310/0283 , G09G2310/0286 , G09G2310/0289 , G09G2310/0297 , G09G2310/08
Abstract: A gate signal line driving circuit includes plural basic circuits, each outputting to a gate signal line a gate signal which is high during a high signal period and low during a low signal period. Each of the basic circuits includes: agate line high voltage application circuit which is turned on in accordance with the high signal period to apply the high voltage to the gate signal line; a gate line low voltage application circuit which is turned on in accordance with the low signal period to apply the low voltage to the gate signal line; and a second gate line low voltage application circuit which is turned on to apply the low voltage to the gate signal line in at least a part of a period between turning off the gate line high voltage application circuit and turning on the gate line low voltage application circuit.
Abstract translation: 栅极信号线驱动电路包括多个基本电路，每个基本电路向门信号线输出在高信号周期期间为高电平的栅极信号，并在低信号周期期间输出低电平。 每个基本电路包括：玛瑙线高压施加电路，根据高信号周期接通，将高电压施加到栅极信号线; 栅极线路低电压施加电路，其根据低信号周期接通，以将低电压施加到栅极信号线; 以及第二栅极线低电压施加电路，其在关闭栅极线高压应用电路和接通栅极线路的低电压应用之间的至少一部分周期中接通以将低电压施加到栅极信号线 电路。
-
公开(公告)号：US20150054804A1
公开(公告)日：2015-02-26
申请号：US14526807
申请日：2014-10-29
Applicant: Japan Display Inc.
Inventor： Takayuki Suzuki , Hiroyuki Abe , Masahiro Maki , Mitsuru Goto
CPC classification number: G09G3/3655 , G02F1/13306 , G02F1/133345 , G02F1/13338 , G02F1/133512 , G02F1/133528 , G02F1/136286 , G02F2001/133302 , G02F2201/121 , G02F2201/123 , G02F2202/104 , G06F3/0412 , G06F3/0418 , G06F3/044 , G06F2203/04103 , G09G3/36 , G09G2300/0426 , G09G2320/0219 , G09G2320/0626
Abstract: A display device includes a substrate having an image display area, pixel electrodes formed in the image display area of the substrate, a common electrode formed in the image display area of the substrate, inside signal lines formed inside the image display area of the substrate and electrically connected to the pixel electrodes, outside signal lines formed outside the image display area of the substrate and electrically connected to the inside signal lines, and a common line formed inside and outside the image display area of the substrate and electrically connected to the common electrode. A coupling capacitance is formed between the inside signal lines and the common electrode. The outside signal lines include a first portion, and a second portion that is higher in electric resistance than an electric resistance of the first portion, and the second portion has a bend.
Abstract translation: 显示装置包括具有图像显示区域的基板，形成在基板的图像显示区域中的像素电极，形成在基板的图像显示区域中的公共电极，形成在基板的图像显示区域内的信号线内部;以及 电连接到像素电极，形成在基板的图像显示区域外部并电连接到内部信号线的外部信号线，以及形成在基板的图像显示区域的内部和外部的公共线，并且电连接到公共电极 。 在内部信号线和公共电极之间形成耦合电容。 外部信号线包括第一部分和电阻高于第一部分的电阻的第二部分，并且第二部分具有弯曲部。
-
公开(公告)号：US12216371B2
公开(公告)日：2025-02-04
申请号：US18302284
申请日：2023-04-18
Applicant: Japan Display Inc.
Inventor： Hiroyuki Abe , Kentaro Agata
IPC: G02F1/1362 , G02F1/1333 , G02F1/1339 , G02F1/1345 , G09G3/36
Abstract: It is possible to reduce a size of a lower frame region to ensure a wiring corrosion margin equivalent to that of a conventional technique. In a display device, a video signal wiring arranged in the lower frame region includes, in a region between a terminal section (terminal) and a video signal line, a first wiring formed on a first wiring layer and having one end connected to the terminal section to which a video signal line driving circuit is connected, a second wiring formed on a second wiring layer different from the first wiring layer and having one end connected to the other end of the first wiring, and a third wiring formed on the first wiring layer and having one end connected to the other end of the second wiring. The other end of the third wiring is connected to the video signal line via a fourth wiring formed on the second wiring layer, and the first wiring layer is formed on the side closer to an array substrate than to the second wiring layer.
-
-
-
-
-
-
-
-
-
Search Results
113
records
(took 0.024 seconds)
