Abstract:
A startup sequence in a computer system is initiated by detecting a bus reset event in an I/O device connected to a host, and responsively to the bus reset event communicating resources required to be allocated by the host. When a startup command from a host driver is not received within a predetermined bus reset count, the device autonomously changes its current configuration to a safe mode configuration, wherein fewer resources are required to be allocated relative to the current configuration. The safe mode configuration is communicated from the device to the host.
Abstract:
A network connection device having a security processor exchanges data traffic between a data network and a host computer via a network port. Security management data is exchanged exclusively between the security processor and a management network via a management network connectivity port that is inaccessible to the data traffic.
Abstract:
Electronic apparatus includes a laminated multi-layer circuit substrate, including first and second rigid cards and a flexible section between the first and second rigid cards. First and second sets of electrical terminals are disposed respectively on the first and second rigid cards and arranged to mate with respective bus connectors configured in accordance with a predefined bus standard. At least one bus interface circuit is configured to communicate over a bus in accordance with the predefined bus standard and disposed on the first rigid card. Printed conductors run continuously from the first rigid card, over the flexible section of the substrate, to the second rigid card and connect the at least one bus interface circuit on the first rigid card to the second set of electrical terminals on the second rigid card.
Abstract:
Peripheral apparatus for use with a host computer includes an add-on device, which includes a first network port coupled to one end of a packet communication link and add-on logic, which is configured to receive and transmit packets containing data over the packet communication link and to perform computational operations on the data. A network interface controller (NIC) includes a host bus interface, configured for connection to the host bus of the host computer and a second network port, coupled to the other end of the packet communication link. Packet processing logic in the NIC is coupled between the host bus interface and the second network port, and is configured to translate between the packets transmitted and received over the packet communication link and transactions executed on the host bus so as to provide access between the add-on device and the resources of the host computer.
Abstract:
A network adapter includes one or more ports and circuitry. The ports are configured to connect to a communication network. The circuitry is coupled to a network node that includes multiple hosts, and is configured to exchange management packets between a control server and a Baseboard Management Controller (BMC) that runs at least first and second BMC instances that are assigned respective different first and second IP addresses or MAC addresses and are associated respectively with first and second hosts, and to exchange, over the communication network via the one or more ports, data packets between the hosts and one or more remote nodes.
Abstract:
A network adapter includes one or more ports and circuitry. The ports are configured to connect to a switch in a communication network. The circuitry is coupled to a network node that includes multiple hosts, and is configured to exchange management packets between a control server and multiple BMC units associated respectively with the multiple hosts, and to exchange, over the communication network via the one or more ports, data packets between the hosts and one or more remote nodes.