公开(公告)号：US20060214694A1

公开(公告)日：2006-09-28

申请号：US11441879

申请日：2006-05-26

申请人： Yoshitoshi Kida ,  Yoshiharu Nakajima ,  Toshikazu Maekawa

发明人： Yoshitoshi Kida ,  Yoshiharu Nakajima ,  Toshikazu Maekawa

IPC分类号： H03K19/00

CPC分类号： G09G3/20 ,  G09G3/3648 ,  G09G5/18 ,  G09G2300/0408 ,  G09G2310/0289 ,  G09G2310/08

摘要： When a buffer is formed by using transistors having large element characteristic variations, the deviation of the timing between the input clock pulse and the reset pulse is likely to occur. When the deviation of the timing becomes larger, a malfunction is caused to occur, and an operation margin becomes smaller with respect to the variations of the element characteristics. In a timing generation circuit, which is formed on an insulating substrate and which has two TFFs (12, 13), for generating a dot clock DCK and a horizontal clock HCK whose frequencies are different in synchronization with a master clock MCK which is input external to the substrate, separate reset pulses drst and hrst are generated at a pulse generation circuit 15 with respect to the two TFFs (12, 13), and a resetting operation is performed at separate timings. Thus, a large operation margin can be ensured even when each circuit is formed by using TFTs having large element characteristic variations and a rough process rule.

公开(公告)号：US06958716B2

公开(公告)日：2005-10-25

申请号：US10485293

申请日：2003-05-28

申请人： Yoshiharu Nakajima ,  Yoshitoshi Kida ,  Hiroaki Ichikawa

发明人： Yoshiharu Nakajima ,  Yoshitoshi Kida ,  Hiroaki Ichikawa

IPC分类号： G02F1/1343 ,  G02F1/133 ,  G02F1/1339 ,  G09G3/20 ,  G09G3/36 ,  H03M9/00

CPC分类号： G09G3/3688 ,  G02F1/13394 ,  G09G2300/0408 ,  G09G2300/0417 ,  G09G2310/027 ,  G09G2310/0281 ,  G09G2310/0289 ,  G09G2310/0294 ,  G09G2330/021

摘要： When a data processing circuit is formed on an insulating substrate by using TFTs, it is difficult to process a data signal having a high data rate, such as digital display data, at a high speed.In a data processing circuit formed on an insulating substrate by using TFTs, a data signal having a small voltage amplitude input in series is increased in level to a data signal having a large voltage amplitude by a level shift circuit (11), the serial data signal having the large voltage amplitude is converted to parallel data signals by a serial-parallel conversion circuit (12), and then, the parallel data signals are reduced in level to data signals having a small voltage amplitude by level shift circuits (13A and 13B). Therefore, high-speed processing can be applied to digital data signals at a low power consumption.

摘要翻译： 当通过使用TFT在绝缘基板上形成数据处理电路时，难以高速处理诸如数字显示数据的数据速率高的数据信号。 在通过使用TFT形成在绝缘基板上的数据处理电路中，串联输入的电压振幅小的数据信号通过电平移位电路（11）增加到电压振幅较大的数据信号，串行数据 具有大电压幅度的信号通过串行 - 并行转换电路（12）被转换为并行数据信号，然后并行数据信号通过电平移位电路（13A和 13 B）。 因此，可以以低功耗将高速处理应用于数字数据信号。

公开(公告)号：US20060017683A1

公开(公告)日：2006-01-26

申请号：US11207211

申请日：2005-08-19

申请人： Masaki Murase ,  Yoshiharu Nakajima

发明人： Masaki Murase ,  Yoshiharu Nakajima

IPC分类号： G09G3/36

CPC分类号： G09G3/3648 ,  G09G2310/0232 ,  G09G2310/0289 ,  G09G2310/0297 ,  G09G2330/021

摘要： A selection-addressing-type liquid crystal display selectively addresses a signal line of a pixel unit using groups of three selectors of a selector circuit in a time-division manner. A level converter level shifts selector pulses having a voltage swing corresponding to the external-circuit power supply to selector pulses having a voltage swing corresponding to the internal-circuit power supply. In a non-display region in partial display mode, the level converter is deactivated under the control of a control signal to reduce direct current consumption therein.

摘要翻译： 选择寻址型液晶显示器以时分方式使用选择器电路的三个选择器的组来选择性地寻址像素单元的信号线。 电平转换器电平将具有与外部电路电源相对应的电压摆幅的选择器脉冲移位到具有与内部电路电源相对应的电压摆幅的选择器脉冲。 在部分显示模式的非显示区域中，电平转换器在控制信号的控制下被去激活，以减少其中的直流消耗。

公开(公告)号：US06958745B2

公开(公告)日：2005-10-25

申请号：US10427804

申请日：2003-04-30

申请人： Masaki Murase ,  Yoshiharu Nakajima

发明人： Masaki Murase ,  Yoshiharu Nakajima

IPC分类号： G02F1/1345 ,  G02F1/133 ,  G02F1/1368 ,  G09G3/20 ,  G09G3/30 ,  G09G3/36

CPC分类号： G09G3/3648 ,  G09G2310/0232 ,  G09G2310/0289 ,  G09G2310/0297 ,  G09G2330/021

摘要： A selection-addressing-type liquid crystal display selectively addresses a signal line of a pixel unit using groups of three selectors of a selector circuit in a time-division manner. A level converter level shifts selector pulses having a voltage swing corresponding to the external-circuit power supply to selector pulses having a voltage swing corresponding to the internal-circuit power supply. In a non-display region in partial display mode, the level converter is deactivated under the control of a control signal to reduce direct current consumption therein.

摘要翻译： 选择寻址型液晶显示器以时分方式使用选择器电路的三个选择器的组来选择性地寻址像素单元的信号线。 电平转换器电平将具有与外部电路电源相对应的电压摆幅的选择器脉冲移位到具有与内部电路电源相对应的电压摆幅的选择器脉冲。 在部分显示模式的非显示区域中，电平转换器在控制信号的控制下被去激活，以减少其中的直流消耗。

公开(公告)号：US07372446B2

公开(公告)日：2008-05-13

申请号：US11207211

申请日：2005-08-19

申请人： Masaki Murase ,  Yoshiharu Nakajima

发明人： Masaki Murase ,  Yoshiharu Nakajima

IPC分类号： G09G3/36

CPC分类号： G09G3/3648 ,  G09G2310/0232 ,  G09G2310/0289 ,  G09G2310/0297 ,  G09G2330/021

摘要： A selection-addressing-type liquid crystal display selectively addresses a signal line of a pixel unit using groups of three selectors of a selector circuit in a time-division manner. A level converter level shifts selector pulses having a voltage swing corresponding to the external-circuit power supply to selector pulses having a voltage swing corresponding to the internal-circuit power supply. In a non-display region in partial display mode, the level converter is deactivated under the control of a control signal to reduce direct current consumption therein.

摘要翻译： 选择寻址型液晶显示器以时分方式使用选择器电路的三个选择器的组来选择性地寻址像素单元的信号线。 电平转换器电平将具有与外部电路电源相对应的电压摆幅的选择器脉冲移位到具有与内部电路电源相对应的电压摆幅的选择器脉冲。 在部分显示模式的非显示区域中，电平转换器在控制信号的控制下被去激活，以减少其中的直流消耗。

公开(公告)号：US08159438B2

公开(公告)日：2012-04-17

申请号：US10482259

申请日：2003-04-28

申请人： Yoshiharu Nakajima ,  Masaki Murase

发明人： Yoshiharu Nakajima ,  Masaki Murase

IPC分类号： G09G3/36

CPC分类号： G09G3/2011 ,  G09G3/3614 ,  G09G3/3648 ,  G09G3/3688 ,  G09G2310/0251 ,  G09G2330/021

摘要： Liquid crystal display devices to suffer from low contrast at low temperatures because the frequency characteristics of the liquid crystal dielectric constant are degraded. An active matrix liquid crystal display device performs pre-charging in which a pre-charge signal Psig is written with a pre-charge switch before display signals are written to data lines of a display area with a dated driver. The pre-charge signal Psig is the gray-scale level as obtained when no voltage is applied to liquid crystal, such as a common voltage VCOM, thus increasing the contrast at low temperature.

摘要翻译： 由于液晶介电常数的频率特性降低，在低温下遭受低对比度的液晶显示装置。 有源矩阵液晶显示装置执行预充电，其中在用已注明日期的驱动器将显示信号写入显示区域的数据线之前，预充电信号Psig被写入预充电开关。 预充电信号Psig是当没有电压施加到诸如公共电压VCOM的电压时获得的灰度级，因此在低温下增加对比度。

公开(公告)号：US08654088B2

公开(公告)日：2014-02-18

申请号：US12632306

申请日：2009-12-07

申请人： Yuko Yamauchi ,  Hiroshi Mizuhashi ,  Yoshiharu Nakajima ,  Tsutomu Tanaka ,  Shuji Hayashi ,  Takeo Koito

发明人： Yuko Yamauchi ,  Hiroshi Mizuhashi ,  Yoshiharu Nakajima ,  Tsutomu Tanaka ,  Shuji Hayashi ,  Takeo Koito

IPC分类号： G06F3/041

CPC分类号： G06F3/045 ,  G06F3/0412

摘要： A display includes: a display section having a plurality of pixels provided in a region where a first substrate and a second substrate are disposed opposite to each other; a switch provided in the region where the first substrate and the second substrate are disposed opposite to each other, the switch having two electrodes closed by a pressure from outside; a detecting section comparing a signal from the switch with a reference signal to determine whether the switch is closed or not; and a precharge section applying a precharge potential to a wiring in continuity with one of the electrodes of the switch prior to the detection at the detecting section.

摘要翻译： 显示器包括：具有设置在第一基板和第二基板彼此相对布置的区域中的多个像素的显示部分; 设置在所述第一基板和所述第二基板彼此相对设置的区域中的开关，所述开关具有由外部的压力封闭的两个电极; 检测部分将来自开关的信号与参考信号进行比较，以确定开关是否闭合; 以及预充电部，其在检测部分的检测之前，将与所述开关的一个电极连续的布线预充电电位。

公开(公告)号：US20120162161A1

公开(公告)日：2012-06-28

申请号：US13417991

申请日：2012-03-12

申请人： Masumitsu Ino ,  Hiroyoshi Tsubota ,  Hiroaki Ichikawa ,  Shinichi Teraguchi ,  Taketo Oka ,  Toru Akutagawa ,  Toshikazu Maekawa ,  Yoshiharu Nakajima ,  Naoshi Goto

发明人： Masumitsu Ino ,  Hiroyoshi Tsubota ,  Hiroaki Ichikawa ,  Shinichi Teraguchi ,  Taketo Oka ,  Toru Akutagawa ,  Toshikazu Maekawa ,  Yoshiharu Nakajima ,  Naoshi Goto

IPC分类号： G09G3/36 ,  G06F3/038

CPC分类号： G09G3/3688 ,  G09G2310/0297 ,  G09G2310/08 ,  G09G2320/0209 ,  G09G2320/0219 ,  G09G2330/021

摘要： A liquid crystal display having: a liquid crystal display panel in which a plurality of pixels are two-dimensionally arranged at intersecting points of gate lines as many as a plurality of rows and signal lines as many as a plurality of columns which are wired in a matrix shape; and a plurality of driver ICs for applying a signal potential to each pixel of the liquid crystal display panel through the signal lines of a plurality of columns, wherein the number of output pins of each of a plurality of driver ICs is set to the measure of the total number of signal lines of a plurality of columns, thereby preventing that a fraction occurs in the signal lines.

摘要翻译： 一种液晶显示器，具有：液晶显示面板，其中多个像素被二维布置在多条行的栅极线的交点处，多条像多条列的信号线布线在 矩阵形状 以及多个驱动器IC，用于通过多个列的信号线向液晶显示面板的每个像素施加信号电位，其中多个驱动器IC中的每一个的输出引脚的数量被设置为 多个列的信号线的总数，从而防止在信号线中发生分数。

公开(公告)号：US08031188B2

公开(公告)日：2011-10-04

申请号：US12081269

申请日：2008-04-14

申请人： Yoshiharu Nakajima ,  Toshikazu Maekawa

发明人： Yoshiharu Nakajima ,  Toshikazu Maekawa

IPC分类号： G09G5/00

CPC分类号： G09G3/2011 ,  G09G3/3688 ,  G09G2300/0408 ,  G09G2310/027 ,  G09G2310/0281 ,  G09G2310/0286 ,  G09G2310/0289 ,  G09G2310/0294 ,  G09G2310/06 ,  G09G2330/021 ,  G11C19/00 ,  G11C19/28 ,  G11C27/02 ,  H03K3/35613 ,  H03K19/018521 ,  H03M1/76

摘要： A digital/analog converter circuit, a level shift circuit, a shift register containing this level shift circuit, a sampling latch circuit and a latch circuit as well as a liquid crystal display device mounted with these respective circuits, wherein a drive circuit integrated with the LCD device containing the digital/analog converter circuit has polysilicon thin film transistors arrayed in a matrix on the substrate as switching devices for the pixels. A level shift circuit in the shift register has a basic structure of CMOS latch cells and is utilized in each level shift of the clock signal at each transfer stage, a sampling latch circuit with a basic structure of CMOS latch cells has a level shift function, and these respective circuits may be incorporated into a single scanning type structural circuit with the drive circuit-integrated liquid crystal display device to provide an LCD panel with an extremely narrow picture frame, stable level shift operation, stable sampling & latch operation in a circuit structure having an extremely small number of components, low power consumption and a small surface area.

摘要翻译： 数字/模拟转换器电路，电平移位电路，包含该电平移位电路的移位寄存器，采样锁存电路和锁存电路以及安装有这些各自电路的液晶显示装置，其中与 包含数字/模拟转换器电路的LCD装置具有在基板上以矩阵形式排列的多晶硅薄膜晶体管作为用于像素的开关器件。 移位寄存器中的电平移位电路具有CMOS锁存单元的基本结构，并且在每个传输级的时钟信号的每个电平移位中被使用，具有CMOS锁存单元的基本结构的采样锁存电路具有电平移位功能， 并且这些各个电路可以与驱动电路集成液晶显示装置结合到单个扫描型结构电路中，以提供具有极窄图像帧的LCD面板，稳定的电平移位操作，电路结构中的稳定采样和锁存操作 具有极少数量的部件，低功耗和小的表面积。

公开(公告)号：US20110109605A1

公开(公告)日：2011-05-12

申请号：US12917915

申请日：2010-11-02

申请人： Hideyuki Omori ,  Go Yamanaka ,  Michiru Senda ,  Yoshiharu Nakajima

发明人： Hideyuki Omori ,  Go Yamanaka ,  Michiru Senda ,  Yoshiharu Nakajima

IPC分类号： G09G5/00 ,  G09G3/36

CPC分类号： G09G3/3648 ,  G06F3/042

摘要： A display device with an image pickup function includes: a plurality of pixel signal lines each supplied with a pixel signal; a plurality of display pixels each performing a display operation based on the pixel signal; and a plurality of image pickup elements each including a photo-detector and a capacitor, the photo-detector generating a current of a magnitude corresponding to a photo-detection amount, the capacitor performing a discharging operation which follows a charging operation with the current from the photo-detector to output a charged voltage for a read operation. In the display device, a voltage level of the pixel signal line during the discharging operation is equal to a voltage level of the pixel signal line during the reading operation.

摘要翻译： 具有图像拾取功能的显示装置包括：多个像素信号线，各自提供像素信号; 多个显示像素，其基于所述像素信号执行显示操作; 以及多个图像拾取元件，每个图像拾取元件包括光电检测器和电容器，所述光电检测器产生与光检测量对应的幅度的电流，所述电容器执行跟随充电操作的放电操作， 光电检测器输出用于读取操作的充电电压。 在显示装置中，放电操作期间的像素信号线的电压电平等于读取操作期间像素信号线的电压电平。