公开(公告)号：US07400320B2

公开(公告)日：2008-07-15

申请号：US10734300

申请日：2003-12-15

申请人： Yoshiharu Nakajima ,  Toshikazu Maekawa

发明人： Yoshiharu Nakajima ,  Toshikazu Maekawa

IPC分类号： G09G5/00

CPC分类号： G09G3/2011 ,  G09G3/3688 ,  G09G2300/0408 ,  G09G2310/027 ,  G09G2310/0281 ,  G09G2310/0286 ,  G09G2310/0289 ,  G09G2310/0294 ,  G09G2310/06 ,  G09G2330/021 ,  G11C19/00 ,  G11C19/28 ,  G11C27/02 ,  H03K3/35613 ,  H03K19/018521 ,  H03M1/76

摘要： This invention relates to a digital/analog converter circuit, a level shift circuit, a shift-register containing this level shift circuit, a sampling latch circuit and a latch circuit as well as a liquid crystal display (LCD) device. The LCD device includes an integrated drive circuit integrated and a digital/analog converter circuit. The digital/analog converter circuit has a matrix of polysilicon thin film transistors positioned on the substrate, as switching devices for the pixels. The shift register includes a level shift circuit and a sampling latch circuit These circuits may be incorporated into a single scanning type structural circuit with the drive circuit-integrated LCD device to provide an LCD panel with a narrow picture frame, stable level shift operation, stable sampling & latch operation in a circuit having an extremely small number of components, low power consumption and a small surface area.

摘要翻译： 本发明涉及数字/模拟转换器电路，电平移位电路，包含该电平移位电路的移位寄存器，采样锁存电路和锁存电路以及液晶显示器（LCD）装置。 LCD装置包括集成的驱动电路和数字/模拟转换器电路。 数字/模拟转换器电路具有位于衬底上的多晶硅薄膜晶体管的矩阵，作为用于像素的开关器件。 移位寄存器包括电平移位电路和采样锁存电路这些电路可以与驱动电路集成的LCD器件并入单个扫描型结构电路，以提供具有窄画面的LCD面板，稳定的电平移位操作，稳定的 具有极小数量的部件，低功耗和小的表面积的电路中的采样和锁存操作。

公开(公告)号：US07250941B2

公开(公告)日：2007-07-31

申请号：US10484994

申请日：2003-05-06

申请人： Yoshitoshi Kida ,  Yoshiharu Nakajima ,  Toshikazu Maekawa

发明人： Yoshitoshi Kida ,  Yoshiharu Nakajima ,  Toshikazu Maekawa

IPC分类号： G09G5/00

CPC分类号： G06F1/3203 ,  G06F1/324 ,  G09G3/3648 ,  G09G3/3677 ,  G09G3/3688 ,  G09G2300/0408 ,  G09G2300/08 ,  G09G2310/0267 ,  G09G2310/027 ,  G09G2330/021 ,  Y02D10/126

摘要： A timing generating circuit with low power consumption and a small layout area, a display apparatus including the timing generating circuit as one peripheral driving circuit, and a portable terminal including the display apparatus as a display output section are provided. In the timing generating circuit, which is formed on an insulating substrate and generates output pulses SRFF1out to SRFFnout having different frequencies based on a master clock MCK, a clock generating circuit (11) generates an operating clock having a lower frequency than the master clock MCK frequency. Then, a counter section (12) operates based on this operating clock and successively outputs shifted pulses S/R1out to S/Rmount from shift registers (121-1) to (121-m). An output pulse generating section (13) generates output pulses SF1out to SFnout based on combinations of the shifted pulses S/R1out to S/Rmount.

摘要翻译： 具有低功耗和小布局区域的定时发生电路，包括作为一个外围驱动电路的定时发生电路的显示装置和包括作为显示输出部分的显示装置的便携式终端。 在定时发生电路中，形成在绝缘衬底上并基于主时钟MCK产生具有不同频率的输出脉冲SRFF1至SRFFnout，时钟发生电路（11）产生频率低于主器件的工作时钟 时钟MCK频率。 然后，基于该工作时钟，计数部（12）进行动作，从移位寄存器（121-1）〜（121-m）依次输出移位脉冲S / R 1〜S / Rmount。 输出脉冲生成部（13）根据移位脉冲S / R 1 out〜S / R mount的组合，生成输出脉冲SF1〜SFnout。

公开(公告)号：US07209132B2

公开(公告)日：2007-04-24

申请号：US10485280

申请日：2003-05-30

申请人： Yoshitoshi Kida ,  Yoshiharu Nakajima ,  Toshikazu Maekawa

发明人： Yoshitoshi Kida ,  Yoshiharu Nakajima ,  Toshikazu Maekawa

IPC分类号： G09G5/00

CPC分类号： G09G3/3648 ,  G09G3/3655 ,  G09G3/3688 ,  G09G2300/0876 ,  G09G2310/0245 ,  G09G2310/027 ,  G09G2310/06 ,  G09G2310/063 ,  G09G2320/0204 ,  G09G2320/0219 ,  G09G2320/0257 ,  G09G2330/026 ,  G09G2330/027

摘要： A liquid crystal display device enabling a reduction in size and costs associated with the system as a whole, starting to display images without image distortion at power on time, and turning the screen off without image retention at power off time, a method of controlling the liquid crystal display device, and a mobile terminal incorporating the liquid crystal display device as a screen display. On a glass substrate (11) provided with a display unit (12), peripheral drive circuits such as an interface circuit (13), a timing generator (14), a reference voltage driver (15), a CS driver (18), a VCOM driver (19), and a voltage regulation circuit (20), together with a horizontal driver (16) and a vertical driver (17) are disposed. When a display reset control pulse PCI is supplied from an external source, a predetermined voltage is written into pixels while a CS voltage and a VCOM voltage adjusted to the same level as that of a pixel voltage are applied to a common-electrode-side. This allows the screen to turn white in a normally white type liquid crystal display, and to turn black in a normally black type liquid crystal display. Image distortion at power on/off time can thus be prevented.

公开(公告)号：US5764207A

公开(公告)日：1998-06-09

申请号：US423862

申请日：1995-04-18

申请人： Toshikazu Maekawa ,  Katsuhide Uchino

发明人： Toshikazu Maekawa ,  Katsuhide Uchino

IPC分类号： G02F1/133 ,  G09G3/20 ,  G09G3/36

CPC分类号： G09G3/3688 ,  G09G3/3648 ,  G09G2310/0248 ,  G09G2320/0209 ,  G09G3/2011

摘要： To restrict a potential oscillation in a video line caused by a high speed sampling rate, the active matrix display device is comprised of gate lines X in row, signal lines Y in column and liquid crystal pixels LC of matrix arranged at each of the crossing points of both lines. The V driver 1 scans in sequence each of the gate lines X and selects the liquid crystal pixels LC in one line for every one horizontal period. The H driver 4 performs a sampling of the video signal VSIG for each of the signal lines Y and performs a writing of the video signal VSIG in the liquid crystal pixels LC in one selected line within one horizontal period. The precharging means 5 supplies the predetermined precharging signal VPS to each of the signal lines Y just before writing the video signal VSIG for the liquid crystal pixels LC in one line. With such an arrangement as above, it is possible to reduce the charging or discharging amount in each of the signal lines Y when the video signal VSIG is sampled and further to restrict the potential oscillation in the video line 2.

摘要翻译： 为了限制由高速采样率引起的视频线中的潜在振荡，有源矩阵显示装置由行中的栅极线X，列中的信号线Y和布置在每个交叉点处的矩阵的液晶像素LC 的两条线。 V驱动器1依次扫描每条栅极线X，并且在每一个水平周期中一行地选择液晶像素LC。 H驱动器4对每个信号线Y执行视频信号VSIG的采样，并且在一个水平周期内在一个选定行中执行在液晶像素LC中的视频信号VSIG的写入。 在将液晶像素LC的视频信号VSIG写入一行之前，预充电装置5将预定的预充电信号VPS提供给每个信号线Y. 通过上述这样的配置，当视频信号VSIG被采样时，可以减少每条信号线Y中的充电或放电量，并且进一步限制视频线2中的电位振荡。

公开(公告)号：US5625376A

公开(公告)日：1997-04-29

申请号：US267608

申请日：1994-06-29

申请人： Toshikazu Maekawa

发明人： Toshikazu Maekawa

IPC分类号： G09G3/20 ,  G09G3/36 ,  G11C19/00 ,  H04N3/12 ,  H04N5/44 ,  H04N5/70 ,  G09G5/00

CPC分类号： H04N3/127 ,  G09G3/3688 ,  G09G2310/0232 ,  G09G2340/0442 ,  G09G2340/0478 ,  G09G2360/02 ,  G09G3/2011 ,  H04N5/70 ,  H04N7/0122

摘要： An active matrix display device is disclosed which realizes changing over between a wide display and a normal display with a simple construction. The active matrix display device includes picture elements disposed in rows and columns on a horizontally elongated screen. A gate line is connected to each picture element row, while a data line is connected to each picture element column. A signal line for supplying a video signal and data lines are connected by way of sampling switches. A horizontal shift register controls sequential opening and closing operations of the sampling switches. The picture element columns of the horizontally elongated screen are divided into a predetermined area allocated to a normal display and a pair of expansion areas included in a wide display. The horizontal shift register is divided into a predetermined stage section corresponding to the predetermined area and expansion stage sections corresponding to the expansion areas. For a wide display, the predetermined and expansion stage sections of the horizontal shift register are interconnected serially into an integrated condition, but upon normal display, the expansion stage sections are disconnected from the predetermined stage section.

摘要翻译： 公开了一种有源矩阵显示装置，其以简单的结构实现了宽显示和正常显示之间的切换。 有源矩阵显示装置包括在水平细长的屏幕上以行和列布置的图像元素。 栅极线连接到每个像素行，而数据线连接到每个像素列。 用于提供视频信号和数据线的信号线通过采样开关连接。 水平移位寄存器控制采样开关的顺序打开和关闭操作。 水平细长屏幕的像素列被划分为分配给正常显示的预定区域和包括在宽显示屏中的一对展开区域。 水平移位寄存器被分成对应于预定区域的预定段段和对应于扩展区域的扩展级段。 对于宽显示，水平移位寄存器的预定和扩展级部分串联地互连成一个整合状态，但是在正常显示时，扩展级段与预定级段断开连接。

公开(公告)号：US5377030A

公开(公告)日：1994-12-27

申请号：US37644

申请日：1993-03-26

申请人： Yoshio Suzuki ,  Haruhiko Kaneko ,  Hiroyuki Yoshine ,  Yuji Hayashi ,  Toshikazu Maekawa

发明人： Yoshio Suzuki ,  Haruhiko Kaneko ,  Hiroyuki Yoshine ,  Yuji Hayashi ,  Toshikazu Maekawa

IPC分类号： G02F1/13 ,  G02F1/1362 ,  G09G3/00 ,  G02F1/1335 ,  G01R31/02 ,  G02F1/1343

CPC分类号： G09G3/006 ,  G02F1/1309 ,  G02F1/136213

摘要： A method for manufacturing an active matrix array substrate having a plurality of pixel drive cells, each pixel drive cell includes a pixel switching element and a capacitor element connected to the pixel switching element in series. The method comprising the inspection steps of storing a charge in the capacitor element and detecting the charge stored in the capacitor element by measuring the voltage and comparing the voltage measured with a reference voltage obtained with a good pixel.

摘要翻译： 一种用于制造具有多个像素驱动单元的有源矩阵阵列基板的方法，每个像素驱动单元包括像素开关元件和连接到像素开关元件的电容器元件。 该方法包括将电荷存储在电容器元件中的检测步骤，并通过测量电压和比较用优良像素获得的参考电压测量的电压来检测电容器元件中的电荷。

公开(公告)号：US20100128004A1

公开(公告)日：2010-05-27

申请号：US12451485

申请日：2009-03-18

申请人： Tsutomu Harada ,  Yoshiharu Nakajima ,  Michiru Senda ,  Kazunori Yamaguchi ,  Mitsuru Tateuchi ,  Ryoichi Tsuzaki ,  Toshikazu Maekawa

发明人： Tsutomu Harada ,  Yoshiharu Nakajima ,  Michiru Senda ,  Kazunori Yamaguchi ,  Mitsuru Tateuchi ,  Ryoichi Tsuzaki ,  Toshikazu Maekawa

IPC分类号： G06F3/042 ,  H04N5/335

CPC分类号： G06F3/0421 ,  G06F3/0412 ,  G06F3/0416 ,  G06F3/042 ,  G06F3/04883 ,  G06F2203/04101 ,  G09G3/3406 ,  G09G2354/00 ,  G09G2360/142 ,  H04N5/378

摘要： An image pickup device capable of stably detecting an object irrespective of use conditions while reducing manufacturing costs is provided. When illumination light from a backlight 15 is emitted to a proximity object from an I/O display panel 20, an electric charge for charging is accumulated in each of image pickup pixels 33 in accordance with total light amount as a summation of reflected light Lon originating from the illumination light and environment light (outside light) L0. Moreover, when the above-described illumination light is not emitted, an electric charge for discharging is released from each of the image pickup pixels 33 in accordance with light amount of the environment light L0. Thereby, a component by the environment light L0 is subtracted in an image pickup signal obtained from each of the image pickup pixels 33, so object information about the proximity object is obtainable without influence of the environment light L0. Moreover, in a light reception drive circuit 13, a smaller number of necessary frame memories 13A for producing a picked-up image from the image pickup signal than that in related art are necessary.

摘要翻译： 提供能够在不影响使用条件的同时稳定地检测物体的同时降低制造成本的图像拾取装置。 当来自背光源15的照明光从I / O显示面板20发射到接近物体时，根据总光量将每个摄像像素33累积充电用电荷作为起始的反射光Lon的总和 从照明光和环境光（外部光）L0。 此外，当不发射上述照明光时，根据环境光L0的光量，从每个摄像像素33释放用于放电的电荷。 由此，在从每个摄像像素33获得的图像拾取信号中减去环境光L0的分量，因此可以在不影响环境光L0的情况下获得关于接近对象的对象信息。 此外，在光接收驱动电路13中，需要从图像拾取信号产生拾取图像的必要帧存储器13A的数量少于现有技术。

公开(公告)号：US20080136810A1

公开(公告)日：2008-06-12

申请号：US10568538

申请日：2004-08-20

申请人： Naoyuki Itakura ,  Hiroaki Ichikawa ,  Toshikazu Maekawa

发明人： Naoyuki Itakura ,  Hiroaki Ichikawa ,  Toshikazu Maekawa

IPC分类号： G06F3/038

CPC分类号： G09G3/2011 ,  G09G3/2074 ,  G09G3/3607 ,  G09G3/3648 ,  G09G3/3677 ,  G09G3/3688 ,  G09G2310/0251 ,  G09G2310/0297 ,  G09G2320/0223

摘要： In the present invention, during a 1H period excluding a blanking period (1HB) constituting a line display period, pixel data pulses of RGB (61B to 61R) are successively supplied for each color to corresponding signal lines for color display of one pixel line. A control circuit (40) of select switches connected to the signal lines (6-1 to 6-n) supplies permission pulses (63B to 63R) for supply of data to signal lines when displaying one color among RGB to select switches (TMG), and turns on the select switch (TMG) of the signal line corresponding to another color to be displayed later in the same line display period during the period of this application by a precharge pulse (62G or 62R) having a time duration shorter than the supply time of the pixel data of the other color (T2 or T3) to previously precharge the signal line of the other color to the predetermined potential. Due to this, sufficient precharging of a signal line which became difficult due to an increase of a load capacitance of the signal line due to higher definition of the image display device and increase in speed of a drive clock thereof can be achieved.

摘要翻译： 在本发明中，除了构成行显示期间的消隐期间（1HB）以外的1HH期间内，依次向每个颜色的RGB（61B〜61R）的像素数据脉冲供给相应的信号线， 一个像素线。 连接到信号线（6-1至6-n）的选择开关的控制电路（40）提供允许脉冲（63B至63R），用于在RGB之间显示一种颜色以选择开关时向信号线提供数据 TMG），并且在该应用期间，在具有时间的预充电脉冲（62G或62R）的同一行显示周期中，打开与其他颜色对应的信号线的选择开关（TMG） 持续时间短于其他颜色（T 2或T 3）的像素数据的供给时间，以预先将另一种颜色的信号线预充电到预定电位。 由此，可以实现由于图像显示装置的高清晰度和驱动时钟的速度的增加而导致由于信号线的负载电容的增加而变得困难的信号线的充分的预充电。

公开(公告)号：US07368945B2

公开(公告)日：2008-05-06

申请号：US11441879

申请日：2006-05-26

申请人： Yoshitoshi Kida ,  Yoshiharu Nakajima ,  Toshikazu Maekawa

发明人： Yoshitoshi Kida ,  Yoshiharu Nakajima ,  Toshikazu Maekawa

IPC分类号： H03K19/173 ,  H03K3/037

CPC分类号： G09G3/20 ,  G09G3/3648 ,  G09G5/18 ,  G09G2300/0408 ,  G09G2310/0289 ,  G09G2310/08

摘要： When a buffer is formed by using transistors having large element characteristic variations, the deviation of the timing between the input clock pulse and the reset pulse is likely to occur. When the deviation of the timing becomes larger, a malfunction is caused to occur, and an operation margin becomes smaller with respect to the variations of the element characteristics. In a timing generation circuit, which is formed on an insulating substrate and which has two TFFs (12, 13), for generating a dot clock DCK and a horizontal clock HCK whose frequencies are different in synchronization with a master clock MCK which is input external to the substrate, separate reset pulses drst and hrst are generated at a pulse generation circuit 15 with respect to the two TFFs (12, 13), and a resetting operation is performed at separate timings. Thus, a large operation margin can be ensured even when each circuit is formed by using TFTs having large element characteristic variations and a rough process rule.

摘要翻译： 当通过使用具有大的元件特性变化的晶体管形成缓冲器时，可能会发生输入时钟脉冲与复位脉冲之间的定时偏差。 当定时的偏差变大时，会发生故障，相对于元件特性的变化，操作余量变小。 在形成在绝缘基板上并具有两个TFF（12,13）的定时产生电路中，用于产生点时钟DCK和频率与输入外部的主时钟MCK同步的频率不同的水平时钟HCK 在相对于两个TFF（12,13）的脉冲发生电路15处产生分离的复位脉冲drst和hrst，并且在单独的定时执行复位操作。 因此，即使当通过使用具有大的元件特性变化的TFT和粗略的处理规则形成每个电路时，也可以确保大的操作余量。

公开(公告)号：US07126574B2

公开(公告)日：2006-10-24

申请号：US10292882

申请日：2002-11-13

申请人： Katsuhide Uchino ,  Kazuhiro Noda ,  Toshikazu Maekawa ,  Hideyuki Kitagawa

发明人： Katsuhide Uchino ,  Kazuhiro Noda ,  Toshikazu Maekawa ,  Hideyuki Kitagawa

IPC分类号： G09G3/36

CPC分类号： G09G3/3614 ,  G09G3/3648 ,  G09G3/3688 ,  G09G2300/0426 ,  G09G2300/0439 ,  G09G2310/0248 ,  G09G2310/0297 ,  G09G2320/02 ,  G09G2320/0209 ,  G09G2320/0223

摘要： In the case of an active matrix type TFT liquid crystal display apparatus of a dot successive driving system, between respectives of signal lines sig1A through sig4A wired at respective columns, and respectives of a signal line 18-1A for inputting a precharge signal Psig-black at a black level and a precharge signal line 18-2A for inputting a precharge signal Psig-gray at a gray level, sampling switches Pb1A through Pb4A and Pg1A through Pg4A of two routes are connected, to respectives of the signals lines sig1A through sig4A, firstly, the precharge signal Psig-black, successively, the precharge signal Psig-gray at the gray level are written in this order and thereafter, an image signal video is written thereto.

摘要翻译： 在点连续驱动系统的有源矩阵型TFT液晶显示装置的情况下，在各列配线的信号线s1A至sig4A的方位之间，以及用于输入 用于输入灰度级的预充电信号Psig-grey的黑电平的预充电信号Psig-black和用于输入灰阶的预充电信号的预充电信号线18-2A，采样开关Pb1A至Pb4A和Pg1A至Pg4A的两个 路由连接到信号线s1A到sig4A的方面，首先，预先充电信号Psig-black依次写入灰阶级的预充电信号Psig-gray，此后，图像信号 写入视频。