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    Lighting block using solar cells
    51.
    发明授权
    Lighting block using solar cells 有权
    照明块使用太阳能电池

    公开(公告)号：US07226182B2

    公开(公告)日：2007-06-05

    申请号：US10916580

    申请日：2004-08-10

    申请人： Dae-Won Kim

    发明人： Dae-Won Kim

    IPC分类号： F21L4/00

    CPC分类号： F21S9/037 ,  E04F2290/026 ,  F21V33/006

    摘要： A lighting block using solar cells. A case covers an outer surface of the lighting block and includes a light transmission section, light being emitted and received through the light transmission section. A light emitting assembly is mounted within the case next to an inner surface of the light transmission. The light emitting assembly allows the transmission of sunlight therethrough. A solar cell assembly is mounted within the case next to the light emitting assembly. The solar cell assembly receives sunlight passing through the light transmission section and the light emitting assembly, and generates electric power. A capacitor is installed within the case and stores the electric power generated by the solar cell assembly. A controller installed within the case controls the supply of the stored electric power to the light emitting assembly.

    摘要翻译： 使用太阳能电池的照明块。 壳体覆盖照明块的外表面，并且包括光透射部分，通过光透射部分发射和接收光。 发光组件安装在光传输的内表面旁边的壳体内。 发光组件允许透射太阳光。 太阳能电池组件安装在发光组件旁边的壳体内。 太阳能电池组件接收通过透光部和发光组件的太阳光，并产生电力。 电容器安装在外壳内并存储由太阳能电池组件产生的电力。 安装在壳体内的控制器控制向发光组件供应的电力。

    SEMICONDUCTOR DEVICES HAVING MULTI-WIDTH ISOLATION LAYER STRUCTURES
    56.
    发明申请
    SEMICONDUCTOR DEVICES HAVING MULTI-WIDTH ISOLATION LAYER STRUCTURES 有权
    具有多宽隔离层结构的半导体器件

    公开(公告)号：US20130126814A1

    公开(公告)日：2013-05-23

    申请号：US13544484

    申请日：2012-07-09

    申请人： Dae-Won Kim ,  Yong-Kwan Kim

    发明人： Dae-Won Kim ,  Yong-Kwan Kim

    IPC分类号： H01L45/00

    CPC分类号： H01L45/06 ,  H01L27/2409 ,  H01L45/141 ,  H01L45/1625

    摘要： According to example embodiments, there is provided a semiconductor device including a substrate and an isolation layer structure. The substrate includes an active region having an upper active pattern and a lower active pattern on the upper active pattern. The active region has a first aspect ratio larger than about 13:1 and a second aspect ratio smaller than about 13:1. The first aspect ratio is defined as a ratio of a sum of heights of the upper active pattern and the lower active pattern with respect to a width of the upper active pattern. The second aspect ratio is defined as a ratio of the sum of the heights of the upper active pattern and the lower active pattern with respect to a width of the lower active pattern. The isolation layer structure is adjacent to the active region.

    摘要翻译： 根据示例性实施例，提供了一种包括衬底和隔离层结构的半导体器件。 衬底包括在上活性图案上具有上活性图案和下活性图案的有源区。 有源区具有大于约13:1的第一长宽比和小于约13:1的第二纵横比。 第一宽高比被定义为上活性图案和下活性图案的高度之和相对于上活性图案的宽度的比率。 第二纵横比被定义为上活动图案和下活动图案的高度之和相对于下活动图案的宽度的比率。 隔离层结构与有源区相邻。

    Method for fabricating an electrophoretic display having simplified process
    57.
    发明授权
    Method for fabricating an electrophoretic display having simplified process 有权
    一种具有简化工艺的电泳显示器的制造方法

    公开(公告)号：US08377735B2

    公开(公告)日：2013-02-19

    申请号：US12618405

    申请日：2009-11-13

    申请人： Min-Joo Kim ,  Ho-Cheol Kang ,  Dae-Won Kim ,  Young-Hoon Noh ,  Han-Saem Kang

    发明人： Min-Joo Kim ,  Ho-Cheol Kang ,  Dae-Won Kim ,  Young-Hoon Noh ,  Han-Saem Kang

    IPC分类号： H01L21/00

    CPC分类号： G09G3/344 ,  G02F1/136227 ,  G02F1/167 ,  G02F2001/136231 ,  G02F2001/13685 ,  H01L27/3274 ,  H01L29/66757

    摘要： An electrophoretic display device includes: a first substrate having a plurality of pixels formed in a plurality of vertical pixel rows and a plurality of horizontal pixel rows; a plurality of data lines formed at every vertical pixel row of the first substrate; a thin film transistor (TFT) formed at each pixel of the first substrate and including a source electrode, a drain electrode, an organic semiconductor layer, and a gate electrode; a passivation layer formed on the TFTs and the data lines of the first substrate and including a first contact hole exposing the drain electrode of the TFT and a second contact hole exposing the gate electrode of the TFT; a pixel electrode formed on the passivation layer at each pixel of the first substrate and connected with the drain electrode of the TFT via the first contact hole of the passivation layer; a plurality of gate lines formed on the passivation layer at every horizontal pixel row of the first substrate and connected with the gate electrode of the TFT via the second contact hole of the passivation layer; a second substrate attached to the first substrate in a facing manner; a common electrode formed on the second substrate; and an electrophoretic film formed between the first and second substrates.

    摘要翻译： 电泳显示装置包括：具有形成在多个垂直像素行和多个水平像素行中的多个像素的第一基板; 形成在所述第一基板的每个垂直像素行处的多个数据线; 形成在第一基板的每个像素处的薄膜晶体管（TFT），包括源电极，漏电极，有机半导体层和栅电极; 形成在所述TFT和所述第一基板的数据线上的钝化层，并且包括暴露所述TFT的漏极的第一接触孔和暴露所述TFT的栅电极的第二接触孔; 形成在第一衬底的每个像素处的钝化层上并通过钝化层的第一接触孔与TFT的漏电极连接的像素电极; 多个栅极线，形成在第一基板的每个水平像素行处的钝化层上，并经由钝化层的第二接触孔与TFT的栅电极连接; 以面对方式附接到第一基板的第二基板; 形成在所述第二基板上的公共电极; 以及形成在第一和第二基板之间的电泳膜。

    BATTERY PACK
    58.
    发明申请
    BATTERY PACK 审中-公开
    电池组

    公开(公告)号：US20110248676A1

    公开(公告)日：2011-10-13

    申请号：US12960381

    申请日：2010-12-03

    申请人： Dae-Won Kim

    发明人： Dae-Won Kim

    IPC分类号： H02J7/00 ,  H02H3/00

    CPC分类号： H01M2/204 ,  H01M2/20 ,  H01M10/425

    摘要： An improved battery pack is disclosed. The battery pack includes: a plurality of battery cells; a protection circuit module for controlling charging and discharging of the plurality of battery cells; and a plurality of connection members for applying voltages output from the plurality of battery cells to the protection circuit module, at least one of the connection members having a damping resistive component.

    摘要翻译： 公开了一种改进的电池组。 电池组包括：多个电池单元; 保护电路模块，用于控制多个电池单元的充电和放电; 以及多个连接构件，用于将从多个电池单元输出的电压施加到保护电路模块，至少一个连接构件具有阻尼电阻分量。

    Display device having oxide thin film transistor and fabrication method thereof
    59.
    发明授权
    Display device having oxide thin film transistor and fabrication method thereof 有权
    具有氧化物薄膜晶体管的显示装置及其制造方法

    公开(公告)号：US07989274B2

    公开(公告)日：2011-08-02

    申请号：US12649880

    申请日：2009-12-30

    申请人： Im-Kuk Kang ,  Dae-Won Kim

    发明人： Im-Kuk Kang ,  Dae-Won Kim

    IPC分类号： H01L21/00 ,  H01L21/84

    CPC分类号： H01L27/1225 ,  G02F1/1333 ,  G02F2001/136231 ,  H01L23/4824 ,  H01L27/1214 ,  H01L27/1288 ,  H01L29/4908 ,  H01L2924/0002 ,  H01L2924/12044 ,  H01L2924/00

    摘要： A display device including an oxide thin film transistor (TFT) is disclosed. A nitride-based gate insulating layer of a gate pad area is etched when an oxide semiconductor layer of a pixel area is etched by using a half-tone mask, a metal layer is formed at a contact hole of the etched gate insulting layer, and then a passivation layer formed thereon is etched. Thus, an overhang of the passivation layer can be prevented from being generated when the gate insulating layer is etched, and accordingly, the fabrication process can be simplified.

    摘要翻译： 公开了一种包括氧化物薄膜晶体管（TFT）的显示装置。 当通过使用半色调掩模蚀刻像素区域的氧化物半导体层时，蚀刻栅极焊盘区域的氮化物基栅极绝缘层，在蚀刻栅极绝缘层的接触孔处形成金属层，以及 然后蚀刻形成在其上的钝化层。 因此，当蚀刻栅极绝缘层时，可以防止钝化层的突出部产生，因此可以简化制造工艺。

    Method of making thin film transistor with zinc oxide based semiconductor layer and zinc oxide based insulation layer
    60.
    发明授权
    Method of making thin film transistor with zinc oxide based semiconductor layer and zinc oxide based insulation layer 有权
    用氧化锌基半导体层和氧化锌基绝缘层制造薄膜晶体管的方法

    公开(公告)号：US07981720B2

    公开(公告)日：2011-07-19

    申请号：US12648872

    申请日：2009-12-29

    申请人： Dae-Won Kim ,  Jong-Uk Bae

    发明人： Dae-Won Kim ,  Jong-Uk Bae

    IPC分类号： H01L21/00 ,  H01L21/36

    CPC分类号： H01L21/02554 ,  H01L21/02565 ,  H01L21/02592 ,  H01L21/02631 ,  H01L27/1225 ,  H01L27/1288 ,  H01L29/7869

    摘要： According to a method of fabricating an oxide thin-film transistor, when a thin-film transistor is fabricated by using an amorphous zinc oxide (ZnO)-based semiconductor as an active layer, it may be possible to reduce a tact time as well as attain an enhanced element characteristic by depositing an insulation layer having an oxide characteristic in-situ through controlling oxygen (O2) flow subsequent to depositing an oxide semiconductor using a sputter, and the method may include the steps of forming a gate electrode on a substrate; forming a gate insulation layer on the substrate; depositing an amorphous zinc oxide-based semiconductor layer made of an amorphous zinc oxide-based semiconductor and an amorphous zinc oxide-based insulation layer having an oxide characteristic in-situ on the gate insulation layer; forming an active layer made of the amorphous zinc oxide-based semiconductor over the gate electrode while at the same time forming a channel protection layer made of the amorphous zinc oxide-based insulation layer on a channel region of the active layer; and forming a source electrode and a drain electrode electrically connected to a source region and a drain region of the active layer over the active layer.

    摘要翻译： 根据制造氧化物薄膜晶体管的方法，当通过使用基于无定形氧化锌（ZnO）的半导体作为有源层制造薄膜晶体管时，可以减少节拍时间以及 通过在使用溅射沉积氧化物半导体之后通过控制氧（O 2）流来原位沉积具有氧化物特性的绝缘层来获得增强的元件特性，并且该方法可以包括以下步骤：在衬底上形成栅电极; 在所述基板上形成栅极绝缘层; 在所述栅绝缘层上原位沉积由非晶形氧化锌基半导体制成的无定形氧化锌基半导体层和具有氧化物特性的非晶形氧化锌基绝缘层; 在所述栅电极上形成由所述无定形氧化锌基半导体制成的有源层，同时在所述有源层的沟道区上形成由所述无定形氧化锌类绝缘层形成的沟道保护层; 以及在所述有源层上形成与所述有源层的源极区域和漏极区域电连接的源电极和漏电极。