Amplifier circuit with overshoot suppression

    公开(公告)号:US11290061B2

    公开(公告)日:2022-03-29

    申请号:US16929124

    申请日:2020-07-15

    Abstract: An amplifier circuit including an input amplifier, an output amplifier and a diode device is provided. The output amplifier includes a PMOSFET and an NMOSFET. The PMOSFET has a gate electrode serving as a first input end and a drain coupled to an output end. The NMOSFET has a gate electrode serving as a second input end and a drain coupled to the output end. The output amplifier outputs an output voltage at the output end, and is coupled to the input amplifier via at least one of the first and second input ends. The diode device is coupled between the output end and the at least one of the first and second input ends of the output amplifier. When a voltage difference between the output end and the at least one of the first and second input ends of the output amplifier is greater than a barrier voltage of the diode device, the diode device is turned on, and an overshoot of the output voltage is reduced.

    Power-saving driving circuit for display panel and power-saving driving method thereof

    公开(公告)号:US11024252B2

    公开(公告)日:2021-06-01

    申请号:US15961896

    申请日:2018-04-25

    Abstract: A power-saving driving circuit for a display panel is provided. The display panel includes a pixel array including a plurality of data lines. The data lines are grouped into a plurality of pixel regions according to a scan time. Each of the pixel regions has a plurality of pixels. The power-saving driving circuit includes at least one source driver. The source driver respectively supplies a driving voltage to the pixels on at least one of the data lines. The driving voltage supplied by the source driver to each of the pixel regions has a varying driving capability determined according to a pulse width and/or a rising slope of the driving voltage. The pulse width and/or the rising slope of the driving voltage is larger when the driving voltage is supplied for driving the pixels in the pixel region farther from the source driver.

    Display apparatus and driving method thereof

    公开(公告)号:US10403225B2

    公开(公告)日:2019-09-03

    申请号:US14492079

    申请日:2014-09-22

    Abstract: A display apparatus and a driving method for the display apparatus are provided. The display apparatus includes a display panel and a first source driver. The display panel has a pixel array. The first source driver sequentially supplies a first overdrive voltage and a driving voltage to a pixel in the pixel array. The first overdrive voltage has a plurality of voltage levels according to positions of pixels in the pixel array.

    REFERENCE VOLTAGE GENERATOR
    57.
    发明申请

    公开(公告)号:US20190113939A1

    公开(公告)日:2019-04-18

    申请号:US16052654

    申请日:2018-08-02

    CPC classification number: G05F1/46 G01R19/16528 H03K5/24

    Abstract: A reference voltage generator includes a detecting voltage provider, a comparator, and a core circuit. The detecting voltage provider provides a detecting voltage with a first voltage level corresponding to a voltage coefficient. The comparator compares the first voltage level of the detecting voltage with a plurality of sampled amplitudes of an input signal to respectively generate a plurality of comparison results. The core circuit is used to: collect a plurality of first comparison results associated with a current received bit of a preset value from the comparison results; take the voltage coefficient as a first boundary voltage coefficient in response to the first comparison results satisfying a first condition; take the voltage coefficient as a second boundary voltage coefficient in response to the first comparison results satisfying a second condition. The reference circuit generates a reference voltage according to the first and second boundary voltage coefficients.

    SILICON CONTROLLED RECTIFIER
    60.
    发明申请

    公开(公告)号:US20170309612A1

    公开(公告)日:2017-10-26

    申请号:US15275492

    申请日:2016-09-26

    CPC classification number: H01L27/0262 H01L29/0649 H01L29/87

    Abstract: A silicon controlled rectifier including a semiconductor substrate, first and second semiconductor wells, first and second semiconductor regions, third and fourth semiconductor regions and a silicide layer is provided. The first and the second semiconductor wells are formed in the semiconductor substrate. The first and the second semiconductor regions are respectively formed in the first and the second semiconductor wells in spaced apart relation. The third and the fourth semiconductor regions are respectively formed in the first and the second semiconductor wells. The silicide layer is formed on the third and the fourth semiconductor regions. The silicon controlled rectifier is at least suitable for high frequency circuit application. The silicon controlled rectifier has a relatively low trigger voltage, a relatively high electrostatic discharge level, and a relatively low capacitance.

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