公开(公告)号：US08797205B2

公开(公告)日：2014-08-05

申请号：US13413793

申请日：2012-03-07

申请人： Masanori Furuta ,  Tetsuro Itakura

发明人： Masanori Furuta ,  Tetsuro Itakura

IPC分类号： H03M1/12

CPC分类号： H03M1/164 ,  H03M1/466

摘要： This A/D convertor includes: a first D/A conversion unit configured to sample an analog input signal, and to generate a first difference signal by performing successive comparison of the analog input signal based on a reference voltage; a precharge capacitor unit configured to hold the reference voltage; a first comparing unit configured to compare the first difference signal with a reference value to generate a first digital signal; and an amplifying unit configured to calculate by using the first difference signal and the reference voltage to generate a residual signal.

摘要翻译： 该A / D转换器包括：第一D / A转换单元，被配置为对模拟输入信号进行采样，并且通过基于参考电压执行模拟输入信号的连续比较来产生第一差分信号; 配置为保持所述参考电压的预充电电容器单元; 第一比较单元，被配置为将所述第一差分信号与参考值进行比较，以产生第一数字信号; 以及放大单元，被配置为通过使用第一差分信号和参考电压来计算以产生残留信号。

公开(公告)号：US08723713B2

公开(公告)日：2014-05-13

申请号：US13717410

申请日：2012-12-17

申请人： Junya Matsuno ,  Tetsuro Itakura

发明人： Junya Matsuno ,  Tetsuro Itakura

IPC分类号： H03M1/36

CPC分类号： H03H11/22 ,  H03M1/204 ,  H03M1/205 ,  H03M1/36 ,  H03M1/365

摘要： There is provided a signal interpolation device, including: a first amplifier to generate a first signal representing a difference between an input signal and a first reference voltage; a second amplifier to generate a second signal representing a difference between the input signal and a second reference voltage; a first output amplifier to amplify the first signal to generate a first output signal; a second output amplifier to amplify the second signal to generate a second output signal; a third output amplifier to amplify a sum of a first interpolation signal and the first signal to generate a third output signal, the first interpolation signal representing a voltage generated by dividing a difference between the first reference voltage and the second reference voltage by “2^n”; and a fourth output amplifier to amplify a difference between the second signal and the first interpolation signal to generate a fourth output signal.

摘要翻译： 提供了一种信号插值装置，包括：第一放大器，用于产生表示输入信号和第一参考电压之间的差的第一信号; 第二放大器，用于产生表示所述输入信号和第二参考电压之间的差的第二信号; 第一输出放大器，用于放大第一信号以产生第一输出信号; 第二输出放大器，用于放大第二信号以产生第二输出信号; 第三输出放大器，用于放大第一内插信号和第一信号的和以产生第三输出信号，第一内插信号表示通过将第一参考电压和第二参考电压之差除以“2 ^ n“; 以及第四输出放大器，用于放大第二信号和第一内插信号之间的差以产生第四输出信号。

公开(公告)号：US08410762B2

公开(公告)日：2013-04-02

申请号：US13306119

申请日：2011-11-29

申请人： Takeshi Ueno ,  Tetsuro Itakura

发明人： Takeshi Ueno ,  Tetsuro Itakura

IPC分类号： G05F1/613 ,  G05F1/40

CPC分类号： H02M3/1588 ,  Y02B70/1466

摘要： The high-side switch has one end connected to the input terminal. The low-side switch has one end connected to other end of the high-side switch and other end connected to a ground terminal. The inductor has one end connected to the other end of the high-side switch and other end connected to the output terminal. The capacitor has one end connected to the other end of the inductor and other end connected to the ground terminal. The high-side switch controlling circuit generates and supplies a high-side switch controlling signal based on a target voltage of the output terminal, the output voltage of the output terminal, and a current flowing through the capacitor, to the high-side switch. The low-side switch controlling circuit generates and supplies a low-side switch controlling signal based on the high-side switch controlling signal and a current flowing through the inductor, to the low-side switch.

摘要翻译： 高边开关的一端连接到输入端。 低侧开关的一端连接到高侧开关的另一端，另一端连接到接地端子。 电感器的一端连接到高侧开关的另一端，另一端连接到输出端子。 电容器的一端连接到电感器的另一端，另一端连接到接地端子。 高侧开关控制电路基于输出端子的目标电压，输出端子的输出电压和流过电容器的电流产生并提供高侧开关控制信号到高侧开关。 低侧开关控制电路基于高侧开关控制信号和流过电感器的电流产生并提供低侧开关控制信号到低侧开关。

公开(公告)号：US07865163B2

公开(公告)日：2011-01-04

申请号：US12407442

申请日：2009-03-19

申请人： Osamu Watanabe ,  Rui Ito ,  Shigehito Saigusa ,  Tetsuro Itakura

发明人： Osamu Watanabe ,  Rui Ito ,  Shigehito Saigusa ,  Tetsuro Itakura

IPC分类号： H04B1/10

CPC分类号： H03H11/1291

摘要： A time constant automatic adjusting circuit comprises: a filter circuit varying a phase of an clock signal to be input so as to output the clock signal; a phase comparison circuit comparing a phase of an output signal of the filter circuit with the phase of the clock signal, and outputting a predetermined voltage when the phase of the output signal and the phase of the clock signal are the same; at least three comparators comparing the output voltage with a plurality of different voltages; an up-down counter counting a number of output bits of either one of the at least three different voltages in accordance with an output result of the comparators; and a control circuit varying the time constant of the filter circuit in accordance with the number of output bits counted by the up-down counter.

摘要翻译： 时间常数自动调整电路包括：滤波器电路，改变输入时钟信号的相位以输出时钟信号; 相位比较电路，将滤波器电路的输出信号的相位与时钟信号的相位进行比较，并且当输出信号的相位和时钟信号的相位相同时输出预定电压; 至少三个比较器将输出电压与多个不同电压进行比较; 根据比较器的输出结果，计数至少三个不同电压中的任何一个的输出位的数量的递减计数器; 以及控制电路根据由升降计数器计数的输出位数来改变滤波电路的时间常数。

公开(公告)号：US20100237829A1

公开(公告)日：2010-09-23

申请号：US12726828

申请日：2010-03-18

申请人： Yoshinao TATEBAYASHI ,  Shoji Otaka ,  Tetsuro Itakura ,  Norio Takami

发明人： Yoshinao TATEBAYASHI ,  Shoji Otaka ,  Tetsuro Itakura ,  Norio Takami

IPC分类号： H02J7/00

CPC分类号： H02J7/0026 ,  H01M4/661 ,  H01M10/052 ,  H01M10/425 ,  H01M10/441 ,  H01M10/482 ,  Y02T10/7055

摘要： An assembled battery system includes an assembled battery including a plurality of electric cell blocks connected in series, the electric cell blocks each including at least one nonaqueous electrolyte secondary battery provided with a negative electrode current collector formed of aluminum or an aluminum alloy, a voltage measuring unit configured to measure a plurality of voltages of the electric cell blocks, a controller which controls charge/discharge of the assembled battery in accordance with the measured voltages, and bypass circuits connected in parallel to the electric cell blocks, the bypass circuits each bypassing a current that flows from a negative electrode of one of the electric cell blocks to a positive electrode of the one of electric cell blocks when the measured voltage of the one of electric cell blocks is a negative value not greater than a threshold value.

摘要翻译： 组合电池系统包括：串联连接的多个电池块的组电池，每个电池块包括至少一个设置有由铝或铝合金形成的负极集电体的非水电解质二次电池，电压测量 被配置为测量电池单元块的多个电压的单元，根据测量的电压控制组电池的充电/放电的控制器，以及与电池块并联连接的旁路电路，旁路电路绕过 当一个电池块的测量电压为不大于阈值的负值时，电流从电池单元块中的一个的负极流向电池单元块中的一个的正极。

公开(公告)号：US20090045995A1

公开(公告)日：2009-02-19

申请号：US12175209

申请日：2008-07-17

申请人： Mai NOZAWA ,  Daisuke Kurose ,  Takeshi Ueno ,  Tetsuro Itakura

发明人： Mai NOZAWA ,  Daisuke Kurose ,  Takeshi Ueno ,  Tetsuro Itakura

IPC分类号： H03M1/34

CPC分类号： H03K5/2481 ,  H03K5/249

摘要： A comparator includes a first inverter which is inserted between a power source terminal and one end of a first variable resistor, includes a first FinFET provided with a first gate terminal for receiving a positive phase output signal, and a second gate terminal for receiving a clock signal changing between a first level and a second level, inverts the positive phase output signal, and outputs a negative phase output signal, and a second inverter which is inserted between the power source terminal and one end of a second variable resistor, includes a second FinFET provided with a third gate terminal for receiving the negative phase output signal, a fourth gate terminal for receiving the clock signal, and the same polarity as the first FinFET, inverts the negative phase output signal, and outputs the positive phase output signal.

摘要翻译： 比较器包括插入在电源端子和第一可变电阻器的一端之间的第一反相器，包括：第一FinFET，其具有用于接收正相输出信号的第一栅极端子和用于接收时钟的第二栅极端子 信号在第一电平和第二电平之间变化，使正相输出信号反相，并输出负相输出信号，并且插入在电源端和第二可变电阻的一端之间的第二反相器包括第二 FinFET具有用于接收负相输出信号的第三栅极端子，用于接收时钟信号的第四栅极端子和与第一FinFET相同的极性，反相负相输出信号，并输出正相输出信号。

公开(公告)号：US20080061878A1

公开(公告)日：2008-03-13

申请号：US11687083

申请日：2007-03-16

申请人： Daisuke Kurose ,  Tetsuro Itakura

发明人： Daisuke Kurose ,  Tetsuro Itakura

IPC分类号： H03F3/45

CPC分类号： H03F3/45183 ,  H01L29/785 ,  H03F3/005 ,  H03F3/45188 ,  H03F3/45475 ,  H03F3/45654 ,  H03F2203/45008 ,  H03F2203/45024 ,  H03F2203/45082 ,  H03F2203/45342 ,  H03F2203/45354 ,  H03F2203/45356 ,  H03F2203/45418 ,  H03F2203/45424 ,  H03F2203/45536 ,  H03F2203/45551

摘要： Disclosed is a differential amplifier including: first and second transistors each having a first gate, a second gate, a source, and a drain open to a drain side, the first gate and the second gate being controlled independently, a differential input being supplied to between the first gates of the first and second transistors, and the sources of the first and second transistors being connected in common to a first reference potential; first and second load circuits each connected to each of drain sides of the first and second transistors; a detection circuit detecting a common-mode voltage between ones of drain sides of the first and second transistors; and a comparison and amplification circuit amplifying the common-mode voltage in comparison with a second reference potential and supplying an output signal thereof to both of the second gates of the first and second transistors.

摘要翻译： 公开了一种差分放大器，包括：第一和第二晶体管，每个具有通向漏极侧的第一栅极，第二栅极，源极和漏极，第一栅极和第二栅极被独立地控制，差分输入被提供给 在第一和第二晶体管的第一栅极之间，并且第一和第二晶体管的源极共同连接到第一参考电位; 第一和第二负载电路各自连接到第一和第二晶体管的每个漏极侧; 检测电路，检测第一和第二晶体管的漏极侧之间的共模电压; 以及比较放大电路，与第二参考电位相比放大共模电压，并将其输出信号提供给第一和第二晶体管的第二栅极。

公开(公告)号：US20070210869A1

公开(公告)日：2007-09-13

申请号：US11618071

申请日：2006-12-29

申请人： Tomohiko Ito ,  Tetsuro Itakura

发明人： Tomohiko Ito ,  Tetsuro Itakura

IPC分类号： H03F3/45

CPC分类号： H03F3/45179

摘要： Disclosed is a differential amplifying circuit including an amplifying circuit, wherein 1) a drain of a sixth transistor is connected to a drain of an eighth transistor, and a drain of a tenth transistor is connected to a drain of a fourth transistor, and 2) a ratio between a total of gate widths of the fourth (or eighth) and tenth (or sixth) transistors (converted per unit gate length, and gate widths that follow are the same)and a gate width of a fifth (or ninth) transistor is nearly proportional to a current ratio between a first (or third) and second (or fourth) current source circuits, the gate width of the fourth (or eighth) transistor being equal to or more than that of the tenth (or sixth) transistor.

摘要翻译： 公开了一种包括放大电路的差分放大电路，其中1）第六晶体管的漏极连接到第八晶体管的漏极，第十晶体管的漏极连接到第四晶体管的漏极，以及2） 第四（或第八）和第十（或第六）晶体管（每单位栅极长度转换，并且随后的栅极宽度相同）的栅极宽度的总和与第五（或第九）晶体管 与第一（或第三）和第二（或第四）电流源电路之间的电流比几乎成比例，第四（或第八）晶体管的栅极宽度等于或大于第十（或第六）晶体管的栅极宽度 。

公开(公告)号：US07123082B2

公开(公告)日：2006-10-17

申请号：US11258934

申请日：2005-10-27

申请人： Daisuke Kurose ,  Tetsuro Itakura ,  Rui Ito

发明人： Daisuke Kurose ,  Tetsuro Itakura ,  Rui Ito

IPC分类号： H04B1/10

CPC分类号： H03H11/32 ,  H03F3/345 ,  H03F3/45475 ,  H03F2203/45511 ,  H03F2203/45512 ,  H03F2203/45592 ,  H03F2203/45652 ,  H03H11/1291 ,  H03H11/245

摘要： A variable time constant circuit includes an inverting amplifier which has an amplifier input terminal and an amplifier output terminal connected to a signal output terminal and inverts a signal inputted to the amplifier input terminal, a first and a second resistor which are connected in series between the signal input terminal and the amplifier input terminal, a capacitor connected between the amplifier input terminal and the amplifier output terminal, a field effect transistor including a gate terminal connected to a junction point of the first and second resistors, a source terminal kept at a constant potential, and a drain terminal connected to the amplifier input terminal, the transistor flowing a current through the drain terminal according to a voltage between the gate terminal and the source terminal, and a control circuit which controls a voltage-current conversion ratio of the transistor according to a time constant control signal.

摘要翻译： 可变时间常数电路包括反相放大器，其具有放大器输入端和连接到信号输出端的放大器输出端，并且反相输入到放大器输入端的信号，第一和第二电阻串联在第 信号输入端子和放大器输入端子，连接在放大器输入端子和放大器输出端子之间的电容器，场效应晶体管，其包括连接到第一和第二电阻器的接合点的栅极端子，源极端子保持恒定 电位和连接到放大器输入端子的漏极端子，晶体管根据栅极端子和源极端子之间的电压流过漏极端子，以及控制电路，其控制晶体管的电压 - 电流转换比 根据时间常数控制信号。

公开(公告)号：US07075345B2

公开(公告)日：2006-07-11

申请号：US10207024

申请日：2002-07-30

申请人： Toshiyuki Umeda ,  Shoji Otaka ,  Tetsuro Itakura

发明人： Toshiyuki Umeda ,  Shoji Otaka ,  Tetsuro Itakura

IPC分类号： H03B19/00

CPC分类号： H03D7/1441 ,  H03D7/1433 ,  H03D7/1458 ,  H03D2200/0033 ,  H03D2200/0043 ,  H03D2200/0084

摘要： A frequency converter converts a first current signal having a first frequency into a second current signal having a second frequency different fro the first frequency. The frequency converter includes an adder and a switching circuit. The adder adds the first current signal and a reference current signal to output a third current signal. The switching circuit passes only that portion of the third current signal larger in magnitude than a threshold current to output the second current signal.

摘要翻译： 变频器将具有第一频率的第一电流信号转换成具有与第一频率不同的第二频率的第二电流信号。 变频器包括加法器和开关电路。 加法器将第一电流信号和参考电流信号相加以输出第三电流信号。 开关电路仅通过第三电流信号的大于阈值电流的部分，以输出第二电流信号。