公开(公告)号：US20180145543A1

公开(公告)日：2018-05-24

申请号：US15357921

申请日：2016-11-21

申请人： WiTricity Corporation

发明人： Douglas S. Piasecki

IPC分类号： H02J50/60 ,  H03F3/45 ,  H02J50/12 ,  H02J7/02 ,  G01R17/16 ,  G01R19/00

CPC分类号： H02J50/60 ,  G01R17/16 ,  G01R19/0092 ,  H02J7/025 ,  H02J50/12 ,  H03F3/45071 ,  H03F3/45475 ,  H03F2200/408 ,  H03F2200/462 ,  H03F2203/45138 ,  H03F2203/45514 ,  H03F2203/45551

摘要： A current shunt monitor (CSM) circuit for monitoring the current through a sense resistor. An analog circuit provides an analog output signal proportional to the voltage across the sense resistor. A power supply includes a fixed voltage power supply at a first voltage supply level and a floating power supply. The floating power supply operates at a second voltage supply level referenced from the voltage level on a voltage input and a floating ground. The voltage input varies from a voltage level above the first voltage supply level to a voltage level below the first voltage supply level, and the floating power supply provides power to the analog circuit at least when the voltage level of the voltage input is above the first voltage supply level. A crossover circuit switches power from the floating power to the fixed voltage power supply at the first voltage supply level upon detecting the voltage level on the voltage input proximate in value to the first voltage supply level.

公开(公告)号：US20180131337A1

公开(公告)日：2018-05-10

申请号：US15730918

申请日：2017-10-12

申请人： DENSO CORPORATION

发明人： Kazutaka HONDA

IPC分类号： H03F3/45 ,  G01R19/04 ,  H03K5/08 ,  H03K17/00 ,  G01R19/00 ,  G01R1/20

CPC分类号： H03F3/45179 ,  G01R1/20 ,  G01R19/0053 ,  G01R19/0084 ,  G01R19/04 ,  G01R19/16519 ,  H03F3/45475 ,  H03F2203/45514 ,  H03F2203/45551 ,  H03K5/08 ,  H03K17/002

摘要： A voltage detection circuit includes two detection capacitors, which are paired and configured differentially, first to third detection switches, a drive part, a minimum selector and a maximum selector. The first detection switch is formed of a pMOS transistor, which opens and closes a path between one of the detection capacitors and an input node. The second detection switch is formed of an nMOS transistor, which opens and closes a path between the other of the detection capacitors and an input node. The third detection switch is formed of a series circuit of a pMOS transistor and an nMOS transistor, which open and close a path between two detection capacitors. The driving part turns on and off complementarily between the first and second switches and the third detection switch. The minimum selector applies a lower one of voltages of the input nodes as a substrate potential of the nMOS transistor. The maximum selector applies a higher one of the voltages of the input nodes as a substrate potential of the pMOS transistor.

公开(公告)号：US09685920B2

公开(公告)日：2017-06-20

申请号：US14939060

申请日：2015-11-12

申请人： TAIYO YUDEN CO., LTD.

发明人： Hideaki Yoshida ,  Mitsunori Katsu ,  Hiroyuki Kozutsumi

IPC分类号： H03F3/45 ,  H03F1/34

CPC分类号： H03F3/45475 ,  H03F2200/261 ,  H03F2203/45116 ,  H03F2203/45118 ,  H03F2203/45138 ,  H03F2203/45526 ,  H03F2203/45528 ,  H03F2203/45534 ,  H03F2203/45551 ,  H03F2203/45616 ,  H03F2203/45701 ,  H03F2203/45726

摘要： A reconfigurable operational amplifier includes: a first signal input terminal; a second signal input terminal; an output terminal; an operational amplifier having a non-inverting input, an inverting input, and an output; a negative feedback circuit path from the output of the operational amplifier to the inverting input of the operational amplifier; a first input circuit path from the first signal input terminal to the non-inverting input of the operational amplifier; a second input circuit path from the second signal input terminal to the inverting input of the operational amplifier; an output circuit path from the output of the operational amplifier to the output terminal; and logic units, wherein one or more of the logic units are provided in at least one of the negative feedback circuit path, the first input circuit path, the second input circuit path, and the output circuit path.

公开(公告)号：US09543907B2

公开(公告)日：2017-01-10

申请号：US14605877

申请日：2015-01-26

申请人： Electronics and Telecommunications Research Institute

发明人： Young-deuk Jeon ,  Jung Hee Suk ,  Chun-Gi Lyuh ,  Yi-Gyeong Kim ,  Jong Pil Im ,  Min-Hyung Cho

IPC分类号： H03F3/08 ,  H03G3/00 ,  H03F3/45 ,  H03M1/12

CPC分类号： H03F3/082 ,  H03F3/087 ,  H03F3/45475 ,  H03F2203/45088 ,  H03F2203/45514 ,  H03F2203/45551 ,  H03F2203/45614 ,  H03G3/008 ,  H03M1/121

摘要： Provided is a current-voltage conversion amplifier circuit including: a plurality of light receiving devices generating a current signal proportional to an amount of light by receiving the light; multipliers amplifying the current signal, converting the amplified current signal into a first voltage signal, outputting the amplified current signal, or outputting the converted first voltage signal; multi input amplifiers outputting first and second output voltage pairs through a process for receiving output values of multipliers and an offset voltage and amplifying the received output values and offset voltage; a multiplexing unit selecting and outputting one first and second output voltage pair among the first and second output voltage pairs outputted from multi input amplifiers; and a signal conversion unit converting a difference value between first and second output voltages outputted from the multiplexing unit and outputting the converted digital signal.

摘要翻译： 提供了一种电流 - 电压转换放大器电路，包括：多个光接收装置，通过接收光产生与光量成比例的电流信号; 放大电流信号的乘法器，将放大的电流信号转换成第一电压信号，输出放大的电流信号或输出转换的第一电压信号; 多输入放大器，通过用于接收乘法器的输出值和偏移电压的过程输出第一和第二输出电压对，并放大所接收的输出值和失调电压; 多路复用单元，从多输入放大器输出的第一和第二输出电压对中选择并输出一个第一和第二输出电压对; 以及信号转换单元，转换从多路复用单元输出的第一和第二输出电压之间的差值，并输出转换的数字信号。

公开(公告)号：US09461625B1

公开(公告)日：2016-10-04

申请号：US13895807

申请日：2013-05-16

申请人： Maxim Integrated Products, Inc.

发明人： Luciano Prandi ,  Carlo Caminada ,  Carlo Alberto Romani

IPC分类号： H03B1/00 ,  H03K3/012 ,  H03K3/013

CPC分类号： H03H19/004 ,  H03F1/26 ,  H03F3/45475 ,  H03F3/45968 ,  H03F2203/45514 ,  H03F2203/45551

摘要： Various embodiments of the invention provide for cancellation of unwanted signals in switched-capacitor circuits. In certain embodiments cancellation this is accomplished by performing a multi-phase CDS technique. The technique comprises resetting capacitive elements in the feedback path of an operational amplifier during a reset interval, maintaining a decoupled condition during a sampling interval in which the unwanted signals are sampled, and cancelling unwanted signals in a sensing interval.

摘要翻译： 本发明的各种实施例提供了在开关电容器电路中消除不期望的信号。 在某些实施例中，通过执行多相CDS技术来实现抵消。 该技术包括在复位间隔期间重置运算放大器的反馈路径中的电容元件，在不需要的信号被采样的采样间隔期间保持解耦条件，以及在感测间隔中消除不需要的信号。

公开(公告)号：US20160248380A1

公开(公告)日：2016-08-25

申请号：US15050580

申请日：2016-02-23

申请人： Omni Design Technologies Inc.

发明人： Hae-Seung Lee

IPC分类号： H03F1/02 ,  H03F3/45 ,  H03F1/26

CPC分类号： H03F1/0205 ,  H03F1/26 ,  H03F3/45183 ,  H03F3/45475 ,  H03F2203/45116 ,  H03F2203/45156 ,  H03F2203/45318 ,  H03F2203/45512 ,  H03F2203/45514 ,  H03F2203/45551

摘要： Switched capacitor circuits and charge transfer methods comprising a sampling phase and a transfer phase. Circuits and methods are implemented via a plurality of switches, a set of at least two capacitors, at least one voltage amplifier, and an operational amplifier. In one example, during the sampling phase at least one input voltage is sampled, and during the transfer phase at least a first reference voltage provided by the at least one voltage amplifier is subtracted from the at least one input voltage using the operational amplifier. The same set of at least two capacitors may be used in both the sampling phase and the transfer phase.

摘要翻译： 开关电容器电路和电荷转移方法包括采样相位和转移相位。 电路和方法通过多个开关，一组至少两个电容器，至少一个电压放大器和运算放大器来实现。 在一个示例中，在采样阶段期间对至少一个输入电压进行采样，并且在传输阶段期间，使用运算放大器从至少一个输入电压减去由至少一个电压放大器提供的至少第一参考电压。 在采样阶段和转移阶段都可以使用同一组至少两个电容器。

公开(公告)号：US09407221B2

公开(公告)日：2016-08-02

申请号：US14528196

申请日：2014-10-30

申请人： Kabushiki Kaisha Toshiba

发明人： Tetsuro Itakura ,  Masanori Furuta ,  Shunsuke Kimura ,  Go Kawata ,  Hideyuki Funaki

IPC分类号： H03F3/45

CPC分类号： H03F3/45183 ,  H03F3/45188 ,  H03F3/45475 ,  H03F3/45654 ,  H03F2203/45082 ,  H03F2203/45084 ,  H03F2203/45101 ,  H03F2203/45352 ,  H03F2203/45354 ,  H03F2203/45512 ,  H03F2203/45528 ,  H03F2203/45551

摘要： In one embodiment, a differential amplifier circuit includes a first input terminal, a second input terminal, a first transistor, a second transistor, a third transistor, a current source, a first output terminal, a second output terminal, a first passive element, and a second passive element. The first (second) transistor has a control terminal connected to the first (second) input terminal. The third transistor has a control terminal. The control terminal is applied predetermined bias voltage. The current source is connected to a first terminal in each of the first transistor, second transistor, and third transistor. The first (second) output terminal is connected to a second terminal of the first (second) transistor. The first (second) passive element is connected between the first (second) input terminal and the first (second) output terminal.

摘要翻译： 在一个实施例中，差分放大器电路包括第一输入端，第二输入端，第一晶体管，第二晶体管，第三晶体管，电流源，第一输出端，​​第二输出端，第一无源元件， 和第二无源元件。 第一（第二）晶体管具有连接到第一（第二）输入端子的控制端子。 第三晶体管具有控制端子。 控制端子被施加预定的偏置电压。 电流源连接到第一晶体管，第二晶体管和第三晶体管中的每一个中的第一端子。 第一（第二）输出端子连接到第一（第二）晶体管的第二端子。 第一（第二）无源元件连接在第一（第二）输入端和第一（第二）输出端之间。

公开(公告)号：US09406353B2

公开(公告)日：2016-08-02

申请号：US14333164

申请日：2014-07-16

申请人： MICRON TECHNOLOGY, INC.

发明人： Daniele Vimercati

IPC分类号： G11C7/06 ,  H03F3/45 ,  G11C7/08 ,  G11C7/12

CPC分类号： G11C7/062 ,  G11C7/08 ,  G11C7/12 ,  H03F3/45762 ,  H03F2200/261 ,  H03F2203/45536 ,  H03F2203/45544 ,  H03F2203/45551

摘要： Sense amplifiers, memories, and apparatuses and methods for sensing a data state of a memory cell are disclosed. An example apparatus includes a differential amplifier configured to amplify a voltage difference between voltages applied to first and second amplifier input nodes to provide an output. The example apparatus further includes first and second capacitances coupled to the first and second amplifier input nodes. A switch block coupled to the first and second capacitances is configured to couple during a first phase a reference input node to the first and second capacitances and to the first amplifier input node. The switch block is further configured to couple during the first phase an output of the amplifier to the second amplifier input node to establish a compensation condition. During a second phase, the switch block couples its input nodes to the first and second capacitances.

公开(公告)号：US09252660B2

公开(公告)日：2016-02-02

申请号：US13631765

申请日：2012-09-28

申请人： Efram Burlingame ,  Stephen Kosic

发明人： Efram Burlingame ,  Stephen Kosic

IPC分类号： H02M7/00 ,  H02M3/07 ,  H03F3/45

CPC分类号： H02M3/07 ,  H02M3/073 ,  H02M2003/077 ,  H03F3/45475 ,  H03F2200/78 ,  H03F2203/45551

摘要： A system, method, and computer program product for generating a regulated boosted load voltage. A comparator may use reduced versions of a reference voltage, a supply voltage, and a fed-back output load voltage to determine whether the output load voltage requires adjustment. If so, a controller may responsively vary the number of voltage boosting charge pumps connected in parallel to the load to best match a target voltage. The target voltage may be the reference voltage plus the supply voltage. A counter may track the number of active charge pumps, and may increment or decrement the number more slowly than the charge pumps operate. Loop gain may be limited by an integrating filter to prevent oscillation. The embodiments are of particular utility for signal conversion circuitry as they eliminate difficulties arising from gate-source voltage inadequacies and differences in switch transistors. A wider range of reference voltages may be accommodated.

摘要翻译： 一种用于产生调节的升压负载电压的系统，方法和计算机程序产品。 比较器可以使用参考电压，电源电压和反馈输出负载电压的减小版本，以确定输出负载电压是否需要调整。 如果是这样，控制器可以响应地改变与负载并联连接的升压电荷泵的数量，以最佳地匹配目标电压。 目标电压可以是参考电压加电源电压。 计数器可以跟踪活动电荷泵的数量，并且可以比电荷泵操作更慢地增加或减少数量。 环路增益可能受到积分滤波器的限制，以防止振荡。 这些实施例对于信号转换电路特别有效，因为它们消除了栅极 - 源极电压不足和开关晶体管的差异引起的困难。 可以适应更宽范围的参考电压。

公开(公告)号：US09160291B2

公开(公告)日：2015-10-13

申请号：US14454791

申请日：2014-08-08

申请人： Semiconductor Energy Laboratory Co., Ltd.

发明人： Kouhei Toyotaka

IPC分类号： G11C27/02 ,  G06F7/64 ,  H03F3/45 ,  H03F3/00

CPC分类号： H03F3/45071 ,  H03F3/005 ,  H03F3/45 ,  H03F3/45475 ,  H03F2203/45551

摘要： A semiconductor circuit which can have stable input output characteristics is provided. Specifically, a semiconductor circuit in which problems caused by the leakage current of a switching element are suppressed is provided. A field-effect transistor in which a wide band gap semiconductor, such as an oxide semiconductor, is used in a semiconductor layer where a channel is formed is used for a switching element included in a switched capacitor circuit. Such a transistor has a small leakage current in an off state. When the transistor is used as a switching element, a semiconductor circuit which has stable input output characteristics and in which problems caused by the leakage current are suppressed can be fabricated.

摘要翻译： 提供了可以具有稳定的输入输出特性的半导体电路。 具体地说，提供了抑制由开关元件的漏电流引起的问题的半导体电路。 在形成沟道的半导体层中使用诸如氧化物半导体的宽带隙半导体的场效应晶体管用于开关电容电路中所包含的开关元件。 这种晶体管在断开状态下具有小的漏电流。 当晶体管用作开关元件时，可以制造出具有稳定的输入输出特性并且由漏电流引起的问题被抑制的半导体电路。