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    SEMICONDUCTOR MEMORY DEVICE AND FABRICATION METHOD THEREOF
    51.
    发明申请
    SEMICONDUCTOR MEMORY DEVICE AND FABRICATION METHOD THEREOF 有权

    公开(公告)号：US20220310697A1

    公开(公告)日：2022-09-29

    申请号：US17228720

    申请日：2021-04-13

    Applicant: UNITED MICROELECTRONICS CORP.

    Inventor： Hui-Lin Wang ,  Si-Han Tsai ,  Ching-Hua Hsu ,  Chen-Yi Weng ,  Po-Kai Hsu

    IPC: H01L27/22 ,  H01L43/02 ,  H01L43/08 ,  H01L43/12

    Abstract: A semiconductor memory device includes a substrate having a memory area and a logic circuit area thereon, a first interlayer dielectric layer on the substrate, and a second interlayer dielectric layer on the substrate. An embedded memory cell structure is disposed within the memory area between the first interlayer dielectric layer and the second interlayer dielectric layer. The second interlayer dielectric layer includes a first portion covering the embedded memory cell structure within the memory area and a second portion covering the logic circuit area. A top surface of the first portion is coplanar with a top surface of the second portion.

    Manufacturing method of semiconductor device
    55.
    发明授权
    Manufacturing method of semiconductor device 有权

    公开(公告)号：US10991878B2

    公开(公告)日：2021-04-27

    申请号：US16885233

    申请日：2020-05-27

    Applicant: UNITED MICROELECTRONICS CORP.

    Inventor： Chen-Yi Weng ,  Jing-Yin Jhang ,  Hui-Lin Wang ,  Chin-Yang Hsieh

    IPC: H01L43/12 ,  H01L43/10 ,  H01L27/22 ,  H01L43/02 ,  H01L43/08

    Abstract: A manufacturing method of a semiconductor device includes the following steps. A first inter-metal dielectric (IMD) layer is formed on a substrate. A cap layer is formed on the first IMD layer. A connection structure is formed on the substrate and penetrates the cap layer and the first IMD layer. A magnetic tunnel junction (MTJ) stack is formed on the connection structure and the cap layer. A patterning process is performed to the MTJ stack for forming a MTJ structure on the connection structure and removing the cap layer. A second IMD layer is formed on the first IMD layer and surrounds the MTJ structure. The semiconductor device includes the substrate, the connection structure, the first IMD layer, the MTJ structure, and the second IMD layer. The dielectric constant of the first IMD layer is lower than the dielectric constant of the second IMD layer.

    Connection structure of semiconductor device and manufacturing method thereof
    57.
    发明授权
    Connection structure of semiconductor device and manufacturing method thereof 有权

    公开(公告)号：US10978391B2

    公开(公告)日：2021-04-13

    申请号：US15730744

    申请日：2017-10-12

    Applicant: UNITED MICROELECTRONICS CORP.

    Inventor： Chen-Yi Weng ,  Shih-Che Huang ,  Ching-Li Yang ,  Chih-Sheng Chang

    IPC: H01L23/528 ,  H01L23/522 ,  H01L23/532 ,  H01L23/498

    Abstract: A connection structure of a semiconductor device is provided in the present invention. The connection structure includes an interlayer dielectric, a top metal structure, and a passivation layer. The interlayer dielectric is disposed on a substrate. The top metal structure is disposed on the interlayer dielectric. The top metal structure includes a bottom portion and a top portion disposed on the bottom portion. The bottom portion includes a first sidewall, and the top portion includes a second sidewall. A slope of the first sidewall is larger than a slope of the second sidewall. The passivation layer is conformally disposed on the second sidewall, the first sidewall, and a top surface of the interlayer dielectric.

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