System and method for automatically and selectively promoting object variables to method fields and variables in a digital computer system
    51.
    发明授权
    System and method for automatically and selectively promoting object variables to method fields and variables in a digital computer system 有权
    用于在数字计算机系统中自动选择性地将对象变量提升到方法字段和变量的系统和方法

    公开(公告)号:US06308315B1

    公开(公告)日:2001-10-23

    申请号:US09172153

    申请日:1998-10-14

    IPC分类号: G06F945

    摘要: A code generating system generates, from code in a program, native code that is executable by a computer system. The computer system includes a memory subsystem including a heap in which objects are stored and a stack in which method variables are stored. The code generating system may be included in a just-in-time compiler used to generate native code that is executable by a computer system, from a program in Java Byte Code form, and specifically determines, in response to Java Byte Code representative of an operator for enabling instantiation of a new object, whether the object to be instantiated contains a variable to be used in processing of the received program code portion which can be promoted to a method variable, and, if so, generates native code to enable said variable to be instantiated on the stack.

    摘要翻译: 代码生成系统从程序中的代码生成可由计算机系统执行的本地代码。 计算机系统包括存储子系统,该存储器子系统包括存储对象的堆以及存储方法变量的堆栈。 代码生成系统可以被包括在用于生成可由计算机系统执行的本地代码的即时编译器中,从Java字节代码形式的程序中,并且具体地确定响应于代表代码的Java字节代码 运算符用于启用新对象的实例化,是否要被实例化的对象包含要被用于处理接收到的程序代码部分的变量,可以被提升为方法变量,并且如果是,则生成本地代码以使得所述变量 要在堆栈上实例化。

    Emulating a delayed exception on a digital computer having a
corresponding precise exception mechanism

    公开(公告)号:US5778211A

    公开(公告)日:1998-07-07

    申请号:US602158

    申请日:1996-02-15

    CPC分类号: G06F9/3865 G06F9/45554

    摘要: A digital computer system comprises a precise exception handling processor and a control subsystem. The precise exception handling processor performs processing operations under control of instructions. The precise exception handling processor is constructed in accordance with a precise exception handling model, in which, if an exception condition is detected in connection with an instruction, the exception condition is processed in connection with the instruction. The precise exception handling processor further includes a pending exception indicator having a pending exception indication state and a no pending exception indication state. The control subsystem provides a series of instructions to the precise exception handling processor to facilitate emulation of at least one emulated program instruction. The emulated program instruction is constructed to be processed by a delayed exception handling processor which is constructed in accordance with a delayed exception handling model, in which if an exception is detected during processing of an instruction, the exception condition is processed in connection with a subsequent instruction. The series of instructions provided by the control subsystem in emulation of the emulated program instruction controls the precise exception handling processor to (i) determine whether the pending exception indicator is in the pending exception indication state and, if so, to invoke a routine to process the pending exception and condition the pending exception indicator to the no pending exception indication state (ii) perform processing operations in accordance with the emulated processing instruction; and (iii) if an exception condition is detected during the processing operations, to invoke an exception handler in accordance with the processor's precise exception handling model to condition the pending exception indicator to the pending exception indication state, so that the exception condition will be processed during processing operations for a subsequent emulated program instruction.

    System and method for emulating a segmented virtual address space by a
microprocessor that provides a non-segmented virtual address space
    53.
    发明授权
    System and method for emulating a segmented virtual address space by a microprocessor that provides a non-segmented virtual address space 失效
    用于通过提供非分段虚拟地址空间的微处理器来模拟分段的虚拟地址空间的系统和方法

    公开(公告)号:US5765206A

    公开(公告)日:1998-06-09

    申请号:US608571

    申请日:1996-02-28

    摘要: A processor processes a segmented to linear virtual address conversion instruction to convert segmented virtual addresses in a segmented virtual address space to a linear virtual address in a linear virtual address space. The segmented virtual address space comprises a plurality of segments each identified by a segment identifier, each segment comprising at least one page identified by a page identifier. The linear virtual address space includes a plurality of pages each identified by a page identifier. In processing the segmented to linear virtual address conversion instruction, the processor uses a plurality of segmented to linear virtual address conversion descriptors, each associated with a page in the segmented virtual address space, each segmented to linear virtual address conversion descriptor identifying the page identifier of one of the pages in the linear virtual address space. The segmented to linear virtual address conversion instruction includes a segmented virtual address identifier in the segmented virtual address space. In processing the segmented to linear virtual address conversion instruction, the processor uses the segmented virtual address identifier in the segmented to linear virtual address conversion instruction to select one of the segmented to linear virtual address conversion descriptors. After selecting a segmented to linear virtual address conversion descriptor, the processor uses the page identifier of the linear virtual address space from the selected segmented to linear virtual address conversion descriptor and the segmented virtual address identifier in the segmented to linear virtual address conversion instruction in generating a virtual address in the linear virtual address space.

    摘要翻译: 处理器处理分段到线性虚拟地址转换指令,以将分段虚拟地址空间中的分段虚拟地址转换为线性虚拟地址空间中的线性虚拟地址。 分割的虚拟地址空间包括多个片段,每个片段由片段标识符标识,每个片段包括由页面标识符标识的至少一个页面。 线性虚拟地址空间包括由页面标识符标识的多个页面。 在处理分段到线性虚拟地址转换指令时,处理器使用多个分段到线性的虚拟地址转换描述符,每个分割到线性虚拟地址转换描述符与分段的虚拟地址空间中的一个页面相关联,每个划分为线性虚拟地址转换描述符, 线性虚拟地址空间中的一个页面。 分段到线性虚拟地址转换指令包括分段虚拟地址空间中的分段虚拟地址标识符。 在处理分段到线性虚拟地址转换指令时,处理器使用分段到线性虚拟地址转换指令中的分段虚拟地址标识符来选择分段到线性虚拟地址转换描述符之一。 在选择分段到线性虚拟地址转换描述符之后,处理器使用从所选择的分段到线性虚拟地址转换描述符的线性虚拟地址空间的页面标识符和分段到线性虚拟地址转换指令中的分段虚拟地址标识符,以生成 线性虚拟地址空间中的虚拟地址。

    Advice-based feedback for transactional execution
    54.
    发明授权
    Advice-based feedback for transactional execution 有权
    基于咨询的事务执行反馈

    公开(公告)号:US08281185B2

    公开(公告)日:2012-10-02

    申请号:US12494934

    申请日:2009-06-30

    IPC分类号: G06F11/00

    摘要: One embodiment provides a system that facilitates the execution of a transaction for a program in a hardware-supported transactional memory system. During operation, the system records a failure state of the transaction during execution of the transaction using hardware transactional memory mechanisms. Next, the system detects a transaction failure associated with the transaction. Finally, the system provides an advice state associated with the recorded failure state to the program to facilitate a response to the transaction failure by the program.

    摘要翻译: 一个实施例提供了一种便于在硬件支持的事务存储器系统中执行程序的事务的系统。 在操作期间,系统使用硬件事务存储器机制在执行事务期间记录事务的故障状态。 接下来,系统检测与事务相关联的事务失败。 最后,系统向程序提供与记录的故障状态相关联的建议状态,以便于程序对事务失败的响应。

    Partitioned Ticket Locks With Semi-Local Spinning
    55.
    发明申请
    Partitioned Ticket Locks With Semi-Local Spinning 有权
    半局部纺纱分区门锁

    公开(公告)号:US20120240126A1

    公开(公告)日:2012-09-20

    申请号:US13051877

    申请日:2011-03-18

    申请人: David Dice

    发明人: David Dice

    IPC分类号: G06F9/46

    CPC分类号: G06F9/526 G06F2209/522

    摘要: A partitioned ticket lock may control access to a shared resource, and may include a single ticket value field and multiple grant value fields. Each grant value may be the sole occupant of a respective cache line, an event count or sequencer instance, or a sub-lock. The number of grant values may be configurable and/or adaptable during runtime. To acquire the lock, a thread may obtain a value from the ticket value field using a fetch-and-increment type operation, and generate an identifier of a particular grant value field by applying a mathematical or logical function to the obtained ticket value. The thread may be granted the lock when the value of that grant value field matches the obtained ticket value. Releasing the lock may include computing a new ticket value, generating an identifier of another grant value field, and storing the new ticket value in the other grant value field.

    摘要翻译: 分区票锁可以控制对共享资源的访问,并且可以包括单个票证值字段和多个授权值字段。 每个授权值可以是相应的高速缓存行,事件计数或定序器实例或子锁的唯一占用者。 许可值的数量可以在运行时间内配置和/或适应。 为了获取锁,线程可以使用获取和增量类型操作从票值字段获得值,并且通过对获得的票值应用数学或逻辑函数来生成特定授权值字段的标识符。 当该授权值字段的值与获得的票值匹配时,线程可以被授予锁定。 释放锁可以包括计算新的票值,生成另一授​​权值字段的标识符,并将新的票值存储在另一授权值字段中。

    Facilitating transactional execution through feedback about misspeculation
    56.
    发明授权
    Facilitating transactional execution through feedback about misspeculation 有权
    通过关于错配的反馈促进交易执行

    公开(公告)号:US08225139B2

    公开(公告)日:2012-07-17

    申请号:US12493447

    申请日:2009-06-29

    IPC分类号: G06F9/00

    摘要: One embodiment provides a system that facilitates the execution of a transaction for a program in a hardware-supported transactional memory system. During operation, the system records a misspeculation indicator of the transaction during execution of the transaction using hardware transactional memory mechanisms. Next, the system detects a transaction failure associated with the transaction. Finally, the system provides the recorded misspeculation indicator to the program to facilitate a response to the transaction failure by the program.

    摘要翻译: 一个实施例提供了一种便于在硬件支持的事务存储器系统中执行程序的事务的系统。 在操作期间,系统使用硬件事务存储器机制在执行事务期间记录事务的错误指示符。 接下来,系统检测与事务相关联的事务失败。 最后,系统向程序提供记录的错误指示符,以便程序响应交易失败。

    METHOD AND SYSTEM FOR PROVIDING A CURRENT TIME VALUE
    57.
    发明申请
    METHOD AND SYSTEM FOR PROVIDING A CURRENT TIME VALUE 有权
    提供当前时间价值的方法和系统

    公开(公告)号:US20120084593A1

    公开(公告)日:2012-04-05

    申请号:US12898371

    申请日:2010-10-05

    IPC分类号: G06F1/04 G06F12/10

    CPC分类号: G06F1/14

    摘要: A method for providing applications with a current time value includes receiving a trap for an application to access a time memory page, creating, in a memory map corresponding to the application, a mapping between an address space of the application and the time memory page in response to the trap, accessing, based on the trap, a hardware clock to obtain a time value, and updating the time memory page with the time value. The application reads the time value from the time memory page using the memory map.

    摘要翻译: 用于向当前时间值提供应用的方法包括接收应用程序访问时间存储器页面的陷阱,在与应用程序相对应的存储器映射中创建应用程序的地址空间与时间存储器页面之间的映射 响应陷阱,根据陷阱访问硬件时钟以获取时间值,并使用时间值更新时间存储器页面。 应用程序使用存储器映射从时间存储器页面读取时间值。

    Adaptive spin-then-block mutual exclusion in multi-threaded processing
    58.
    发明授权
    Adaptive spin-then-block mutual exclusion in multi-threaded processing 有权
    多线程处理中自适应自旋随后块互斥

    公开(公告)号:US08046758B2

    公开(公告)日:2011-10-25

    申请号:US12554116

    申请日:2009-09-04

    申请人: David Dice

    发明人: David Dice

    IPC分类号: G06F9/46

    CPC分类号: G06F9/526 G06F9/461

    摘要: Adaptive modifications of spinning and blocking behavior in spin-then-block mutual exclusion include limiting spinning time to no more than the duration of a context switch. Also, the frequency of spinning versus blocking is limited to a desired amount based on the success rate of recent spin attempts. As an alternative, spinning is bypassed if spinning is unlikely to be successful because the owner is not progressing toward releasing the shared resource, as might occur if the owner is blocked or spinning itself. In another aspect, the duration of spinning is generally limited, but longer spinning is permitted if no other threads are ready to utilize the processor. In another aspect, if the owner of a shared resource is ready to be executed, a thread attempting to acquire ownership performs a “directed yield” of the remainder of its processing quantum to the other thread, and execution of the acquiring thread is suspended.

    摘要翻译: 旋转和阻塞互斥中的旋转和阻塞行为的自适应修改包括将旋转时间限制为不超过上下文切换的持续时间。 此外,基于最近的旋转尝试的成功率,旋转与阻塞的频率被限制到期望的量。 作为替代方案,如果旋转不太可能成功,则旋转是绕过的,因为所有者不会在释放共享资源方面发展,如果所有者被阻塞或旋转本身,则会发生旋转。 在另一方面,旋转的持续时间通常是有限的,但如果没有其他线程准备好利用处理器,则允许更长的旋转。 在另一方面,如果共享资源的所有者准备好被执行,则尝试获得所有权的线程向其他线程执行其处理量子剩余部分的“定向收益”,并且暂停执行获取线程。

    Method and apparatus for switching between per-thread and per-processor resource pools in multi-threaded programs
    59.
    发明授权
    Method and apparatus for switching between per-thread and per-processor resource pools in multi-threaded programs 有权
    用于在多线程程序中在每线程和每处理器资源池之间切换的方法和装置

    公开(公告)号:US07882505B2

    公开(公告)日:2011-02-01

    申请号:US11090398

    申请日:2005-03-25

    IPC分类号: G06F9/46 G06F13/00

    CPC分类号: G06F9/5016 G06F2209/507

    摘要: In a multi-processor multi-threaded computer system, resources are dynamically assigned during program operation to either threads or processors in such a manner that resource usage is maximized. In one embodiment, the choice of whether to assign resources to threads or processors is dependent on the number of threads versus the number of processors. In another embodiment, when the system is operating in one assignment mode, the amount of wasted resources is measured and when this measured amount exceeds a predetermined threshold based on the maximum resources that could be wasted were the system operating in the other assignment mode, the assignment is switched to the other assignment mode.

    摘要翻译: 在多处理器多线程计算机系统中,在程序操作期间以资源使用最大化的方式将资源动态地分配给线程或处理器。 在一个实施例中,是否向线程或处理器分配资源的选择取决于线程的数量与处理器的数量。 在另一个实施例中,当系统在一个分配模式下操作时,测量浪费的资源量,并且当系统以另一分配模式运行时,基于可浪费的最大资源,该测量量超过预定阈值时, 分配切换到其他分配模式。

    Methods and apparatus providing non-blocking access to a resource
    60.
    发明授权
    Methods and apparatus providing non-blocking access to a resource 有权
    向资源提供非阻塞访问的方法和设备

    公开(公告)号:US07844973B1

    公开(公告)日:2010-11-30

    申请号:US11008500

    申请日:2004-12-09

    申请人: David Dice

    发明人: David Dice

    CPC分类号: G06F9/52

    摘要: A system to control access to a resource by a group of threads requiring access to the resource provides exclusive access to the resource within a computerized device on behalf of a first thread by allowing the first thread exclusive access of a monitor associated with the resource. An entry list of threads is maintained that are awaiting access to the monitor using block-free list joining mechanisms including a thread chaining technique, a push/pop technique, and a detach, modify, reattach technique to allow threads to join the entry list of threads without blocking operation of the threads. Upon completion of access to the resource by the first thread, the system operates the first thread to manipulate the entry list of threads to identify a successor thread as being a candidate thread to obtain exclusive access of the monitor to gain exclusive access to the resource.

    摘要翻译: 通过允许访问资源的线程组来控制对资源的访问的系统通过允许与资源相关联的监视器的第一线程独占访问来代表第一线程提供对计算机化设备内的资源的独占访问。 维护线程的条目列表,其等待使用无块列表连接机制访问监视器,包括线程链接技术,推/弹技术以及分离,修改,重新连接技术,以允许线程加入条目列表 线程无阻塞线程操作。 在完成由第一线程对资源的访问之后,系统操作第一线程以操纵线程的入口列表,以将后续线程标识为候选线程,以获得监视器的独占访问以获得对资源的独占访问。