公开(公告)号：US07245638B2

公开(公告)日：2007-07-17

申请号：US10085071

申请日：2002-03-01

Applicant: Oscar Agazzi ,  Venugopal Gopinathan

Inventor： Oscar Agazzi ,  Venugopal Gopinathan

IPC: H04J3/06

CPC classification number: H04L25/03006 ,  H03M1/0604 ,  H03M1/0607 ,  H03M1/0609 ,  H03M1/0624 ,  H03M1/0836 ,  H03M1/1215 ,  H04B10/6933 ,  H04B10/697 ,  H04B10/6971 ,  H04L7/0054 ,  H04L7/0062 ,  H04L7/0337 ,  H04L25/03057 ,  H04L25/03133 ,  H04L25/03159 ,  H04L25/03203 ,  H04L2025/03445

Abstract: Digital signal processing based methods and systems for receiving data signals include parallel receivers, multi-channel receivers, timing recovery schemes, and, without limitation, equalization schemes. The present invention is implemented as a multi-path parallel receiver in which an analog-to-digital converter (“ADC”) and/or a digital signal processor (“DSP”) are implemented with parallel paths that operate at lower rates than the received data signal. In an embodiment, a parallel DSP-based receiver in accordance with the invention includes a separate timing recovery loop for each ADC path. In an embodiment, a parallel DSP-based receiver includes a separate automatic gain control (AGC) loop for each ADC path. In an embodiment, a parallel DSP-based receiver includes a separate offset compensation loop for each ADC path. In an embodiment the present invention is implemented as a multi-channel receiver that receives a plurality of data signals.

Abstract translation: 用于接收数据信号的基于数字信号处理的方法和系统包括并行接收机，多信道接收机，定时恢复方案，并且不限于均衡方案。 本发明被实现为多路径并行接收机，其中使用平行路径来实现模数转换器（“ADC”）和/或数字信号处理器（“DSP”），该路径以比 接收数据信号。 在一个实施例中，根据本发明的基于并行DSP的接收机包括用于每个ADC路径的单独的定时恢复环路。 在一个实施例中，并行基于DSP的接收机包括用于每个ADC路径的单独的自动增益控制（AGC）环路。 在一个实施例中，并行基于DSP的接收机包括用于每个ADC路径的单独的偏移补偿环路。 在一个实施例中，本发明被实现为接收多个数据信号的多信道接收机。

公开(公告)号：US20070086792A1

公开(公告)日：2007-04-19

申请号：US11512602

申请日：2006-08-29

Applicant: Zvi Regev

Inventor： Zvi Regev

IPC: H04B10/06

CPC classification number: H04B10/66 ,  H04B10/697 ,  H04L25/0272 ,  H04L25/0292

Abstract: A data communication device adapted to receive a data stream includes positive feedback. The positive feedback allows the data communication device to operate with a bi-stable operating characteristic. Consequently the data communication device exhibits superior rejection of signal input noise and reduced chatter. According to various embodiments, the data communication device includes a plurality of component devices having dc coupling therebetween.

Abstract translation: 适于接收数据流的数据通信设备包括正反馈。 正反馈允许数据通信设备以双稳态工作特性运行。 因此，数据通信设备表现出优异的信号输入噪声抑制和减少的抖动。 根据各种实施例，数据通信设备包括其间具有直流耦合的多个组件设备。

公开(公告)号：US20060132789A1

公开(公告)日：2006-06-22

申请号：US11340880

申请日：2006-01-26

Applicant: Carl Davidson ,  Robert Cordell ,  Yi Cai ,  Hongbin Zhang

Inventor： Carl Davidson ,  Robert Cordell ,  Yi Cai ,  Hongbin Zhang

IPC: G01B9/02

CPC classification number: H04B10/25133 ,  H04B10/07951 ,  H04B10/2513 ,  H04B10/697 ,  H04J14/02

Abstract: A system and method for optimizing dispersion in an optical transmission line is provided. The system and method comprise measuring the amplitude of a d.c. voltage component of a synchronously demodulated data signal of at least one wavelength channel by an in-phase carrier at the baud frequency of the wavelength channel. In an alternative embodiment, the system and method comprise measuring the IF amplitude of the resulting a.c. signal of a data signal of the at least one wavelength channel comprising a received RZ signal mixed with a local oscillator, whose frequency differs from the wavelength channel baud by a relatively small amount, somewhere on the order of about 100 kHz.

Abstract translation: 提供了一种用于优化光传输线中的色散的系统和方法。 该系统和方法包括测量直流的振幅。 通过同相载波在波长信道的波特率下的至少一个波长信道的同步解调数据信号的电压分量。 在替代实施例中，系统和方法包括测量所产生的交流电的IF幅度。 所述至少一个波长信道的数据信号的信号包括与本地振荡器混合的接收到的RZ信号，所述本地振荡器的频率与波长信道波特相差相对较小的量，约为100kHz的数量级。

公开(公告)号：US06748173B2

公开(公告)日：2004-06-08

申请号：US09757254

申请日：2001-01-09

Applicant: Yoshikazu Ishii ,  Susumu Kirii ,  Hideto Takahashi ,  Kuniharu Itakura ,  Shinshi Kuno

Inventor： Yoshikazu Ishii ,  Susumu Kirii ,  Hideto Takahashi ,  Kuniharu Itakura ,  Shinshi Kuno

IPC: H04J1402

CPC classification number: H04B10/697

Abstract: Optical transmission being performed by frequency modulating frequency-division-multiplexed multi-channel signals as a single unit, distortion that is caused by a ripple-shaped group delay deviation in a transmitter 2, a receiver 4 and an optical link 3 is reduced by providing a level adjuster 2a for adjusting the level of frequency-division-multiplexed multi-channel signals input to the FM modulator 2b, and by increasing the input level of multi-channel signals to the FM modulator 2b by level adjusting means 2a to enlarge the bandwidth of FM signal, in the case where the number of channels is small.

Abstract translation: 通过频率调制分频多路复用多通道信号作为单个单元执行光传输，通过提供发射机2，接收机4和光链路3中的波纹状组延迟偏差引起的失真减少 电平调节器2a，用于调节输入到FM调制器2b的分频多路复用多通道信号的电平，以及通过电平调整装置2a将调制器2b的多声道信号的输入电平增大到放大带宽 的FM信号，在通道数量少的情况下。

公开(公告)号：US20040047283A1

公开(公告)日：2004-03-11

申请号：US10241052

申请日：2002-09-10

Inventor： Mark Henry Bonwick ,  Steve Winnall ,  Brian Robert Brown ,  Michael Hudson ,  Ross Halgren

IPC: H04J001/12

CPC classification number: H04B10/69 ,  H04B10/697 ,  H04B10/85 ,  H04J14/02 ,  H04L5/06

Abstract: A method of cancelling crosstalk between a primary and a secondary signals contained in a FDM signal, wherein the primary signal comprises a binary encoded signal and the secondary signal has a lower signal amplitude than the primary signal, the method comprising the steps of (a) applying 2R and/or 3R regeneration to a primary signal recovery portion of the FDM signal for obtaining an estimate of the primary signal, and (b) utilising at least a portion of the estimated primary signal to substantially remove a primary signal contribution in a secondary signal recovery portion of the FDM signal for recovering the secondary signal.

Abstract translation: 一种消除包含在FDM信号中的主信号和次信号之间的串扰的方法，其中主信号包括二进制编码信号，次信号具有比主信号更低的信号幅度，该方法包括以下步骤：（a） 将2R和/或3R再生应用于FDM信号的主信号恢复部分，以获得主信号的估计，以及（b）利用估计的主信号的至少一部分来基本上去除二次信号中的主信号贡献 用于恢复二次信号的FDM信号的信号恢复部分。

公开(公告)号：US20030122057A1

公开(公告)日：2003-07-03

申请号：US10283946

申请日：2002-10-30

Inventor： Jin-Soo Han ,  Moo-Jung Chu ,  Jong-Hyun Lee

IPC: H01J040/14

CPC classification number: H04B10/697

Abstract: Provided are an optical signal receiving apparatus whose optimum receiving performance is maintained regardless of a change in the power of an optical signal, and a method using the same. The apparatus includes an optical coupler for dividing an input optical signal at a predetermined ratio to produce first and second divided signals, a photoelectric converter for converting the first divided signal into an electric signal, an amplifier for amplifying the electric signal within a predetermined range centering on a reference voltage, a reference voltage controlling unit for detecting the power of the second divided signal, predicting the power of the first divided signal, and controlling the amplitude of the reference voltage in accordance with the predicted power, and a clock & data recovery unit for recovering a clock signal and data from a signal output from the amplifier. Even if the power of an optical signal changes, the reference voltage of a limiting amplifier, which is best suitable for optimum performance with respect to the power of an input optical signal, can be detected and adjusted using the method and apparatus, thereby maintaining the optimum receiving performance of the optical signal receiving apparatus.

Abstract translation: 提供了一种光信号接收装置及其使用方法的光接收装置，其优良的接收性能被保持，而与光信号的功率的变化无关。 该装置包括用于以预定比例分割输入光信号以产生第一和第二分频信号的光耦合器，用于将第一划分信号转换为电信号的光电转换器，用于在预定范围内放大电信号的放大器对中 在参考电压上，参考电压控制单元，用于检测第二分频信号的功率，预测第一分频信号的功率，并根据预测功率控制参考电压的振幅;以及时钟和数据恢复 用于从放大器输出的信号中恢复时钟信号和数据的单元。 即使光信号的功率发生变化，也可以使用该方法和装置来检测和调整限制放大器的参考电压，该极限放大器最适合于对于输入光信号的功率的最佳性能，从而保持 光信号接收装置的最佳接收性能。

公开(公告)号：US06548802B2

公开(公告)日：2003-04-15

申请号：US09838912

申请日：2001-04-20

Applicant: Mohan Gurunathan ,  Zoltan D. Azary ,  Greg C. Richtenburg

Inventor： Mohan Gurunathan ,  Zoltan D. Azary ,  Greg C. Richtenburg

IPC: H01J4014

CPC classification number: H04B10/697

Abstract: A zero calibration system and method for an optical receiver include an illuminated photodetector, switchably coupled to an amplifier. The photodetector is de-coupled from the amplifier while illumination of the photodetector is maintained and an error signal is measured at the output of the amplifier The photodetector is then coupled to the amplifier and subsequent signals measured at the output of the amplifier are corrected according to the measured error signal, based on a comparison of the relative values of a feedback resistor, coupled between the output and an input of the amplifier, and an equivalent resistance of the photodetector. When the ratio of the feedback resistor to the equivalent resistance does not exceed a predetermined threshold, the subsequently measured signals at the output of the amplifier are corrected by offsetting the subsequently measured signals by the measured error signal. When the ratio exceeds the predetermined threshold, the subsequently measured signals at the output of the amplifier are corrected by offsetting the subsequently measured signals by the measured error signal as modified by a correction factor.

公开(公告)号：US20020080898A1

公开(公告)日：2002-06-27

申请号：US10085071

申请日：2002-03-01

Applicant: Broadcom Incorporated

Inventor： Oscar Agazzi ,  Venugopal Gopinathan

IPC: H04L007/00

CPC classification number: H04L25/03006 ,  H03M1/0604 ,  H03M1/0607 ,  H03M1/0609 ,  H03M1/0624 ,  H03M1/0836 ,  H03M1/1215 ,  H04B10/6933 ,  H04B10/697 ,  H04B10/6971 ,  H04L7/0054 ,  H04L7/0062 ,  H04L7/0337 ,  H04L25/03057 ,  H04L25/03133 ,  H04L25/03159 ,  H04L25/03203 ,  H04L2025/03445

Abstract: Digital signal processing based methods and systems for receiving data signals include parallel receivers, multi-channel receivers, timing recovery schemes, and, without limitation, equalization schemes. The present invention is implemented as a multi-path parallel receiver in which an analog-to-digital converter (nullADCnull) and/or a digital signal processor (nullDSPnull) are implemented with parallel paths that operate at lower rates than the received data signal. In an embodiment, a parallel DSP-based receiver in accordance with the invention includes a separate timing recovery loop for each ADC path. The separate timing recovery loops can be used to compensate for timing phase errors in the clock generation circuit that are different for each path. In an embodiment, a parallel DSP-based receiver includes a separate automatic gain control (AGC) loop for each ADC path. The separate AGC loops can be used to compensate for gain errors on a path-by-path basis. In an embodiment, a parallel DSP-based receiver includes a separate offset compensation loop for each ADC path. The separate offset compensation loops can be used to independently compensate for offsets that are different for each path. In an embodiment the present invention is implemented as a multi-channel receiver that receives a plurality of data signals. In an embodiment, one or more of the following types of equalization are performed, alone and/or in various combinations with one another: Viterbi equalization; feed-forward equalization (nullFFEnull); and/or decision feed-back equalization (nullDFEnull).

Abstract translation: 用于接收数据信号的基于数字信号处理的方法和系统包括并行接收机，多信道接收机，定时恢复方案，并且不限于均衡方案。 本发明被实现为多路径并行接收机，其中使用平行路径来实现模数转换器（“ADC”）和/或数字信号处理器（“DSP”），该路径以比 接收数据信号。 在一个实施例中，根据本发明的基于并行DSP的接收机包括用于每个ADC路径的单独的定时恢复环路。 单独的定时恢复环路可用于补偿时钟发生电路中针对每个路径不同的定时相位误差。 在一个实施例中，并行基于DSP的接收机包括用于每个ADC路径的单独的自动增益控制（AGC）环路。 单独的AGC环路可用于补偿逐个路径上的增益误差。 在一个实施例中，并行基于DSP的接收机包括用于每个ADC路径的单独的偏移补偿环路。 单独的偏移补偿回路可用于独立补偿每个路径不同的补偿。 在一个实施例中，本发明被实现为接收多个数据信号的多信道接收机。 在一个实施例中，独立地和/或彼此以各种组合执行以下类型的均衡中的一个或多个：维特比均衡; 前馈均衡（“FFE”）; 和/或判决反馈均衡（“DFE”）。

公开(公告)号：US06410902B1

公开(公告)日：2002-06-25

申请号：US09214405

申请日：1998-12-18

Applicant: Kazuya Matsumoto

Inventor： Kazuya Matsumoto

IPC: H01J4014

CPC classification number: H04B10/697 ,  H03F1/565 ,  H03F3/087 ,  H03F2200/534

Abstract: In order to compensate for deterioration in gain caused by decreases in signal source impedance on a higher frequency region, a frequency characteristic compensating inductor is inserted between a light-receiving device and its bias power supply. The light-receiving device is connected to the bias power supply by way of the inductor. By causing the resonance frequency determined by the inductor and the parasitic capacitance and junction capacitance of device to coincide in the vicinity of the upper limit frequency of the band of the optical receiver, the equivalent signal source impedance of the light-receiving device can be enhanced, thus compensating for the decrease in gain of the receiver.

Abstract translation: 为了补偿由于较高频率区域的信号源阻抗的降低引起的增益的劣化，频率特性补偿电感器被插入在光接收装置与其偏置电源之间。 光接收装置通过电感器连接到偏置电源。 通过使由电感器确定的谐振频率和器件的寄生电容和结电容在光接收器的频带的上限频率附近重合，可以增强光接收装置的等效信号源阻抗 ，从而补偿接收机的增益降低。

公开(公告)号：US20020012152A1

公开(公告)日：2002-01-31

申请号：US09909896

申请日：2001-07-23

Applicant: Broadcom Corporation

Inventor： Oscar Agazzi ,  Venugopal Gopinathan

IPC: H04B010/08 ,  H04B010/06

CPC classification number: H04B10/6971 ,  H03M1/0604 ,  H03M1/0607 ,  H03M1/0624 ,  H03M1/0836 ,  H03M1/1215 ,  H04B10/6933 ,  H04B10/697 ,  H04L7/0062 ,  H04L25/03057 ,  H04L25/03159 ,  H04L2025/03445

Abstract: Digital signal processing based methods and systems for receiving electrical and/or optical data signals include electrical receivers, optical receivers, parallel receivers, multi-channel receivers, timing recovery schemes, and, without limitation, equalization schemes. The present invention is implemented as a single path receiver. Alternatively, the present invention is implemented as a multi-path parallel receiver in which an analog-to-digital converter (nullADCnull) and/or a digital signal processor (nullDSPnull) are implemented with parallel paths that operate at lower rates than the received data signal. In an embodiment, a parallel DSP-based receiver in accordance with the invention includes a separate timing recovery loop for each ADC path. The separate timing recovery loops can be used to compensate for timing phase errors in the clock generation circuit that are different for each path. In an embodiment, a parallel DSP-based receiver includes a separate automatic gain control (AGC) loop for each ADC path. The separate AGC loops can be used to compensate for gain errors on a path-by-path basis. In an embodiment, a parallel DSP-based receiver includes a separate offset compensation loop for each ADC path. The separate offset compensation loops can be used to independently compensate for offsets that are different for each path. In an embodiment the present invention is implemented as a multi-channel receiver that receives a plurality of data signals. In an embodiment, a receiver performs DSP-based equalization on electrical data signals and/or on electrical representations of optical data signals. Equalization is performed in single path receivers and parallel multi-path receivers, on electrical data signals and/or optical data signals. One or more of the following types of equalization are performed, alone and/or in various combinations with one another: Viterbi equalization; feed-forward equalization (nullFFEnull); and/or decision feed-back equalization (nullDFE,null).