公开(公告)号：US10859379B2

公开(公告)日：2020-12-08

申请号：US15683186

申请日：2017-08-22

Applicant: STMicroelectronics, Inc.

Inventor： Dominique Paul Barbier

IPC: G01C21/12 ,  G01C21/28

Abstract: In an embodiment, a method for determining a speed of a vehicle in a dead-reckoning system includes measuring a centripetal acceleration, using an accelerometer, of the vehicle traversing a curved path on a plane of travel. The method also includes measuring an angular velocity, using a gyroscope, of the vehicle. The speed of the vehicle is calculated from the centripetal acceleration and the angular velocity.

公开(公告)号：US10759168B2

公开(公告)日：2020-09-01

申请号：US16357077

申请日：2019-03-18

Applicant: STMICROELECTRONICS, INC. ,  STMICROELECTRONICS INTERNATIONAL N.V. ,  STMICROELECTRONICS S.R.L.

Inventor： Simon Dodd ,  David S. Hunt ,  Joseph Edward Scheffelin ,  Dana Gruenbacher ,  Stefan H. Hollinger ,  Uwe Schober ,  Peter Janouch

IPC: B41J2/14 ,  B41J2/175

Abstract: The present disclosure provides supports for microfluidic die that allow for nozzles of the microfluidic die to be on a different plane or face a different direction from electrical contacts on the same support. This includes a rigid support having electrical contacts on a different side of the rigid support with respect to a direction of ejection of the nozzles, and a semi-flexible support or semi-rigid support that allow the electrical contacts to be moved with respect to a direction of ejection of the nozzles. The semi-flexible and semi-rigid supports allow the die to be up to and beyond a 90 degree angle with respect to a plane of the electrical contacts. The different supports allow for a variety of positions of the microfluidic die with respect to a position of the electrical contacts.

公开(公告)号：US10734504B2

公开(公告)日：2020-08-04

申请号：US16020475

申请日：2018-06-27

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION ,  STMicroelectronics, Inc.

Inventor： Bruce B. Doris ,  Hong He ,  Nicolas J. Loubet ,  Junli Wang

IPC: H01L21/336 ,  H01L29/66 ,  H01L29/78 ,  H01L21/265 ,  H01L21/8238 ,  H01L27/092 ,  H01L29/10 ,  H01L29/165 ,  H01L29/423

Abstract: A method of forming a finFET transistor device includes forming a crystalline, compressive strained silicon germanium (cSiGe) layer over a substrate; masking a first region of the cSiGe layer so as to expose a second region of the cSiGe layer; subjecting the exposed second region of the cSiGe layer to an implant process so as to amorphize a bottom portion thereof and transform the cSiGe layer in the second region to a relaxed SiGe (rSiGe) layer; performing an annealing process so as to recrystallize the rSiGe layer; epitaxially growing a tensile strained silicon layer on the rSiGe layer; and patterning fin structures in the tensile strained silicon layer and in the first region of the cSiGe layer.

公开(公告)号：US10700194B2

公开(公告)日：2020-06-30

申请号：US16026663

申请日：2018-07-03

Applicant: STMicroelectronics, Inc.

Inventor： Qing Liu ,  John H. Zhang

IPC: H01L29/78 ,  H01L29/66 ,  H01L29/165 ,  H01L29/267 ,  H01L29/739 ,  H01L27/092 ,  H01L29/16 ,  H01L21/8234 ,  H01L29/49 ,  H01L29/51 ,  H01L21/8238

Abstract: A tunneling transistor is implemented in silicon, using a FinFET device architecture. The tunneling FinFET has a non-planar, vertical, structure that extends out from the surface of a doped drain formed in a silicon substrate. The vertical structure includes a lightly doped fin defined by a subtractive etch process, and a heavily-doped source formed on top of the fin by epitaxial growth. The drain and channel have similar polarity, which is opposite that of the source. A gate abuts the channel region, capacitively controlling current flow through the channel from opposite sides. Source, drain, and gate terminals are all electrically accessible via front side contacts formed after completion of the device. Fabrication of the tunneling FinFET is compatible with conventional CMOS manufacturing processes, including replacement metal gate and self-aligned contact processes. Low-power operation allows the tunneling FinFET to provide a high current density compared with conventional planar devices.

公开(公告)号：US10672689B2

公开(公告)日：2020-06-02

申请号：US16460704

申请日：2019-07-02

Applicant: STMICROELECTRONICS, INC.

Inventor： Frederick Ray Gomez ,  Tito Mangaoang, Jr. ,  Jefferson Talledo

IPC: H01L23/495 ,  H01L21/56 ,  H01L21/48 ,  H01L23/60 ,  H01L23/31 ,  H01L23/00 ,  H01L21/66

Abstract: According to principles of the disclosure as explained herein, selected leads are electrically connected through metal strips to the lead frame until the end of the manufacturing process. The lead frame is grounded through the manufacturing process to prevent any ESD event from causing damage to the protected leads. In the final singulation step, the leads are electrically isolated from each other and from the lead frame, thus maintaining protection from a potential ESD event up until the final package singulation step.

公开(公告)号：US10593780B2

公开(公告)日：2020-03-17

申请号：US15222261

申请日：2016-07-28

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION ,  GLOBALFOUNDRIES INC. ,  STMicroelectronics, Inc.

Inventor： Xiuyu Cai ,  Chun-Chen Yeh ,  Qing Liu ,  Ruilong Xie

IPC: H01L21/768 ,  H01L29/78 ,  H01L29/66 ,  H01L29/417 ,  H01L29/06 ,  H01L29/08 ,  H01L29/161 ,  H01L29/165

Abstract: A semiconductor device that a fin structure, and a gate structure present on a channel region of the fin structure. A composite spacer is present on a sidewall of the gate structure including an upper portion having a first dielectric constant, a lower portion having a second dielectric constant that is less than the first dielectric constant, and an etch barrier layer between sidewalls of the first and second portion of the composite spacer and the gate structure. The etch barrier layer may include an alloy including at least one of silicon, boron and carbon.

公开(公告)号：US20200080843A1

公开(公告)日：2020-03-12

申请号：US16686091

申请日：2019-11-15

Applicant: STMicroelectronics, Inc.

Inventor： Mahesh CHOWDHARY

IPC: G01C19/32 ,  G01C19/5776

Abstract: A sensor chip includes registers storing and outputting configuration data, an extraction circuit receiving digital data and extracting features of the digital data in accordance with the configuration data, and a classification circuit applying a decision tree to the extracted features to generate a context of an electronic device into which the sensor chip is incorporated relative to its surroundings, the decision tree operating according to the configuration data. The classification unit outputs the context to the registers for storage. The configuration data includes which features for the extraction circuit to extract from the digital data, and a structure for the decision tree. The structure for the decision tree includes conditions that the decision tree is to apply to the at least one extracted feature, and outcomes to be effectuated based upon whether the extracted features meet or do not meet the conditions.

公开(公告)号：US10546789B2

公开(公告)日：2020-01-28

申请号：US14986229

申请日：2015-12-31

Applicant: STMicroelectronics, Inc.

Inventor： John H. Zhang ,  Chengyu Niu ,  Heng Yang

IPC: H01L21/70 ,  H01L21/8238 ,  H01L29/423 ,  H01L29/49 ,  H01L21/28 ,  H01L29/78 ,  H01L21/285 ,  H01L29/417 ,  H01L29/66 ,  H01L27/092

Abstract: Methods and devices for enhancing mobility of charge carriers. An integrated circuit may include semiconductor devices of two types. The first type of device may include a metallic gate and a channel strained in a first manner. The second type of device may include a metallic gate and a channel strained in a second manner. The gates may include, collectively, three or fewer metallic materials. The gates may share a same metallic material. A method of forming the semiconductor devices on an integrated circuit may include depositing first and second metallic layers in first and second regions of the integrated circuit corresponding to the first and second gates, respectively.

公开(公告)号：US10546743B2

公开(公告)日：2020-01-28

申请号：US15874654

申请日：2018-01-18

Applicant: STMicroelectronics, Inc. ,  International Business Machines Corporation

Inventor： John H. Zhang ,  Yann Mignot ,  Lawrence A. Clevenger ,  Carl Radens ,  Richard Stephen Wise ,  Yiheng Xu ,  Yannick Loquet ,  Hsueh-Chung Chen

IPC: H01L21/02 ,  H01L23/522 ,  H01L23/532 ,  H01L21/311 ,  H01L21/768

Abstract: Ultra-low-k dielectric materials used as inter-layer dielectrics in high-performance integrated circuits are prone to be structurally unstable. The Young's modulus of such materials is decreased, resulting in porosity, poor film strength, cracking, and voids. An alternative dual damascene interconnect process incorporates air gaps into a high modulus dielectric material to maintain structural stability while reducing capacitance between adjacent nanowires. Incorporation of an air gap having k=1.0 compensates for the use of a higher modulus film having a dielectric constant greater than the typical ultra-low-k (ULK) dielectric value of about 2.2. The higher modulus film containing the air gap is used as an insulator between adjacent metal lines, while a ULK film is retained to insulate vias. The dielectric layer between two adjacent metal lines thus forms a ULK/high-modulus dielectric bi-layer.

公开(公告)号：US10543504B2

公开(公告)日：2020-01-28

申请号：US15636491

申请日：2017-06-28

Applicant: STMicroelectronics, Inc. ,  STMICROELECTRONICS S.R.L. ,  STMicroelectronics International N.V.

Inventor： Simon Dodd ,  Joe Scheffelin ,  Dave Hunt ,  Matt Giere ,  Dana Gruenbacher ,  Faiz Sherman

IPC: B05B17/06 ,  H05K1/02 ,  H05K1/11 ,  H05K1/18 ,  B41J2/14 ,  B05B17/00 ,  B41J2/175 ,  B41J2/16

Abstract: A microfluidic die is disclosed that includes a plurality of heaters above a substrate, a plurality of chambers and nozzles above the heaters, a plurality of first contacts coupled to the heaters, and a plurality of second contacts coupled to the heaters. The plurality of second contacts are coupled to each other and coupled to ground. The die includes a plurality of contact pads, a first signal line coupled to the plurality of second contacts and to a first one of the plurality of contact pads, and a plurality of second signal lines, each second signal line being coupled to one of the plurality of first contacts, groups of the second signal lines being coupled together to drive a group of the plurality of heaters with a single signal, each group of the second signal lines being coupled to a remaining one of the plurality of contact pads.