公开(公告)号：US10531132B2

公开(公告)日：2020-01-07

申请号：US15856509

申请日：2017-12-28

Applicant: STMicroelectronics International N.V. ,  STMicroelectronics, Inc.

Inventor： Udit Kumar ,  Bharat Jauhari ,  Chandandeep Singh Pabla

IPC: H04N21/438 ,  H04N21/234 ,  H04N21/44 ,  H04N5/44 ,  H04N21/433 ,  H04N21/434 ,  H04N21/482

Abstract: A channel stream is received and demultiplexed into a video packetized elementary stream (PES), audio packetized elementary stream (PES), and program clock reference (PCR). Indexing circuitry stores the video PES and the audio PES in a buffer, locates a presentation time stamp (PTS) in the video PES and stores that PTS in the buffer, locates a start of each group of pictures (GOP) in the video PES and stores those locations in the buffer, and locates a PTS in the audio PES and stores that PTS in the buffer. Control circuitry empties the buffer of an oldest GOP in the video PES if the PCR is greater than the PTS of a second oldest GOP stored in the buffer, and empties the buffer of each PES packet of the audio PES that has a PTS that is less than the PTS of the oldest GOP stored.

公开(公告)号：US10520552B2

公开(公告)日：2019-12-31

申请号：US15455321

申请日：2017-03-10

Applicant: STMicroelectronics, Inc. ,  STMicroelectronics International N.V.

Inventor： K. R. Hariharasudhan ,  Frank J. Sigmund

IPC: G01R31/36 ,  G01R31/367 ,  G01R31/3842

Abstract: An electronic device includes a processor coupled to a battery and to determine whether the battery is being charged or discharged. If the battery being is being discharged, the processor operates to calculate an amount by which the battery has discharged since a preceding calculation of remaining capacity of the battery, compensate the amount by which the battery has discharged for a condition of the battery, and calculate a remaining capacity of the battery as a function of the amount by which the battery has discharged. If the battery is being charged, the processor operates to calculate an amount by which the battery has charged since a preceding calculation of remaining capacity of the battery, compensate the amount by which the battery has charged for a condition of the battery, and calculate the remaining capacity of the battery as a function of the amount by which the battery has charged.

公开(公告)号：US20190342960A1

公开(公告)日：2019-11-07

申请号：US16514275

申请日：2019-07-17

Applicant: STMicroelectronics International N.V.

Inventor： Akshat JAIN ,  Ranajay MALLIK

IPC: H05B33/08 ,  H02M1/08 ,  H02M3/156

Abstract: A circuit includes a voltage converter converting a source voltage to a supply voltage at a first node as a function of a feedback voltage at a feedback node. A first output path is coupled between the first node and a second node. Feedback circuitry compares the voltage at the second node to first and second overvoltages, and selectively couples the second node to the feedback node based thereupon. Impedance circuitry is coupled between the first node and a third node. A light emitting diode (LED) chain is coupled to the third node, and is selectively turned on and off as a function of the selective coupling of the second node to the feedback node by the feedback circuitry.

公开(公告)号：US20190319454A1

公开(公告)日：2019-10-17

申请号：US15952466

申请日：2018-04-13

Applicant: STMicroelectronics International N.V. ,  STMicroelectronics SA

Inventor： Radhakrishnan SITHANANDAM ,  Divya AGARWAL ,  Jean JIMENEZ ,  Malathi KAR

IPC: H02H9/04 ,  H01L27/02 ,  H01L27/07

Abstract: Electrostatic discharge (ESD) protection is provided in using a supply clamp circuit using an ESD event actuated SCR device. The SCR device may include an embedded field effect transistor (FET) having an insulated gate that receives a trigger signal from an ESD detection circuit. The SCR device may alternatively include a variable substrate resistor having an insulated gate that receives a trigger signal from an ESD detection circuit.

公开(公告)号：US20190288693A1

公开(公告)日：2019-09-19

申请号：US15924584

申请日：2018-03-19

Applicant: STMicroelectronics International N.V.

Inventor： Nitin Gupta ,  Jeet Narayan Tiwari

IPC: H03L7/07 ,  H03L7/095 ,  H03L7/099

Abstract: Disclosed is a method of locking a locked loop quickly, including receiving an input signal having an input frequency, and generating an intermediate signal having an intermediate frequency intended to be equal to a geometric mean of the input frequency and a desired frequency, but not equal. Results of division of the desired output frequency by the intermediate frequency are estimated, producing a first divider value. A first locked loop utilizing a controllable oscillator is activated. A divider value of the first locked loop is set to the first divider value, and the intermediate signal is provided to the first locked loop, so that when the first locked loop reaches lock, the controllable oscillator produces the desired frequency. When the first locked loop reaches lock, a second locked loop that utilizes the controllable oscillator is activated, the first locked loop is deactivated, and generation of the intermediate signal is ceased.

公开(公告)号：US10405384B2

公开(公告)日：2019-09-03

申请号：US16106593

申请日：2018-08-21

Applicant: STMicroelectronics International N.V.

Inventor： Akshat Jain ,  Ranajay Mallik

IPC: H05B33/08 ,  H02M3/15 ,  H02M1/08 ,  H02M3/156 ,  H02M1/00

Abstract: A circuit includes a voltage converter converting source voltage to supply voltage at a first node as a function of a feedback voltage at a feedback node. A first output path is coupled between first and second node nodes. Feedback circuitry couples the second node to the feedback node when a voltage at the second node exceeds a first overvoltage, in a first mode of operation. The feedback circuitry couples the second node to the feedback node when the voltage at the second node exceeds a second overvoltage less than the first overvoltage, in a second mode of operation. Impedance circuitry is coupled between the first node and a third node and generates an auxiliary supply voltage and an auxiliary ground voltage when the circuit is in both the first and second modes, the auxiliary supply voltage being less than the supply voltage in both the first and second modes.

公开(公告)号：US20190266485A1

公开(公告)日：2019-08-29

申请号：US16280960

申请日：2019-02-20

Applicant: STMICROELECTRONICS S.R.L. ,  STMICROELECTRONICS INTERNATIONAL N.V.

Inventor： Surinder Pal SINGH ,  Giuseppe DESOLI ,  Thomas BOESCH

IPC: G06N3/08 ,  G06N20/00 ,  G06F17/11

Abstract: Embodiments of a device include an integrated circuit, a reconfigurable stream switch formed in the integrated circuit, and an arithmetic unit coupled to the reconfigurable stream switch. The arithmetic unit has a plurality of inputs and at least one output, and the arithmetic unit is solely dedicated to performance of a plurality of parallel operations. Each one of the plurality of parallel operations carries out a portion of the formula: output=AX+BY+C.

公开(公告)号：US10382033B2

公开(公告)日：2019-08-13

申请号：US15653034

申请日：2017-07-18

Applicant: STMicroelectronics International N.V.

Inventor： Prashant Singh

IPC: H03K17/22 ,  G05F1/56 ,  G06F1/30 ,  G06F1/24

Abstract: A power supply voltage detector circuit monitors a ramping supply voltage and selectively enables a voltage divider for operation to divide the ramping supply voltage in response to the ramping supply voltage exceeding a first threshold. Additionally, a variable resistance of the voltage divider is changed in response to the ramping supply voltage exceeding a second threshold. A voltage output from the voltage divider is used to generate a bandgap voltage used as a reference voltage in comparison operations for controlling enabling of the voltage divider and selection of the variable resistance.

公开(公告)号：US20190217611A1

公开(公告)日：2019-07-18

申请号：US16357077

申请日：2019-03-18

Applicant: STMICROELECTRONICS, INC. ,  STMICROELECTRONICS INTERNATIONAL N.V. ,  STMICROELECTRONICS S.R.L.

Inventor： Simon DODD ,  David S. HUNT ,  Joseph Edward SCHEFFELIN ,  Dana GRUENBACHER ,  Stefan H. HOLLINGER ,  Uwe SCHOBER ,  Peter JANOUCH

IPC: B41J2/14 ,  B41J2/175

CPC classification number: B41J2/1433 ,  B41J2/14072 ,  B41J2/14201 ,  B41J2/1753 ,  B41J2/17553 ,  B41J2002/14362 ,  B41J2002/14491

Abstract: The present disclosure provides supports for microfluidic die that allow for nozzles of the microfluidic die to be on a different plane or face a different direction from electrical contacts on the same support. This includes a rigid support having electrical contacts on a different side of the rigid support with respect to a direction of ejection of the nozzles, and a semi-flexible support or semi-rigid support that allow the electrical contacts to be moved with respect to a direction of ejection of the nozzles. The semi-flexible and semi-rigid supports allow the die to be up to and beyond a 90 degree angle with respect to a plane of the electrical contacts. The different supports allow for a variety of positions of the microfluidic die with respect to a position of the electrical contacts.

公开(公告)号：US20190197014A1

公开(公告)日：2019-06-27

申请号：US15850535

申请日：2017-12-21

Applicant: STMICROELECTRONICS INTERNATIONAL N.V.

Inventor： Tejinder KUMAR ,  Rathod RONAK KISHORBHAI ,  Apurva SEN ,  Rakesh MALIK

IPC: G06F15/78 ,  G06F17/30

Abstract: Various embodiments provide a content addressable memory (CAM) architecture that utilizes non-bit addressable memory, such as a single or dual port random access memory. The CAM includes a first non-bit addressable memory, a second non-bit addressable memory, a multiplexer, a write operation encoder, a read operation encoder, and a match signal generator. In contrast to bit addressable memories, non-bit addressable memories are widely available, have high performance frequency, and are area efficient as compared to bit addressable memories. Accordingly, the CAM architecture described herein has low costs and time to market, increased processing time, and improved area efficiency.