Redundant decoder having fuse-controlled transistor
    61.
    发明授权
    Redundant decoder having fuse-controlled transistor 有权
    具有熔丝控制晶体管的冗余解码器

    公开(公告)号:US06236241B1

    公开(公告)日:2001-05-22

    申请号:US09548032

    申请日:2000-04-12

    CPC classification number: G11C29/70

    Abstract: A redundant decoder having fuse-controlled transistor comprises as follows: a bistable circuit which outputs a pair of complementary signals; a discharging device which is turned on at an evaluating cycle to form a discharging path; a precharging device which is turned on at a precharging cycle before an evaluating cycle to provide a precharging voltage; a first pair of transistors, having first terminals coupled to the precharging voltage, first gate terminals coupled to receive pair of complementary signals whose logic values decide whether the first pair of transistors are turned on or not, and second terminals; a second pair of transistors, having third terminals coupled to the second terminals of the first pair of transistors, second gate terminals coupled to receive a pair of complementary address bit signals whose logic values decide whether the second pair of transistors are turned on or not, and fourth terminals coupled to the discharging device; and a fuse device, having a fuse which is coupled to the bistable device that decides the logic values of the pair of complementary signals by whether the fuse is burnt down or not.

    Abstract translation: 具有熔丝控制晶体管的冗余解码器包括如下:输出一对互补信号的双稳态电路; 放电装置,其在评价周期开启,形成放电路径; 预充电装置,其在评价周期之前以预充电周期开启,以提供预充电电压; 第一对晶体管,具有耦合到预充电电压的第一端子,第一栅极端子耦合以接收一对互补信号,其逻辑值决定第一对晶体管是否导通;以及第二端子; 第二对晶体管,具有耦合到第一对晶体管的第二端子的第三端子,第二栅极端子,被耦合以接收一对互补地址位信号,其逻辑值决定第二对晶体管是否导通, 以及耦合到所述放电装置的第四端子; 以及熔丝器件,其具有耦合到双稳态器件的熔丝,所述熔断器通过所述熔丝是否被烧坏来决定所述一对互补信号对的逻辑值。

    Dynamic precharge redundant circuit for semiconductor memory device
    62.
    发明授权
    Dynamic precharge redundant circuit for semiconductor memory device 有权
    半导体存储器件的动态预充电冗余电路

    公开(公告)号:US6166974A

    公开(公告)日:2000-12-26

    申请号:US429595

    申请日:1999-10-28

    CPC classification number: G11C17/18 G11C7/12

    Abstract: A dynamic precharge redundant circuit for a semiconductor memory device. A PMOS transistor, a fuse, a first, second and third inverters, a first switch and a second switch are applied. A source of the PMOS transistor is coupled to a voltage supply, while a gate of the PMOS transistor is to receive a precharge signal. The fuse has a ground terminal and a terminal coupled to the drain of the PMOS transistor of which the drain is further coupled to an input terminal of the first inverter. The fuse is also coupled to a column address signal. The first inverter has an output terminal coupled to an input terminal of the first switch. The second inverter has an input terminal coupled to an output terminal of the first switch and an output terminal coupled to an input terminal of the third inverter, so as to output a bit-switch control signal. An input terminal of the second switch is coupled to an output terminal of the third inverter, while an output terminal of the second switch is coupled to both the output terminal of the first switch and the input terminal of the second inverter. Thus, an error caused by the generation of an interference signal of the bit-switch control signal is prevented, so as to prevent from damaging data of the bit line sense amplifier.

    Abstract translation: 一种用于半导体存储器件的动态预充电冗余电路。 PMOS晶体管,熔丝,第一,第二和第三反相器,第一开关和第二开关被施加。 PMOS晶体管的源极耦合到电压源,而PMOS晶体管的栅极将接收预充电信号。 保险丝具有接地端子和耦合到PMOS晶体管的漏极的端子,漏极还耦合到第一反相器的输入端子。 保险丝也耦合到列地址信号。 第一反相器具有耦合到第一开关的输入端的输出端。 第二反相器具有耦合到第一开关的输出端子的输入端子和耦合到第三反相器的输入端子的输出端子,以便输出位开关控制信号。 第二开关的输入端耦合到第三反相器的输出端,而第二开关的输出端耦合到第一开关的输出端和第二反相器的输入端。 因此,防止了由位开关控制信号的干扰信号的产生引起的误差,从而防止位线读出放大器的数据损坏。

    Inputting module and submount thereof and manufacturing method of the submount
    63.
    发明授权
    Inputting module and submount thereof and manufacturing method of the submount 有权
    输入模块及其基座及其安装的制造方法

    公开(公告)号:US08658961B2

    公开(公告)日:2014-02-25

    申请号:US13198902

    申请日:2011-08-05

    Abstract: A submount is used for disposing an illuminant element or a light-receiving element having an optical axis. The submount is disposed at a plane and has a main body. The main body includes a first surface and a second surface. The first surface is approximately parallel to the plane and far away from the plane. The second surface is approximately parallel to the plane and adjacent to the plane. A disposing part of the first surface is tilted with respect to the second surface at a predetermined angle. The illuminant element or the light-receiving element is disposed on the disposing part. The optical axis of the illuminant element or the light-receiving element is tiled with respect to a normal of the second surface at the predetermined angle.

    Abstract translation: 基座用于设置具有光轴的光源元件或光接收元件。 底座设置在平面上并具有主体。 主体包括第一表面和第二表面。 第一表面大致平行于平面并远离平面。 第二表面大致平行于平面并与平面相邻。 第一表面的设置部分以预定角度相对于第二表面倾斜。 照明元件或光接收元件设置在配置部上。 光源元件或光接收元件的光轴相对于第二表面的法线以预定角度被平铺。

    UNIVERSAL SERIAL BUS CONNECTOR
    65.
    发明申请
    UNIVERSAL SERIAL BUS CONNECTOR 审中-公开
    通用串行总线连接器

    公开(公告)号:US20110009001A1

    公开(公告)日:2011-01-13

    申请号:US12779887

    申请日:2010-05-13

    CPC classification number: H01R12/712 H01R13/506 H01R13/6582

    Abstract: An improved Universal Serial Bus (USB) connector mounted on a print circuit board for transmitting electric signals between a dock connector and the print circuit board. The improved Universal Serial Bus connector comprises a set of first terminals, a set of second terminals, an insulator, and a shielding shell. Each of the first terminals and the second terminals is respectively fixed on the insulator. The insulator includes a cap, on which each of the first terminals and the second terminals is disposed, and is substantially enclosed by the shielding shell.

    Abstract translation: 一种改进的通用串行总线(USB)连接器,其安装在印刷电路板上,用于在基座连接器和印刷电路板之间传输电信号。 改进的通用串行总线连接器包括一组第一端子,一组第二端子,绝缘体和屏蔽壳体。 每个第一端子和第二端子分别固定在绝缘体上。 绝缘体包括盖,其上设置有第一端子和第二端子,并且基本上被屏蔽壳封闭。

    THREE-DIMENSIONAL CONNECTOR FOR A COORDINATE INPUT DEVICE
    66.
    发明申请
    THREE-DIMENSIONAL CONNECTOR FOR A COORDINATE INPUT DEVICE 有权
    用于协调输入设备的三维连接器

    公开(公告)号:US20100240248A1

    公开(公告)日:2010-09-23

    申请号:US12793379

    申请日:2010-06-03

    Inventor: CHIH-CHENG CHEN

    Abstract: A three-dimensional connector, which is used by a coordinate input device of a touch pad, has a flat conductor cable with an end being connected to the touch pad and another end forming a soldered conductive contact head perpendicular to the flat conductor cable to pass through a support to shorten a length of said conductor cable and enhance electro-conductibility of the connector.

    Abstract translation: 由触摸板的坐标输入装置使用的三维连接器具有扁平导体电缆,其端部连接到触摸板,另一端形成垂直于扁平导体电缆的焊接导电接触头以通过 通过支撑件缩短所述导体电缆的长度并增强连接器的导电性。

    Optical disk drive signal calibration method and device for the same
    68.
    发明授权
    Optical disk drive signal calibration method and device for the same 失效
    光盘驱动器信号的校准方法和设备相同

    公开(公告)号:US07447134B2

    公开(公告)日:2008-11-04

    申请号:US11349936

    申请日:2006-02-09

    CPC classification number: G11B7/1267

    Abstract: The present invention is described for compensating a signal which is transmitted by a transmitting module of the optical disk drive controller through a signal channel and received and reshaped by a receiving module of the optical pickup head to calibrate the duty cycle distortion occurred. The claimed method has the steps of providing a periodic test signal, and then delaying the periodic test signal to form an adjusted test signal and adjusting a delay of an edge between the periodic test signal and the adjusted test signal instructed by a calibration signal. Afterward, the method further has the steps of transmitting the adjusted test signal to the receiving module through the signal channel, and receiving and reshaping the adjusted test signal to form a received signal, and then generating a monitor signal, finally, the method has a step of generating the calibration signal in accordance with the monitor signal.

    Abstract translation: 描述了本发明,用于补偿由光盘驱动器控制器的发送模块通过信号通道发送的信号,并由光学拾取头的接收模块接收和重新整形,以校准发生的占空比失真。 要求保护的方法具有提供周期性测试信号,然后延迟周期性测试信号以形成调整的测试信号,并且调整周期性测试信号与由校准信号指示的经调整的测试信号之间的边缘的延迟。 此后,该方法还具有通过信号通道将调整后的测试信号发送到接收模块的步骤,并且接收和重新调整经调整的测试信号以形成接收信号,然后产生监视信号,最后该方法具有 根据监视信号产生校准信号的步骤。

    EXTRUSION PRODUCT MADE OF ALUMINUM/ALUMINUM ALLOY MATRIX COMPOSITE AND A PROCESS OF FORMING THE EXTRUSION PRODUCT
    69.
    发明申请
    EXTRUSION PRODUCT MADE OF ALUMINUM/ALUMINUM ALLOY MATRIX COMPOSITE AND A PROCESS OF FORMING THE EXTRUSION PRODUCT 审中-公开
    铝/铝合金基体复合材料的挤压产品和形成挤压产品的工艺

    公开(公告)号:US20080240976A1

    公开(公告)日:2008-10-02

    申请号:US11948314

    申请日:2007-11-30

    Inventor: Chih-Cheng Chen

    CPC classification number: C22C21/00 C22F1/04

    Abstract: A process of an extrusion product made of matrix composite aluminum alloys has multiple steps. First, provide at least two different aluminum alloys. Select one of the aluminum alloys to be a core. Select the rest of the aluminum alloys to be at least one hollow covering and mounted around the core to form a billet. Heat the billet to become deformable. Then extrudes the billet to become the extrusion product with matrix composite aluminum alloys. Hence, the core and the covering can be securely bonded to each other.

    Abstract translation: 由基体复合铝合金制成的挤出产品的工艺有多个步骤。 首先,提供至少两种不同的铝合金。 选择一种铝合金为核心。 选择其余的铝合金为至少一个中空覆盖物,并安装在芯周围以形成坯料。 加热钢坯变形。 然后将坯料挤出成为具有基质复合铝合金的挤出产品。 因此,芯和覆盖物可以彼此牢固地结合。

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