Distributed averaging analog to digital converter topology
    61.
    发明授权
    Distributed averaging analog to digital converter topology 失效
    分布式平均模数转换器拓扑

    公开(公告)号:US06831585B2

    公开(公告)日:2004-12-14

    申请号:US10684444

    申请日:2003-10-15

    Abstract: An analog to digital converter includes a first amplifier array connected to taps from a reference ladder, a second amplifier array, wherein each amplifier in the first amplifier array is connected to only two amplifiers of the second amplifier array, a third amplifier array, wherein each amplifier in the second amplifier array is connected to only two amplifiers of the third amplifier array, and an encoder connected to outputs of the third amplifier array that converts the outputs to an N-bit digital signal.

    Abstract translation: 模数转换器包括连接到参考梯形图的抽头的第一放大器阵列,第二放大器阵列,其中第一放大器阵列中的每个放大器仅连接到第二放大器阵列的两个放大器,第三放大器阵列,其中每个 第二放大器阵列中的放大器仅连接到第三放大器阵列的两个放大器,以及连接到第三放大器阵列的输出的编码器,其将输出转换为N位数字信号。

    High speed analog to digital converter

    公开(公告)号:US06788238B2

    公开(公告)日:2004-09-07

    申请号:US10688921

    申请日:2003-10-21

    Applicant: Jan Mulder

    Inventor: Jan Mulder

    Abstract: An analog to digital converter includes a reference ladder, a track-and-hold amplifier tracking an input signal with its output signal during the phase &phgr;1 and holding a sampled value during, a coarse analog to digital converter having a plurality of coarse amplifiers each inputting a corresponding tap from the reference ladder and the output signal, a fine analog-to-digital converter having a plurality of fine amplifiers inputting corresponding taps from the reference ladder and the output signal, the taps selected based on outputs of the coarse amplifiers, a clock having phases &phgr;1 and &phgr;2, a circuit responsive to the clock that receives the output signal, the circuit substantially passing the output signal and the corresponding taps to the fine amplifiers during the phase &phgr;2 and substantially rejecting the output signal and the corresponding taps during the phase &phgr;1, and an encoder converting outputs of the coarse and fine amplifiers to an N-bit digital signal representing the input signal.

    Analog to digital converter with interpolation of reference ladder
    63.
    发明授权
    Analog to digital converter with interpolation of reference ladder 失效
    具有参考梯形图插补的模数转换器

    公开(公告)号:US06784818B2

    公开(公告)日:2004-08-31

    申请号:US10748250

    申请日:2003-12-31

    Applicant: Jan Mulder

    Inventor: Jan Mulder

    Abstract: An N-bit analog to digital converter includes a reference ladder connected to an imput voltage at one end, and to ground at another end, an array of differential amplifiers whose differential inputs are connected to taps from the reference ladder, wherein each amplifier has a first differential input connected to the same tap as a neighboring amplifier, and a second differential imput shifted one tap from the neighboring amplifier, and an encoder that converts outputs the array to an N-bit output.

    Abstract translation: N位模数转换器包括一个连接到一端的输入电压的参考电路,另一端接地,差分放大器的阵列,其差分输入端与参考电路的抽头相连,其中每个放大器具有 连接到与相邻放大器相同的抽头的第一差分输入和从相邻放大器移位的一个抽头的第二差分输入,以及将该阵列的输出转换为N位输出的编码器。

    Distributed averaging analog to digital converter topology
    64.
    发明授权
    Distributed averaging analog to digital converter topology 失效
    分布式平均模数转换器拓扑

    公开(公告)号:US06628224B1

    公开(公告)日:2003-09-30

    申请号:US10153709

    申请日:2002-05-24

    Abstract: An analog to digital converter includes a first amplifier array connected to taps from a reference ladder, a second amplifier array, wherein each amplifier in the first amplifier array is connected to only two amplifiers of the second amplifier array, a third amplifier array, wherein each amplifier in the second amplifier array is connected to only two amplifiers of the third amplifier array, and an encoder connected to outputs of the third amplifier array that converts the outputs to an N-bit digital signal.

    Abstract translation: 模数转换器包括连接到参考梯形图的抽头的第一放大器阵列,第二放大器阵列,其中第一放大器阵列中的每个放大器仅连接到第二放大器阵列的两个放大器,第三放大器阵列,其中每个 第二放大器阵列中的放大器仅连接到第三放大器阵列的两个放大器,以及连接到第三放大器阵列的输出的编码器,其将输出转换为N位数字信号。

    Method of manufacturing a disc-shaped information carrier
    65.
    发明授权
    Method of manufacturing a disc-shaped information carrier 失效
    制造DISC型信息载体的方法

    公开(公告)号:US5242630A

    公开(公告)日:1993-09-07

    申请号:US839016

    申请日:1992-02-18

    CPC classification number: G11B7/263 B29C59/02 B29D17/005 Y10S425/81

    Abstract: A method of manufacturing an object having a surface structure, the method employing pressure members (3, 5) which are movable relative to one another and which have facing pressure surfaces (23, 25). A first element (51) and a second element (53) having a relief on one surface are pressed against one another to provide the second element with a microstructure by cold deformation. During pressing use is made of a pressure body (27, 29) which is interposed between one of the pressure members and one of the elements and which is made of a material having a characteristic parameter equal to the quotient of the Poisson's ratio and the modulus of elasticity of the material, which parameter differs less from the corresponding parameter of the material of the relevant element than from the corresponding parameter of the material of the relevant pressure member. The difference between the parameter of the material of the first element and the parameter of the material of the second element being smaller than or equal to the difference between the parameter of the material of said pressure body and the parameter of the material of the adjacent element.

    Piston-centering system for a hot gas machine
    66.
    发明授权
    Piston-centering system for a hot gas machine 失效
    热气机活塞定心系统

    公开(公告)号:US4188791A

    公开(公告)日:1980-02-19

    申请号:US881576

    申请日:1978-02-27

    Applicant: Jan Mulder

    Inventor: Jan Mulder

    Abstract: A free piston hot gas reciprocating machine having, one piston surface which varies the volume of a working space, while its other surface bounds a buffer space of constant pressure, and a control mechanism formed by an auxiliary cylinder and an auxiliary piston which is movable therein. The control mechanism maintains a given central position of the free piston by instantaneously opening a connection between the buffer space and the auxiliary cylinder space.

    Abstract translation: 一种自由活塞热气往复运动机,具有改变工作空间的体积的一个活塞表面,而另一个表面限定了恒定的缓冲空间;以及由辅助气缸和辅助活塞形成的控制机构,该辅助气缸和辅助活塞可在其中移动 。 控制机构通过瞬时打开缓冲空间和辅助气缸空间之间的连接来保持自由活塞的给定中心位置。

    Cooling system
    67.
    发明授权
    Cooling system 失效
    冷却系统

    公开(公告)号:US3994337A

    公开(公告)日:1976-11-30

    申请号:US575181

    申请日:1975-05-07

    CPC classification number: F28F19/00 F28D1/05316 F28F1/122

    Abstract: A cooling system for a combustion engine with a radiator wherein a plurality of cooling medium pipes are arranged in one plane, the pipes being connected by strips of gauzes, with air ducts between the strips or in the gauzes having a hydraulic diameter (d.sub.h) of less than 2 mm, the length (L) of said ducts being less than 25 mm, and L/d.sub.h

    Abstract translation: 一种用于具有散热器的内燃机的冷却系统,其中多个冷却介质管布置在一个平面中,所述管通过纱条连接,所述条带之间的空气管道或所述纱布中的水通道的直径(dh)为 小于2mm,所述导管的长度(L)小于25mm,L / dh <25。 散热器之前是一个污物收集器,由一个薄的锯齿形折叠的空气透过层组成,其通道的水力直径小于2mm。

    High speed latch comparators
    69.
    发明授权
    High speed latch comparators 有权
    高速锁存比较器

    公开(公告)号:US07906992B2

    公开(公告)日:2011-03-15

    申请号:US12040805

    申请日:2008-02-29

    Abstract: In a latch circuit having a bistable pair of cross connected transistors of a first polarity and a third transistor of a second polarity, a current signal greater than a bias current is received at a latch circuit port, amplified with the third transistor, and applied to the latch circuit port. This decreases the time in which the latch circuit port receiving the current signal greater than the bias current reaches a steady state voltage.

    Abstract translation: 在具有第一极性的双稳态交叉晶体管对和第二极性的第三晶体管的锁存电路中,在锁存电路端口处接收大于偏置电流的电流信号,用第三晶体管放大并施加到 锁存电路端口。 这减小了接收大于偏置电流的电流信号的锁存电路端口达到稳态电压的时间。

    METHOD AND SYSTEM FOR A CONTROL SCHEME ON POWER AND COMMON-MODE VOLTAGE REDUCTION FOR A TRANSMITTER
    70.
    发明申请
    METHOD AND SYSTEM FOR A CONTROL SCHEME ON POWER AND COMMON-MODE VOLTAGE REDUCTION FOR A TRANSMITTER 失效
    用于发射机功率和共模电压降低的控制方案的方法和系统

    公开(公告)号:US20100080271A1

    公开(公告)日:2010-04-01

    申请号:US12536024

    申请日:2009-08-05

    CPC classification number: H04B1/581

    Abstract: Provided is a method and system for controlling current characteristics in a transceiver having a transmitter. The transmitter includes a plurality of current cells. Each cell is configurable for operating in different modes. The method includes determining a first probability associated with transmitting data at a particular symbolic level and determining a second probability associated with each cell being used during a transmission at the particular symbolic level. Next, one of the modes for each cell is selected in accordance with anticipated performance requirements. An average current of the transmitter is then calculated based upon the determined first and second probabilities and the selected modes.

    Abstract translation: 提供了一种用于控制具有发射机的收发机中的电流特性的方法和系统。 发射机包括多个当前小区。 每个单元都可配置为以不同的模式运行。 该方法包括确定与在特定符号级别发送数据相关联的第一概率,并且确定与在特定符号级别的传输期间正在使用的每个小区相关联的第二概率。 接下来,根据预期的性能要求选择每个单元的模式之一。 然后基于所确定的第一和第二概率和所选择的模式来计算发射机的平均电流。

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