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公开(公告)号：US20080020396A1
公开(公告)日：2008-01-24
申请号：US11791163
申请日：2005-11-22
Applicant: Chantal Savoye , Patrice Sarfati
Inventor： Chantal Savoye , Patrice Sarfati
CPC classification number: C12Q1/6876 , C12Q1/6844 , C12Q2527/125
Abstract: The invention relates to a concentrated and buffered liquid composition for amplifying nucleic acids, comprising at least one dNTP, at least one enzyme required for the amplification, at least one oligonucleotide primer, and at least one fluorescent nucleotide probe, in the presence of a polyol and/or of polyvinylpyrrolidone (PVP).
Abstract translation: 本发明涉及用于扩增核酸的浓缩和缓冲液体组合物，其包含至少一种dNTP，至少一种扩增酶所需的酶，至少一种寡核苷酸引物和至少一种荧光核苷酸探针，在多元醇存在下 和/或聚乙烯吡咯烷酮（PVP）。
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公开(公告)号：US06489992B2
公开(公告)日：2002-12-03
申请号：US09731259
申请日：2000-12-06
Applicant: Eugene D. Savoye
Inventor： Eugene D. Savoye
IPC: H04N5225
CPC classification number: H04N5/335 , H04N5/20 , H04N5/3696
Abstract: A CCD imaging system is provided, including a short focal length lens for accepting light from the scene to be imaged and a charge storage medium having a charge storage substrate that is curved in a selected nonplanar focal surface profile and located a selected distance from the lens with the focal surface facing the lens, the focal surface profile and the lens-to-substrate distance selected such that the light accepted by the lens is in focus at the position of the substrate. There is provided a support substrate on which the nonplanar charge storage substrate is supported to maintain the selected surface profile of the charge storage substrate. An array of pixels defined in the charge storage substrate by pixel interconnections is supported on the front side of the substrate, such that exposure of the substrate to light from the scene through the lens produces charge packets in the pixels, with the pixel interconnection providing selective electronic temporal control of transfer of charge packets from one pixel to another in the substrate. The invention provides a technique for suppressing dark current charge packet generation in the substrate pixels. An output circuit converts the charge packets in the pixels to an electrical pixel signal of output pixel values based on the light from the scene. A plurality of pixel values together form an image frame, the output pixel values being produced at a rate corresponding to the image frame rate, R.
Abstract translation: 提供了一种CCD成像系统，包括用于接收来自要成像的场景的光的短焦距透镜和具有电荷存储基板的电荷存储介质，所述电荷存储介质在所选择的非平面焦面表面轮廓中弯曲并且位于离所述透镜的选定距离处 焦点表面面向透镜，焦平面轮廓和透镜到基底的距离被选择使得透镜所接受的光在基板的位置处聚焦。 提供了支撑基板，其上支撑非平面电荷存储基板以维持电荷存储基板的所选择的表面轮廓。 通过像素互连限定在电荷存储基板中的像素阵列被支撑在基板的前侧，使得基板通过透镜从场景的光的曝光在像素中产生电荷分组，其中像素互连提供选择性 电子时间控制电荷分组从基板上的一个像素转移到另一个像素。 本发明提供一种用于抑制基板像素中的暗电荷电荷分组产生的技术。 输出电路基于来自场景的光将像素中的电荷分组转换为输出像素值的电像素信号。 多个像素值一起形成图像帧，输出像素值以对应于图像帧率R的速率产生。
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公开(公告)号：US5940685A
公开(公告)日：1999-08-17
申请号：US739097
申请日：1996-10-28
Applicant: Andrew H. Loomis , James A. Gregory , Eugene D. Savoye , Bernard B. Kosicki
Inventor： Andrew H. Loomis , James A. Gregory , Eugene D. Savoye , Bernard B. Kosicki
IPC: H01L27/148 , H01L31/18 , H01L21/00
CPC classification number: H01L31/186 , H01L27/1464 , H01L27/14831 , Y02E10/50 , Y10S438/928
Abstract: The wafer thickness of a CCD front illuminated silicon wafer is reduced to about ten to twenty microns, the Al substrate is removed and a 5-35 nanometer silicon oxide layer is produced on the thinned back of the silicon wafer followed by implanting boron ions within the back surface to a depth up to about ten nanometers. Furnace annealing the wafer is now carried out, and the Al substrate is redeposited to enable the formation of gate contacts.
Abstract translation: CCD前照明硅晶片的晶片厚度减小到约十至二十微米，去除Al衬底，并在硅晶片的薄化背面上产生5-35纳米的氧化硅层，随后将硼离子注入 后表面深达约10纳米。 现在进行炉退火晶片，并且再次沉积Al衬底以形成栅极接触。
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公开(公告)号：US5880777A
公开(公告)日：1999-03-09
申请号：US632746
申请日：1996-04-15
Applicant: Eugene D. Savoye , Allen M. Waxman , Robert K. Reich , Barry E. Burke , James A. Gregory , William H. McGonagle , Andrew H. Loomis , Bernard B. Kosicki , Robert W. Mountain , Alan N. Gove , David A. Fay , James E. Carrick
Inventor： Eugene D. Savoye , Allen M. Waxman , Robert K. Reich , Barry E. Burke , James A. Gregory , William H. McGonagle , Andrew H. Loomis , Bernard B. Kosicki , Robert W. Mountain , Alan N. Gove , David A. Fay , James E. Carrick
CPC classification number: H04N5/335 , H04N5/20 , H04N5/3696
Abstract: An imaging system is provided for imaging a scene to produce a sequence of image frames of the scene at a frame rate, R, of at least about 25 image frames per second. The system includes an optical input port, a charge-coupled imaging device, an analog signal processor, and an analog-to-digital processor (A/D). The A/D digitizes the amplified pixel signal to produce a digital image signal formatted as a sequence of image frames each of a plurality of digital pixel values and having a dynamic range of digital pixel values represented by a number of digital bits, B, where B is greater than 8. A digital image processor is provided for processing digital pixel values in the sequence of image frames to produce an output image frame sequence at the frame rate, R, representative of the imaged scene, with a latency of no more than about 1/R and a dynamic range of image frame pixel values represented by a number of digital bits, D, where D is less than B. The output image frame sequence is characterized by noise-limited resolution of at least a minimum number, N.sub.M, of line pairs per millimeter, referred to the charge-coupled imaging device pixel array, in an imaged scene as a function of illuminance of the input light impinging the charge-coupled imaging device pixels.
Abstract translation: 提供一种成像系统，用于对场景进行成像，以每秒至少约25幅图像帧的帧速率R产生场景的图像序列序列。 该系统包括光输入端口，电荷耦合成像装置，模拟信号处理器和模数转换器（A / D）。 A / D数字化放大的像素信号以产生格式化为多个数字像素值中的每一个的一系列图像帧并且具有由多个数字位B表示的数字像素值的动态范围的数字图像信号，其中 B大于8.提供数字图像处理器用于处理图像帧序列中的数字像素值以产生代表成像场景的帧速率R的输出图像帧序列，等待时间不超过 约1 / R和由数字比特数D表示的图像帧像素值的动态范围，其中D小于B.输出图像帧序列的特征在于噪声限制分辨率至少最小数目NM 被称为电荷耦合成像装置像素阵列的线对每毫米在成像场景中作为照射电荷耦合成像装置像素的输入光的照度的函数。
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公开(公告)号：US4232245A
公开(公告)日：1980-11-04
申请号：US838713
申请日：1977-10-03
Applicant: Eugene D. Savoye , Thomas W. Edwards , Lloyd F. Wallace
Inventor： Eugene D. Savoye , Thomas W. Edwards , Lloyd F. Wallace
CPC classification number: H01J29/455
Abstract: A target for vidicons and image intensifier tubes include a potential barrier less than about 1500 A from an input signal sensing surface. The targets also include various passivation means for stabilizing the energy level configuration along the input signal sensing surface by substantially fixing the valence or conduction band along that surface relative to the Fermi level.
Abstract translation: 视频和图像增强管的目标包括从输入信号感测表面小于大约1500A的势垒。 目标还包括各种钝化装置，用于通过基本上固定沿着该表面相对于费米能级的价带或导带来沿着输入信号感测表面稳定能级配置。
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Patent Agency Ranking
公开(公告)号：US11453554B2
公开(公告)日：2022-09-27
申请号：US16784952
申请日：2020-02-07
Applicant: Savoye , Universite De Technologie De Compiegne
Inventor： Jean-Michel Collin , Blandine Vacher , Antoine Jouglet , Dritan Nace
Abstract: A method for sequencing loads in an automated load-distribution system having k sources with k≥2; at least one destination; k FIFO-type source buffer devices, each receiving loads from one of the k sources; a collector collecting the loads from the k source buffer devices and transporting them to the at least one destination. The collector includes k successive nodes each configured to collect the loads from one of the source buffer devices. The control system processes customer orders listing loads for a given destination and being each associated with a sequential order number of destination. The control system: builds a collection list containing n loads to be collected and reducing a disorder of the n loads relative to a rising order of the sequential order numbers of destination; and controls the collector and the source buffer devices to collect loads compliant with the collection list.
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公开(公告)号：US11339005B2
公开(公告)日：2022-05-24
申请号：US16667087
申请日：2019-10-29
Applicant: SAVOYE
Inventor： Stephane Pietrowicz , Jean-Michel Collin , Blandine Vacher
Abstract: A method for managing a buffer storage and load sequencing system, receiving non-sequenced loads, providing a sequence of loads, and including a buffer storage unit (having entrance levels, at least one recirculation level, and an entrance elevator facing entrances and an exit elevator facing exits of the levels. A management unit iteratively manages the entrance elevator by, at each iteration (even if there are loads to be recirculated in the system): selecting a load at exit from an entrance conveyor or at exit from the recirculation level; if the selection of one of the entrance levels is completed, generating a task for the entrance elevator of transferring the selected load to the entrance of the selected level; if not, selecting a level of loads to be recirculated and assigning the load(s) on this level a “load(s) to be recirculated” status without generating a task of transfer for the entrance elevator.
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公开(公告)号：US11319162B2
公开(公告)日：2022-05-03
申请号：US16667108
申请日：2019-10-29
Applicant: SAVOYE
Inventor： Stephane Pietrowicz , Jean-Michel Collin , Blandine Vacher
Abstract: A method for managing a buffer storage and load sequencing system. The system receives non-sequenced loads and provides at least one sequence of loads, and includes a buffer storage unit having entrance levels, at least one recirculation level, an entrance elevator facing entrances and an exit elevator facing exits of the levels. A management unit iteratively manages the entrance elevator. At each iteration the entrance elevator: has a “waiting for recirculation” status for a load to be recirculated in the system; holds this elevator until the load to be recirculated has been transferred to the recirculation level, else selects a load at exit from an entrance conveyor or at exit from the recirculation level; if the selection of the entrance level is completed, generates a task, for the entrance elevator, of transferring the selected load to the selected level; if not assigns this load the “awaiting recirculation” status.
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公开(公告)号：US11117745B2
公开(公告)日：2021-09-14
申请号：US16461166
申请日：2017-11-14
Applicant: SAVOYE
Inventor： Jean-Michel Collin
Abstract: A method of sequencing loads in an automated distribution system having sources, at least one destination, a collector having successive nodes, and a control system to process customer orders. The method includes, for an analyzed node, injection including, to decide whether a load C having a sequential order number of destination for a given destination can be injected into the collector: creating, among the loads to be collected by at least one node downstream to the analyzed node, a list LI1 of loads having an order number of destination lower than the given order number of destination and a list LI2 of loads that are interposed between a load of the list LI1 and the collector; determining whether “the list LI1 is empty” and/or “the list LI1 is not empty and the list LI2 is empty”; if one of the two conditions is verified, then injection of the load C.
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公开(公告)号：US20210130099A1
公开(公告)日：2021-05-06
申请号：US16628188
申请日：2018-07-05
Applicant: SAVOYE
Inventor： Jean-Michel Collin , Stephane Pietrowicz
Abstract: A system for conveying loads without sequencing, between storage units and preparation stations. The system includes upper collectors and lower collectors of opposite directions, rectilinear, parallel and positioned on upper and lower horizontal planes respectively; and for at least one first storage unit/preparation station couple, a first set of conveyors composed of two storage unit upper exit and upper entry conveyors and two storage unit lower exit and lower entry conveyors to connect the storage unit to the collectors and two preparation station upper exit and upper entry conveyors and two preparation station lower exit and entry conveyors to connect the preparation station to the collectors.
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