Systems and methods for local iteration adjustment
    61.
    发明授权
    Systems and methods for local iteration adjustment 有权
    用于局部迭代调整的系统和方法

    公开(公告)号:US08854754B2

    公开(公告)日:2014-10-07

    申请号:US13213751

    申请日:2011-08-19

    IPC分类号: G11B5/09 G11B20/10 G06F9/30

    摘要: Various embodiments of the present invention provide systems and methods for data processing. As an example, a data processing circuit is disclosed that includes: a data decoder circuit and a local iteration adjustment circuit. The data decoder circuit is operable to perform a number of local iterations on a decoder input to yield a data output. The local iteration adjustment circuit is operable to generate a limit on the number of local iterations performed by the data decoder circuit.

    摘要翻译: 本发明的各种实施例提供了用于数据处理的系统和方法。 作为示例,公开了一种数据处理电路,其包括:数据解码器电路和局部迭代调整电路。 数据解码器电路可操作以在解码器输入上执行多次局部迭代以产生数据输出。 本地迭代调整电路可操作以产生由数据解码器电路执行的局部迭代次数的限制。

    Systems and methods for mitigating stubborn errors in a data processing system
    62.
    发明授权
    Systems and methods for mitigating stubborn errors in a data processing system 有权
    减轻数据处理系统中顽固错误的系统和方法

    公开(公告)号:US08819527B2

    公开(公告)日:2014-08-26

    申请号:US13186234

    申请日:2011-07-19

    摘要: Various embodiments of the present invention provide data processing circuits that include: a data detector circuit, a data decoder circuit, and a modification circuit. The data detector circuit is operable to apply a data detection algorithm to a data input to yield a detected output. The data decoder circuit is operable to apply a data decode algorithm to a decode input to yield a decoded output. The decode input is selected between at least the detected output, and a modified version of the detected output. The modification circuit is operable to receive the detected output and to provide the modified version of the detected output.

    摘要翻译: 本发明的各种实施例提供数据处理电路,其包括:数据检测器电路,数据解码器电路和修改电路。 数据检测器电路可操作以将数据检测算法应用于数据输入以产生检测到的输出。 数据解码器电路可操作以将数据解码算法应用于解码输入以产生解码输出。 在至少检测到的输出和检测到的输出的修改版本之间选择解码输入。 修改电路可操作以接收所检测的输出并提供所检测输出的修改版本。

    Detector with soft pruning
    63.
    发明授权
    Detector with soft pruning 有权
    检测器软修剪

    公开(公告)号:US08788921B2

    公开(公告)日:2014-07-22

    申请号:US13283549

    申请日:2011-10-27

    IPC分类号: H03M13/03

    摘要: Various embodiments of the present invention provide apparatuses, systems and methods for data detection in a detector with soft pruning. For example, a data detector is disclosed that includes a branch metric calculator operable to calculate branch metrics for transitions between states in a trellis for the data detector, and a branch metric offset circuit operable to apply branch metric offsets to the branch metrics to yield soft pruned branch metrics. The branch metric offsets comprise a range of probability values from zero percent to one hundred percent.

    摘要翻译: 本发明的各种实施例提供了具有软修剪的检测器中的数据检测的装置,系统和方法。 例如,公开了一种数据检测器,其包括分支度量计算器,其可操作以计算用于数据检测器的网格中的状态之间的转换的分支度量;以及分支度量偏移电路,其可操作以将分支度量偏移应用于分支度量以产生软 修剪分支指标。 分支度量偏移包括从零百分之一百百分率的概率值的范围。

    Detector with Soft Pruning
    68.
    发明申请
    Detector with Soft Pruning 有权
    检测器软修剪

    公开(公告)号:US20130111306A1

    公开(公告)日:2013-05-02

    申请号:US13283549

    申请日:2011-10-27

    IPC分类号: H03M13/25 G06F11/10

    摘要: Various embodiments of the present invention provide apparatuses, systems and methods for data detection in a detector with soft pruning. For example, a data detector is disclosed that includes a branch metric calculator operable to calculate branch metrics for transitions between states in a trellis for the data detector, and a branch metric offset circuit operable to apply branch metric offsets to the branch metrics to yield soft pruned branch metrics. The branch metric offsets comprise a range of probability values from zero percent to one hundred percent.

    摘要翻译: 本发明的各种实施例提供了具有软修剪的检测器中的数据检测的装置,系统和方法。 例如,公开了一种数据检测器,其包括分支度量计算器,其可操作以计算用于数据检测器的网格中的状态之间的转换的分支度量;以及分支度量偏移电路,其可操作以将分支度量偏移应用于分支度量以产生软 修剪分支指标。 分支度量偏移包括从零百分之一百百分率的概率值的范围。

    Systems and Methods for Reduced Format Non-Binary Decoding
    69.
    发明申请
    Systems and Methods for Reduced Format Non-Binary Decoding 有权
    减少格式非二进制解码的系统和方法

    公开(公告)号:US20120331363A1

    公开(公告)日:2012-12-27

    申请号:US13167771

    申请日:2011-06-24

    IPC分类号: G06F11/07

    摘要: Various embodiments of the present invention provide systems and methods for data processing. As an example, a data processing circuit is disclosed that includes a data detecting circuit having: a first vector translation circuit, a second vector translation circuit, and a data detector core circuit. The data detecting circuit is operable to receive an input data set and at least one input vector in a first format. The at least one input vector corresponds to a portion of the input data set. The first vector translation circuit is operable to translate the at least one vector to a second format. The data detector core circuit is operable to apply a data detection algorithm to the input data set and the at least one vector in the second format to yield a detected output. The second vector translation circuit operable to translate a derivative of the detected output to the first format to yield an output vector.

    摘要翻译: 本发明的各种实施例提供了用于数据处理的系统和方法。 作为示例,公开了一种数据处理电路,其包括具有第一向量转换电路,第二向量转换电路和数据检测器核心电路的数据检测电路。 数据检测电路可操作以接收第一格式的输入数据集和至少一个输入向量。 至少一个输入向量对应于输入数据集的一部分。 第一向量翻译电路可操作以将至少一个向量转换为第二格式。 数据检测器核心电路可操作以将数据检测算法应用于输入数据集和第二格式的至少一个向量以产生检测到的输出。 第二向量转换电路可操作以将检测到的输出的导数转换为第一格式以产生输出向量。

    Chip package having asymmetric molding
    70.
    发明授权
    Chip package having asymmetric molding 有权
    具有不对称模制的芯片封装

    公开(公告)号:US07834432B2

    公开(公告)日:2010-11-16

    申请号:US12480105

    申请日:2009-06-08

    IPC分类号: H01L23/495

    摘要: A chip package having asymmetric molding includes a lead frame, a chip, an adhesive layer, bonding wires and a molding compound. The lead frame includes a turbulent plate and a frame body having inner lead portions and outer lead portions. The turbulent plate is bended downwards to form a concave portion. The first end of the turbulent plate is connected to the frame body, and the second end is lower than the inner lead portions. The chip is fixed under the inner lead portions through the adhesive layer. The bonding wires are connected between the chip and the inner lead portions. The molding compound encapsulates the chip, the bonding wires, and the turbulent plate. The ratio between the thickness of the molding compound over and under the concave portion is larger than 1. The thickness of the molding compound under and over the outer lead portions is not equal.

    摘要翻译: 具有不对称模制的芯片封装包括引线框架,芯片,粘合剂层,接合线和模塑料。 引线框架包括湍流板和具有内引线部分和外引线部分的框体。 湍流板向下弯曲以形成凹部。 湍流板的第一端连接到框体,第二端低于内引线部。 芯片通过粘合剂层固定在内引线部分的下方。 接合线连接在芯片和内引线部分之间。 模塑料封装芯片,接合线和湍流板。 凹形部分上方和下方的模塑料的厚度之比大于1.外引线部分之下和之上的模塑料的厚度不相等。