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公开(公告)号:US11941783B2
公开(公告)日:2024-03-26
申请号:US17149425
申请日:2021-01-14
Applicant: Apple Inc.
Inventor: Mahesh B. Chappalli , Vincent Z. Young
IPC: G06T5/00 , G06T1/20 , G06T3/40 , G06T3/4007 , G06T5/50
CPC classification number: G06T5/002 , G06T1/20 , G06T3/4007 , G06T5/50
Abstract: Methods and systems include receiving, at de-ringing circuitry of a display pipeline of an electronic device, scaled image content based on image data. The de-ringing circuitry also receives a fallback scaler output. The de-ringing circuitry determines whether the image data has a change frequency greater than a threshold. In response to the change frequency being above the threshold, the de-ringing circuitry determines a weight. Based at least in part on the weight, the de-ringing circuitry blends the scaled image content and the fallback scaler output based at least in part on the weight.
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公开(公告)号:US20220358895A1
公开(公告)日:2022-11-10
申请号:US17752651
申请日:2022-05-24
Applicant: Apple Inc.
Inventor: Mahesh B. Chappalli , Christopher P. Tann , Peter F. Holland , Guy Côté , Stephan Lachowsky
Abstract: An electronic display pipeline may process image data for display on an electronic display. The electronic display pipeline may include burn-in compensation statistics collection circuitry and burn-in compensation circuitry. The burn-in compensation statistics collection circuitry may collect image statistics based at least in part on the image data. The statistics may estimate a likely amount of non-uniform aging of the sub-pixels of the electronic display. The burn-in compensation circuitry may apply a gain to sub-pixels of the image data to account for non-uniform aging of corresponding sub-pixels of the electronic display. The applied gain may be based at least in part on the image statistics collected by the burn-in compensation statistics collection circuitry.
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公开(公告)号:US20220084477A1
公开(公告)日:2022-03-17
申请号:US17357868
申请日:2021-06-24
Applicant: Apple Inc.
Inventor: Mahesh B. Chappalli , Assaf Menachem , Daniel Yechiel Dar , Ido Yaacov Soffair
Abstract: An electronic display device has a panel that operates in conjunction with a light-emitting diode (LED) backlight. The device “slopes” or gradually ramps a change in brightness of an LED based on a target brightness value of the LED, a current brightness value of the LED, and temperature at the LED. The device also may limit power to the backlight based on an estimated power consumption of a current row of LEDs of the backlight and power consumption of the other rows of LEDs. The device also may determine a reduced voltage to supply to an LED based on a current to supply to the LED to cause the LED to operate. The device also may send an interrupt to the backlight to block updates to the backlight while image content is written to pixels of the panel. The device further compensates for aging of and temperature at an LED.
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公开(公告)号:US20220084454A1
公开(公告)日:2022-03-17
申请号:US17321073
申请日:2021-05-14
Applicant: Apple Inc.
Inventor: Mahesh B. Chappalli
Abstract: Image data for a current image frame may be compensated for transient response variations due to variations in display panel temperatures at various positions of the display panel by performing pixel drive compensation. The pixel drive compensation may be performed based at least in part upon display panel temperatures at various portions of the display panel. In this way, drive compensation corresponding to various temperature variations in a display panel may be implemented.
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公开(公告)号:US11164540B2
公开(公告)日:2021-11-02
申请号:US16711319
申请日:2019-12-11
Applicant: Apple Inc.
Inventor: Peter F. Holland , Mahesh B. Chappalli , Yifan Zhang , Tae-Wook Koh
IPC: G09G5/10
Abstract: An electronic device may include an electronic display and a display pipeline. The electronic display may include multiple pixels to display images based at least in part on pixel data. The display pipeline may receive image data and process the image data to determine the pixel data. The display pipeline may include burn-in compensation circuitry to apply gains to the image data based at least in part on burn-in statistics to generate the pixel data. The gain to be applied to the image data for a pixel of the electronic display is determined by the burn-in compensation circuitry, based at least in part on an emission duty cycle of the pixel, to compensate the image data for the pixel for burn-in related aging of the pixel.
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公开(公告)号:US10937385B1
公开(公告)日:2021-03-02
申请号:US16545955
申请日:2019-08-20
Applicant: Apple Inc.
Inventor: Peter F. Holland , Malcolm D. Gray , Mahesh B. Chappalli
Abstract: A method for operating a display pipe having a first bit depth and implemented in an electronic device may include determining a second bit depth of a display. The method may also include compressing first image data to the second bit depth, where the first image data corresponds to a first image to be presented via the display. The method may also include including buffer data with the first image data to generate processed image data and outputting the processed image data as output image data to cause presentation of the first image.
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公开(公告)号:US20210056915A1
公开(公告)日:2021-02-25
申请号:US16545975
申请日:2019-08-20
Applicant: Apple Inc.
Inventor: Peter F. Holland , Mahesh B. Chappalli
IPC: G09G3/3283 , G09G3/3233 , G09G3/20
Abstract: Image data for a current image frame may be compensated for transient response variations due to changes to pixel values from one frame to another over time by performing pixel drive compensation. The pixel drive compensation may be performed using a current pixel value and a historical pixel value. The historical pixel value may be the same as a pixel value in the directly previous frame in some conditions, while in other conditions the historical pixel value may be modified from a previous image frame in light of a prior pixel value occurring before the previous image frame. In this way, drive compensation corresponding to image data of a subsequent image frame may be determined based at least in part on a multi-frame history. Even so, the memory bandwidth and/or power consumed to use a multi-frame history to determine a drive compensation may be reduced.
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68.
公开(公告)号:US10917583B2
公开(公告)日:2021-02-09
申请号:US16040400
申请日:2018-07-19
Applicant: Apple Inc.
Inventor: Teun R. Baar , Nicolas P. Bonnier , Adria Fores Herranz , Mahesh B. Chappalli
Abstract: Aspects of the subject technology relate to display circuitry for displaying both standard dynamic range (SDR) and high dynamic range (HDR) content with an HDR display. The subject technology provides a headroom-based transfer function that maintains the contrast of the SDR content whether the display is operated in the SDR or HDR mode.
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公开(公告)号:US10789877B2
公开(公告)日:2020-09-29
申请号:US16515952
申请日:2019-07-18
Applicant: APPLE INC.
Abstract: Devices and methods for underrun compensation are provided. By way of example, a technique for underrun compensation includes determining a particular one of a plurality of pixel configurations for a display. When an underrun condition is detected during processing of first image data via an image processing pipeline, at least a portion of requested image data for downstream processing has not yet been provided by an upstream processing component. Accordingly, upon detecting an underrun condition, underrun pixel data for the at least portion of the requested image data is generated, based upon the particular one of the plurality of pixel configurations.
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公开(公告)号:US10713748B2
公开(公告)日:2020-07-14
申请号:US16122473
申请日:2018-09-05
Applicant: Apple Inc.
Inventor: Peter F. Holland , Mahesh B. Chappalli
IPC: G06T1/20 , G06T1/60 , G06F12/1081 , G06F13/28
Abstract: Display pipeline may manage allocation of total memory bandwidth to memory access requester blocks (e.g., display pipeline as a whole and/or a block in the display pipeline) by dynamically allocating the total memory bandwidth based at least in part on a calculated bandwidth floor to reduce the communication inefficiency (e.g., underruns), excessive power consumption, and image quality degradation of the display pipeline. Image fetch parameters, electronic display parameters, display pipeline parameters, and memory access requester block parameters may be used to determine the appropriate bandwidth floor for each memory access requester of the display pipeline. Additional memory bandwidth may be allocated to memory access requesters of the display pipeline when available bandwidth remains to further reduce likelihood of subsequent communication inefficiencies in the display pipeline.
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